WO2001076331A1

WO2001076331A1 - Element for an electronic assembly

Info

Publication number: WO2001076331A1
Application number: PCT/CH2001/000203
Authority: WO
Inventors: Walter Schmidt
Original assignee: Dyconex Patente Ag
Priority date: 2000-03-31
Filing date: 2001-03-30
Publication date: 2001-10-11
Also published as: AU2001242206A1

Abstract

A Power Supply Board (PSB) for being used within an electronic assembly comprises a layer (1) of dielectric material with a first and a second conducting layer on each side, respectively. At least the first conducting layer has a regular pattern of openings (7), which corresponds to vias (9) in the dielectric layer (1). In the openings (7), contact pads (11) are arranged which, by the vias, are electrically connected to the second conducting layer. The first and the second conducting layer are to be kept at Vcc and GND potential, respectively.

Description

ELEMENT FOR AN ELECTRONIC ASSEMBLY

The invention relates to electrical connecting elements such as Printed Circuit Boards (PCBs), High-Density-Interconnects (HDIs), Ball-Grid- Array- (BGA-) substrates, Chip Scale Packages (CSP), Multi-Chip-Module- (MCM) substrates, etc. It more particularly relates to an element of an electronic assembly and a to a method for supplying power to an assembly with integrated circuits.

In the past, electrical connecting elements were, mainly in the form of printed circuit boards, considered as relatively simple items. Nowadays, however, electrical connecting elements become increasingly complex. This in particular, because more and more functions have to be performed by an electrical connecting element. In the past, a PCB primarily had to fulfill the following functions:

to provide a mechanical carrier for the passive and/or active circuit components (rigidity)

to provide for electrical power connections (Vcc) to the power consuming components and for the return path (GND) (power supply) to provide conductor lines to conduct signals from one component to the others (signal distribution)

to provide for the appropriate mechanical and/or electrical interfaces to the components and to the external world (Interfaces)

- in some high power applications, to provide for heat removal from power consuming components (heat sink)

In the future, additional burdens will be loaded into PCBs or HDIs because new requirements related to modern electronics arise.

to provide accurately defined impedance values on certain high frequency signal tracks. This means, that the signal line obtains a vital, active role in the function of the circuit (signal integrity).

to provide shielding layers to avoid electromagnetic interference between signal lines and/or between signal lines and power supply lines or the external world (emission or pick up electrical signals, EMI).

- to provide embedded passive components like resistors, capacitors and inductors as well as thinned integrated circuit chips, which also be buried into the electrical connecting element substrate (embedded components). to provide optical interconnects by having integrated glass fibers or other means as optical wave guides as well as optical splitters, combiners and other optical components like mirrors, prism etc. (optical signal distribution).

to provide a possibility to dismantle a PCB/HDI easily into pure "clean" materials, which preferable should be recyclable or reusable. In addition, the manufacturing processes have to be "clean" also and the use of natural resources like water or energy should be minimized (environmental impact).

In addition to the inflation of burdens, the electrical connecting element has to be manufactured with very fine features and, which makes life very difficult, to constantly lower cost.

In order to address this general problems related to modern interconnect substrates, a new architectural concept has to be introduced.

First beginnings of such a concept have been presented already in .EP-A-0 451 541 and PCT/CH96/00218. They are based on the "Separation of Functions" (SOF) philosophy. The basic idea is to allocate one or a limited number of functions to just one constructive element as opposed to the "Amalgamation of Functions" (AOF) philosophy, which tries to load as many functions as possible to one element.

An other advantage of the SOF philosophy has also been demonstrated in the US patent 5,819,401: If the function "rigidity" is taken over by a separate element, the PCB/HDI substrate must itself not provide for the rigidity any more. According to the teaching of this patent, two PCBs with conventional vias are each bonded to one side of a metal core. A pin connection through an opening in the metal core is present so that the two HDIs can exchange information and/or electrical energy. The connection pins are soldered to contact areas of the HDIs.

There also have been first beginnings in which the function "power supply lines" is taken over by two reserved, essentially homogeneous conducting layers in a multilayered PCB, which are separated by a thin layer, preferably with high dielectric constant εR. One of these two layers is on Vcc potential, the other one on GND potential. The reason for this set up has not been a separation of functions approach but the fact that in this way a high buffer capacitance between the Vcc and the GND can be achieved. The drawbacks of this approach, however, are major: The layers have to be contacted via individual through holes. The manufacturing of such contacts is rather difficult and time consuming. Drilling of holes through several layers has to be done mechanically. Further, if such a through contact is manufactured, it has to be made sure by local etching of one layer around the through hole that only the desired one of these layers makes contact. In addition, such contacts necessarily use up a lot of real estate making this approach entirely unsuitable for being used with high density interconnects or generally for application where a high wiring density is required.

It is an object of the invention to overcome drawbacks of the prior art electrical connecting elements. It is especially an object of the present invention to introduce an element of an electronic assembly which allow to go a few steps further on the above outlined path towards an electrical connecting element in which the functions are separated.

It is another object of the invention to provide a method for supplying power to an electrical connecting element. This object is achieved by the invention as defined by the claims.

The invention is essentially characterized in that a separate flat element is provided which provides electrical power connections (Vcc) to the power consuming components and for the return path (GND) on its both sides.

This assembly element is in the context of this description is named Power-Supply- Board (PSB). Of course, it does not have to be a "board" with the properties, especially the rigidness, that are usually associated with the term "board".

The power supply board is designed as unified board with an standard array of through connections. Some of these through connection made by microvias are bringing the power from the bottom layer up to the top layer. Others are connecting the top layer to constituents or components arranged adjacent to the bottom layer. In addition, some through connections may be reserved as pure through vias, without any electrical connection to Vcc or GND.

Since preferably the through connections are arranged in a regular pattern, it may be made as an off-the-shelf item serving a large variety of PCB HDI setups.

A power supply board features various advantages:

The buffer capacitance achievable with such a foil is around 3-20 μF/m² which is a very high value. Separate Vcc and GND planes enable to use the corresponding layers on the PCB/HDI as additional signal layers or for different Vcc voltages and/or shielding layers.

Critical signals are completely de-coupled from the power supply layers.

For relatively simple applications, the type specific PCB/HDI can be laid out with less layers, resulting in cost savings

The PSB can have very thick copper layers in order to minimize voltage losses. Thick copper layers on the PCB/HDI would not allow to structure fine features.

In a further step, resistors can also be placed onto the PSB in an regular array. This would allow a low cost manufacturing of buried resistors, on the other hand it would require special lay-out rules.

In new separation-of-function setups, the PSB can have a variety of functions. It can, as an example, be bonded between a flexible PCB/HDI and a mechanically stiff core. It can further be combined with interface elements, e.g. serving for a reliable thermal contact. Interface elements of this kind are disclosed in a patent application by the same applicant and based on the same priority. The PSB and such a thermal interface element are ideally combined if the pitch of electrically conducting through connections of the thermal interface element in some way is related to the pitch of connections of the PSB. An example of such a standard pitch is e.g. 80 through connections/inch²" In an assembly comprising thin and possibly flexible HDIs without a hard core, the PSB can also be used as a central part, on which PCB/HDI packages can be bonded.

According to a special embodiment of the invention, the interface element additionally comprises passive components with well defined and possibly tunable impedances between two joints. In this way, an other function can be taken away from an overloaded PCB/HDI.

In the following, preferred embodiments of the invention are described in more detail with reference to drawings:

Figure 1 shows a view of a power supply board as interface element,

- in Figure 2a through 2c, cross sections through different through connections of a power supply board are sketched,

Figure 3 shows a top view of a power supply board with a regular array of different through connections

Figure 4 schematically represents an embodiment of a power supply board incorporating passive elements being integrated trimmable resistors,

Figure 5 - also schematically - shows a batch of produced interface elements, and Figure 6 represents a scheme of an electrical connecting element for being used with an assembly with integrated circuits comprising power supply boards, and

The interface element of Figure 1 is a power supply board having the form of a very thin two-layer interconnect. It comprises a substrate layer 1 of a dielectric material. The substrate layer material may be any dielectric material. It may e.g. be a high dielectric constant ε_> material of preferably S_R>7 and for instance S_R>10. Such materials are known. They comprise e.g. a variety of thermoplastic materials such as ceramic filled Liquid Crystal Polymers but also curable organic materials. Further high dielectric constant materials are currently available from 3M Corp. or under development by others. Depending on the application, the substrate layer 1 material may, however, also be any dielectric material which can be used for insulating layers in PCB/HDI set-ups. The thickness of the dielectric substrate layer 1 is e.g. between 10 μm and 100 μm, for instance between 20 μm and 35 μm.

The substrate layer 1 is on both sides essentially covered by a thin metal layer 3, 5 with circular openings 7. The thickness of each metal layer is e.g. between 10 μm and 200 μm. The metal layers may be made of copper, however, any other conducting material may be used, e.g. silver. Of course, the openings 7 need not be circular; any shape can be used. Preferably, except for the openings 7, the metal layers 3, 5 cover essentially the entire side of the dielectric layer 1. Consequently, they cover a main part of the layer surfaces, preferably at least 70%, e.g. more than 85%.

The two metal layers 3, 5 serve as separate Vcc- and GND layers. Thanks to the very thin foil and the high S_R, they provide a relatively high buffer capacitance between the two layers. The capacitance may e.g. be as high as 3-20 μF/m². This positively affects the signal to noise ratio and signal integrity. Inside the circular openings 7, contact areas (or contact pads) 11 are present which are contacted by vias 9, e.g. microvias. Concerning vias, microvias and their manufacturing, it is referred to the literature, especially to a variety of patents and patent application publications of this applicant. The vias 9 serve to connect the Vcc plane with the contact areas 11 embedded in the GND plane and vice versa.

Both, the Vcc and the GND layer on the one hand can be contacted by direct or indirect joints to components of the assembly. This can be done anywhere except at the places where the openings are present. In this embodiment of the invention, therefore, the Vcc and the GND layer themselves serve as first contact areas. On the other hand, on both sides contact areas 11 connected to the other side are present serving as second contact areas.

The vias 9 are e.g. filled with a filling material 13 with a high thermal conductivity. The filling material may be a metal or a dielectric. By this means, the thermal conductivity of the entire PSB is enhanced. The thermal conductivity of the separate PSB may be an item if in a PCB/HDI setup the PSB is arranged somewhere between a rigid core with high thermal conductivity and a thin HD

In Figures 2a, 2b, and 2c, schematically different through contacts are shown in section. The through contact 21 connects the GND layer 5 with a contact area 11 embedded in a circular opening 7 in the Vcc layer 3. Since the contact area is also circular, an annular area 13 surrounds the contact area, where the dielectric layer 1 does not comprise a metal coating. The through contact 23, in an analogous way to the through contact 21, connects the Vcc layer 3 with a contact area 11 embedded in the GND layer 5. The through contact 25 is a through connection connecting contact areas 27, 29 for joints arranged on both sides of the PSB. It is neither electrically connected to the GND nor to the Vcc layer. In the examples of Figures 2a through 2c, the vias are filled with a dielectric filling material 13 of a high thermal conductivity, e.g. a polymer material filled with a powder of inorganic material with high thermal conductivity, like Aluminum Oxide, Aluminum Nitride or hexagonal Boron Nitride. In the through connection 25, one of the contact areas 27, therefore has an annular shape, if the filling material 13 is not additionally covered by a conductor. The vias also may be filled by any other material, e.g. a metal such as copper.

In Figure 3, a view of a PSB comprising a regular pattern of all three kinds of through contacts 21, 23, 25 according to Figures 2a through 2c is shown. As an example, such a board may comprise 586 contacts 21 from the GND layer to contact areas 11 in the Vcc layer, 586 contacts 23 from the Vcc layer to contact areas 11 embedded in the GND layer and 78 through connections 25 per square inch. Of course, any other pitch of contacts may be envisaged.

Whereas in the embodiment of Fig. 1 two kinds of through contacts are present corresponding to the through contacts of Figs. 2a and 2b, and the embodiment of Fig. 3 additionally even features through connection contacts 25, also a PSB with only one kind of through contacts 21 or 23 is possible. In this case, only one side of the PSB board features contact areas of both, the Vcc and the GND potential. Such a PSB will be sufficient if on only one side of it components are mounted.

PCBs or HDIs, next to active components (integrated circuits etc.) also comprise passive components such as e.g. resistors. They use a lot of real estate on the PCB/HDI and may produce disturbing electromagnetic signals. However, such resistors or inductances (or capacitances) of different application often have similar impedance values. It would therefore be desirable to place them on a separate element. A first idea would be to place them on a separate board for passive components comprising different (trimmable) resistors, inductances, capacitances and possibly other components with joints to be contacted arranged in a standardized pattern. In Figure 4, however, a slightly different approach is chosen. Passive components 31 are integrated in the PSB. In Figure 4, for reasons of simplicity a similar PSB to the one of Figure 3 is shown. However, it is clear that any standardized PSB can comprise integrated passive components. The passive components 31 are e.g. a regular array of trimmable resistors, each arranged between two joints 33, 35.

In Figure 5, the PSB is shown with an overlaid pitch within the via- array pattern. This allows to cut out multiples of the minimum size of 0.5 inch . Preferably, no via holes are placed in the score lines 41 of finished PSBs.

Figure 6 shows an electrical connecting element with a hard core 51, which here comprises two parts. The core 51 makes the connecting element mechanically stiff and serves as heat sink. It comprises through connections (not shown) for communication between two HDIs 53 fastened to each side of it. The core being made of two parts can carry in its inside optical distribution means and further embedded components. Between the core and the HDIs, PSBs 55 are arranged. They e.g. can each be of the previously described kind. Between the HDIs 53 and the PSBs 55 and between the PSBs 55 and the core 51, interface elements 57 are arranged. They are e.g. made of a dielectric material with a high thermal conductivity and comprise a regular pattern of electrically conducting through connection means, e.g. solder balls or solder columns. They further comprise adhesion means for fastening the core, the PSBs and the HDIs to each other. The above described embodiments are by no means the only way to carry out the invention. The expert will easily realize that numerous other embodiments can be thought of without leaving the spirit and scope of the invention.

Claims

WHAT IS CLAIMED IS:

1. An element for being used within an electronic assembly comprising a layer (1) of dielectric material, the dielectric layer (1) comprising on its first side a first conducting layer (3), and on its second side a second conducting layer (5), at least the first conducting layer comprising a regular pattern of openings (7), the dielectric layer (1) further having a regular pattern of vias (9), the vias (9) corresponding to at least some of the openings (7) of the first conducting layer (3), at least some of the vias (9) forming electrically conducting through connections between the second conducting layer (5) and contact areas (11) in at least some of the openings (7) in the first conducting layer (3).

2. An element according to claim 1, the first and the second conducting layer covering an essential part of the first and the second side of the layer (1) of dielectric material.

3. An element according to claim 1 or 2, the second conducting layer (5) comprising a regular pattern of openings (7), other ones of the vias (9) forming electrically conducting through connections between the first conducting layer

(3) and contact areas (11) in at least some of the openings (7) in the second conducting layer (5).

4. An element according to claim 1, 2 or 3 further comprising vias forming electrically conducting through connections (25) between electrically conducting contact areas (11) arranged on both sides of the dielectric layer, the electrically conducting contact areas being electrically de-coupled from the first (3) and the second (5) conducting layer.

5. An element according any one of the preceding claims wherein the capacitance of the condenser formed by the dielectric layer (1) and of the two conducting layers (3, 5) exceeds 3 μF/m².

6. An element according to any one of the preceding claims further comprising embedded passive components (31).

7. An element according to claim 6 wherein the passive components (31) are trimmable resistors which can be contacted from two joints (33, 35).

8. An electrical connecting element comprising an element according to any one of the preceding claims.

9. A method for supplying components of an electronic assembly with electrical power, the components having joints at standardized places, the method comprising the steps of providing a separate element with a first and a second group regularly formed or arranged contact areas, the contact areas of the first and the second group of contact areas being in electrical contact among each other but being electrically de-coupled from each other, the contact areas being formed or arranged in a manner that they extend to places corresponding to the joints of the components, bringing the components and the separate element in contact with each other so that the joints are contacted by contact areas, and applying a Vcc potential to the fist group of contact areas and a GND potential to the second group of contact areas.