ARCHITECTURE FOR INTERMEDIATE FREQUENCY DECODER
RELATED APPLICATIONS
This application is related to co-pending and co-filed Application Serial No. 09/518,072, attorney docket number 100.129US01, filed on even date herewith, entitled "Architecture for Intermediate Frequency Video Encoder" by inventors Dean Painchaud and Lawrence J. Wachter. This application is further related to co-pending and co-filed Application Serial No. 09/517,685, attorney docket number 100.131US01, filed on even date herewith, entitled "Automatic Gain Control for Input to Analog to Digital Converter" by inventors Dean Painchaud and Lawrence J. Wachter.
TECHNICAL FIELD
The present invention relates generally to the field of telecommunications and. in particular, to an intermediate frequency video decoder used in conjunction with telecommunication transmission systems.
BACKGROUND
Currently, one type of system for the transmission of a signal includes the use of fiberoptics due to the high speed and long distance transmission capability of such a system. For one such system, signals (e.g., a video signal) having different data rates are modulated onto an intermediate frequency (IF) carrier and then digitized and formatted to a fixed data rate and transmitted over digital fiberoptic transmission lines. On the receiving end of the digital fiberoptic transmission lines in such a system, the transmitted digitized signal is reconstructed and upconverted. In other words, the transmitted digitized signal is converted from a digital to an analog form and modulated or placed on an intermediate frequency (IF) carrier.
Different decoders have been designed to reconstruct and upconvert a digitized signal that has been transmitted through fiberoptic transmission lines. Currently, one approach in the design of such decoders has included a direct digital-to-analog (D/A) conversion of the incoming digitized signal. Subsequently, the analog signal is mixed
with an analog mixer and filtered using a surface acoustic wave (SAW) filter. SAW filter technology is capable of a sharp filter rolloff necessary to filter the analog mixer artifacts when there is limited spacing between such artifacts and the desired output signal (i.e., a guardband or spacing of 1 MHz); however, disadvantageously, SAW filter technology is more expensive than other types of filtering technology. Moreover, SAW filter technology is also noted for having higher loss, higher frequency amplitude response variation and higher non-linear phase response than other filtering technology.
Accordingly, when SAW filter technology is used, it is typically preceded or followed by equalization circuitry, thereby adding component and manufacturing costs to the overall decoding product.
A second approach for such reconstruction and upconversion of a digitized bandpass input signal has included a digital mixer followed by a digital bandpass filter prior to the D/A conversion of the digitized signal. Disadvantageously. the use of digital mixers and digital bandpass filters also increases the costs and expenses of such decoders.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an intermediate frequency decoder that has a lower expense and a higher performance.
SUMMARY
The above-mentioned problems with communication systems and other problems are addressed by the present invention and will be understood by reading and studying the following specification. A decoder and a method of decoding that can be used in conjunction with communications systems is described. In particular, embodiments of such a decoder can be incorporated into fiberoptic communication systems wherein the decoder receives a signal in digital form and reconstructs and upconverts an analog signal from the digitized version. Embodiments of the decoder
eliminate the requirement of costly sharp filter rolloff technology (e.g.. surface acoustic wave (SAW) filtering). Further, embodiments of the decoder eliminate the need for expensive digital mixing of the digital signal prior to the D/A conversion of such a signal. In particular, an illustrative embodiment of the present invention includes a decoder. The decoder includes interpolation circuitry that receives the digital signal and interpolates the digital signal to produce an inteφolated digital signal. Additionally, the decoder includes a D/A converter that is coupled to the interpolation circuitry. The D/A converter receives the interpolated digital signal and converts such a signal to an analog signal. The decoder also includes an analog mixer coupled to the D/A converter. The analog mixer receives the analog signal and upconverts the analog signal. In further embodiments, the analog mixer generates a number of artifacts such that a guardband between the number of artifacts and a desired output signal is such that an inductor- capacitor (LC) filter can eliminate the number of artifacts from the upconverted analog signal without distortion of the desired output signal.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a representational diagram of an illustrative embodiment of a system that includes embodiments of the present invention. Figure 2 is a representational diagram of an illustrative embodiment of a decoder according to the teachings of the present invention.
Figure 3 illustrates an embodiment of a frequency spectrum of an input signal to embodiments of the decoder illustrated in Figure 2.
Figures 4A-4B illustrate samples values of an input signal to embodiments of the decoder illustrated in Figure 2 before and after interpolation, respectively.
Figure 5 illustrates an embodiment of a frequency spectrum of an input signal after interpolation according to the teachings of the present invention.
Figure 6 illustrates an embodiment of a frequency spectrum of the interpolated signal after bandpass filtering according to the teaching of the present invention.
Figure 7 illustrates an embodiment of a frequency spectrum of an output signal of a digital-to-analog (D/A) converter according to the teachings of the present invention.
Figure 8 illustrates an embodiment of a frequency spectrum of an output signal of an analog filter of an analog signal according to the teachings of the present invention. Figure 9 illustrates an embodiment of a frequency spectrum of an output signal of an analog mixer according to the teachings of the present invention.
Figure 10 illustrates an embodiment of a passband shape for an analog filter according to teachings of the present invention.
Reference numbers refer to the same or equivalent parts of embodiment(s) of the present invention through several of the figures.
DETAILED DESCRIPTION
In the following detailed description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific illustrative embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense.
Figure 1 is a representational diagram of an illustrative embodiment of a system that includes embodiments of the present invention. In particular, Figure 1 includes analog input device 102, modulator 104, transmission devices 106 and 108, upconverter 110, radio frequency (RF) combiner 112, optical transmitter 114, optical node 116, line amplifier 118, set-top box 120 and television 122. Analog input device 102 is coupled to modulator 104, which is coupled to transmission device 106. Additionally, transmission device 106 is coupled to transmission device 108 through transmission line 124. In one embodiment, transmission line 124 is a fiberoptic transmission line. Further, transmission device 108 is coupled to upconverter 110, which is
coupled to RF combiner 112. RF combiner 112 is coupled to optical transmitter 114.
Moreover, optical transmitter 114 is coupled to optical node 116 through transmission line 126. In one embodiment, transmission line 126 is a fiberoptic transmission line.
Optical node 116 is also coupled to line amplifier 118, which, in turn, is coupled to set- top box 120 that is coupled to television 122.
In operation, analog input device 102 generates an analog video signal which will be viewed by individuals on television 120 after transmission through the system of
Figure 1. In one embodiment, analog input device 102 is a video camera. The analog video signal is then transmitted to modulator 104 where the signal is modulated onto a carrier signal on a transmission line, which is coupled to transmission device 106. Transmission device 106 receives the carrier signal that includes the analog signal. Using an encoder, transmission device 106 digitizes and formats the analog signal for transmission over transmission line 124. For more information on such an encoder, see copending/cofiled Application Serial No. 09/518,072, attorney docket number 100.129US01 , filed on even date herewith, entitled "Architecture for
Intermediate Frequency Video Encoder" by inventors Dean Painchaud and Lawrence Wachter.
After transmission across transmission line 124, transmission device 108 receives the digitized signal and reconstructs an analog signal from this digitized signal that is approximately the same as the original analog signal inputted into transmission device 106, using a decoder according to embodiments of the present invention. Embodiments of such a decoder eliminate the requirement of costly sharp rolloff technology (e.g., SAW filtering) and allow the use of other filtering technology (e.g.. LC filtering). Moreover, embodiments of the decoder eliminate the need for expensive digital mixing of the digital signal prior to a D/A conversion of such a signal.
Radio frequency (RF) combiner 112 receives the reconstructed analog signal from transmission device 108 and communicates the signal, as an RF signal, to optical transmitter 114. Optical transmitter 114 transmits this signal along transmission line 126 to optical node 116. Optical node 116 then transmits this signal as an RF signal to
line amplifier 1 18 that amplifies and transmits the signal to set-top box 120 which formats the signal for viewing on television 122. This system illustrates only one signal being transmitted for purposes of illustration and not by way of limitation, as multiple signals can be transmitted in the system of Figure 1. Moreover, the system of Figure 1 illustrates the transmission of a signal to a single set-top box and television for puφoses of illustration and not by way of limitation, as multiple set-top boxes and televisions or other receiving devices can be used in conjunction with the system of Figure 1. Further, the system of Figure 1 illustrates the transmission of a video signal; however, any type of information-bearing signal can be transmitted through the system (e.g., audio and/or data signals).
Figure 2 is a representational diagram of an illustrative embodiment of a decoder according to the teachings of the present invention, which can be included in transmission device 108 of Figure 1. In particular, Figure 2 comprises decoder 200 that includes interpolation circuitry 202, digital filter 204, digital/analog (D/A) converter 206, lowpass filter 208, frequency response equalization circuitry 210. first analog bandpass filter 212, analog mixer 214, second analog bandpass filter 216, amplifier 218, gain control circuitry 219 and PLL/clock multiplier 220.
In particular, inteφolation circuitry 202 is coupled to and also transmits inteφolated signal 224 to digital filter 204. Digital filter 204 is coupled to and also transmits filtered signal 226 to D/A converter 206. Additionally, D/A converter 206 is coupled to and also transmits analog signal 228 to lowpass filter 208. which is coupled to frequency response equalization circuitry 210. Frequency response equalization circuitry 210 is coupled to and also transmits modified analog signal 232 to analog mixer 214. PLL/clock multiplier circuitry 220 is coupled to and also transmits timing signals to inteφolation circuitry 202, digital filter 204, D/A converter 206 and first analog bandpass filter 212. In particular, PLL/clock multiplier circuitry 220 transmits inteφolation clock signal 238 to inteφolation circuitry 202 and transmits digital filter clock signal 240 to digital clock 204. Further, PLL/clock multiplier circuitry 220
transmits D/A sampling clock signal 242 to D/A converter 206 and transmits local oscillator clock signal 244 to first analog bandpass filter 212. Analog mixer 214 is coupled and receives local oscillator clock signal 244 from first analog bandpass filter
212. Additionally, analog mixer 214 is coupled to and also transmits analog mixed signal 234 to second analog bandpass filter 216. Second analog bandpass filter 216 is coupled to and also transmits analog filtered signal 236 to amplifier 218. Amplifier 218 is coupled to and is controlled by gain control circuitry 219.
In operation, input signal 222 is inputted into decoder 200 at inteφolation circuitry 202. Input signal 222 is a digitized signal where in one embodiment this signal is received from a fiberoptic transmission line at a rate of approximately 13.524 Mega samples per second (Msps). In one embodiment, input signal 222 is a video signal, although embodiments of the invention are not so limited as input signal 222 can be any type of information-bearing signal (e.g., audio or data signals). Figure 3 illustrates an example of a frequency spectrum of input signal 222. In particular, Figure 3 includes frequency spectrum 302, which is the frequency spectrum of input signal 222, that has a range between frequency point 304 and frequency point 306, which are the low and high frequency points for frequency spectrum 302. Further, Figure 3 includes digitized input sample rate point 310, which is self-defined as the sample rate of the digitized input signal (i.e., input signal 222). Figure 3 also includes frequency point 308, which is one half of this sample rate of the digitized input signal.
As illustrated in Figure 3. frequency point 304 is above zero MHz (i.e., direct current (DC)) by a frequency of fBBL, thereby creating a guardband (i.e., spacing) of fBBL between the respective points. Similarly, frequency point 306 is below frequency point 308 by the same proportion, thereby creating a guardband of fBBL between the respective points. In one embodiment, fBBL is 506 kHz.
Inteφolation circuitry 202 receives input signal 222 and inteφolates the digitized input signal to generate inteφolated signal 224. Inteφolation is a process of selectively or periodically inserting samples with zero value into the digitized input signal to change the data rate by an integer factor. In one embodiment illustrated in
Figure 4, the digitized input signal is interpolated by four. Accordingly, three "zero" samples are added for every digitized input sample. However, the invention is not limited to the one to four ratio illustrated in Figure 4 as other ratios can be applied by inteφolation circuitry 202. Figure 4A illustrates input signal 222 before interpolation, while Figure 4B illustrates the output of interpolation circuitry 202 after inteφolation by four (i.e., inteφolated signal 224). In particular, Figure 4A includes sample numbers 402-418 having varying samples values, as illustrated, while Figure 4B includes sample numbers 452-468 having the same varying sample values, as illustrated. In particular, sample numbers 402-418 of Figure 4A correspond to samples number 452-468 of Figure 4B, respectively. Further, Figure 4B includes zero sample sets 470-484 such that each one includes three zero samples to allow for an interpolation by four.
Zero sample sets 470-484 are placed between sample numbers 452-468. In particular, zero sample set 470 is located between sample numbers 452 and 454. Similarly, zero sample set 472 is located between sample numbers 454 and 456, and zero sample set 474 is located between sample numbers 456 and 458. Further, zero sample set 476 is located between sample numbers 458 and 460. and zero sample set 478 is located between sample numbers 460 and 462. Zero sample set 480 is located between sample numbers 462 and 464, and zero sample set 482 is located between sample numbers 464 and 466. Additionally, zero sample set 484 is located between sample numbers 466 and 468.
Accordingly, in the frequency domain, the inteφolation demonstrated in Figures 4A-4B produces inteφolated signal 224 that includes four images, which include mirrored and non-mirrored versions, of the frequency spectrum of input signal 222, as illustrated in Figure 5. Inteφolated signal 224 illustrated in Figure 5 includes non- mirrored images 502 and 506 and mirrored images 504 and 508. Moreover, non- mirrored image 502 has low frequency point 520 and high frequency point 522, and mirrored image 504 has low frequency point 524 and high frequency point 526. Similarly, non-mirrored image 506 has low frequency point 528 and high frequency
point 530, and mirrored image 508 has low frequency point 532 and high frequency point 534. Additionally, the graph of Figure 5 also includes frequency points 540 and 542. Frequency point 540 is the rate of the D/A sampling frequency of D/A converter 206, while frequency point 542 is one-half of this rate of the D/A sampling frequency of D/A converter 206.
Further, Figure 5 illustrates that the inteφolation of Figure 4 of input signal 222 has created spacing (i.e., guardbands) between DC, non-mirrored images 502 and 506. mirrored images 504 and 508 as well as frequency point 542. In particular, inteφolated signal 224 includes guardbands 550-558. Guardband 550 is the frequency band between DC and low frequency point 520 of non-mirrored image 502, which in one embodiment has a range of fBBL. Guardband 552 is the frequency band between high frequency point 522 of non-mirrored-tmage 502 and low frequency point 524 of mirrored image 504, which in one embodiment has a range of two times fBBL. Additionally, guardband 554 is the frequency band between high frequency point 526 of mirrored image 504 and low frequency point 528 of non-mirrored image 506. which in one embodiment has a range of two times fBBL. .Guardband 556 is the frequency band between high frequency point 530 of non-mirrored image 506 and low frequency point 532 of mirrored image 508, which in one embodiment has a range of two times fBBL. Moreover, guardband 558 is the frequency band between high frequency point 534 and frequency point 542, which in one embodiment has a range of fBBL. In one embodiment, fBBL is 506 kHz. Advantageously, these guardbands allow digital filter 204 to filter this inteφolated signal having multiple images thereby isolating and selecting the appropriate image from among the mirrored and non-mirrored images.
In one embodiment, mirrored image 504 is selected, which is in a range of 7.27 to 13.02 MHz. In particular, inteφolated signal 224 is filtered through digital filter 204 thereby generating filtered signal 226 with the frequency spectrum illustrated in Figure 6 (i.e., mirrored image 504), thereby eliminating non-mirrored images 502 and 506 as well as mirrored image 508. In one embodiment, digital filter 204 comprises a finite impulse response (FIR) digital bandpass filter with passband 602. D/A converter 206
receives filtered signal 226 and converts the signal from digital to analog, producing analog signal 228 with one embodiment having a frequency spectrum illustrated in
Figure 7. In particular, analog signal of Figure 7 includes mirrored image 504 (i.e.. the desired signal image) and higher order images 702-706 produced from sin(x)/x rolloff 708 created in the D/A conversion process. For more information on such digital signal processing, see J. G. Proakis and D. G. Manolakis, Digital Signal Processing,
Macmillan Publishing. New York, 1992 and L. B. Jackson, Digital Filters and Signal
Processing, Kluwer Academic Publishers. Boston, 1986.
Analog signal 228 is then passed into lowpass filter 208 and frequency response equalization circuitry 210. Lowpass filter 208 and frequency response equalization circuitry 210 enable the elimination of higher order images 702-706 from sin(x)/x rolloff 708 thereby generating modified analog signal 232. One embodiment of a frequency spectrum of modified analog signal 232 is illustrated in Figure 8. In particular, Figure 8 includes mirrored image 504 wherein higher order images 702-706 have been removed.
Modified analog signal 232 is then upconverted using analog mixer 214. The frequency of analog mixer 214 is chosen based on which image was selected from the frequency spectrum of inteφolated signal 224 illustrated in Figure 5. In one embodiment, the frequency of analog mixer 214 is approximately 33.725 MHz. Accordingly, one embodiment of a frequency spectrum of analog mixed signal 234 which is outputted from analog mixer 214 is shown in Figure 9. Figure 9 includes image 902 and artifacts 904-906. Image 902 is the frequency spectrum of the desired output signal. Artifacts 904 and 906 are the artifacts created by the analog mixing (i.e.. mixer output artifacts). In one embodiment, the distance between the closest artifact (i.e., artifact 906) and image 902 is over 7 MHz. Advantageously, this distance allows the mixer output artifacts to be filtered using conventional LC filter technology to greater than 65 dB below the desired output signal. Accordingly, the upconversion by analog mixer 214 creates sufficient spacing between the mixer output artifacts and the desired output signal to allow the use of LC filter technology to filter out the mixer
output artifacts.
Analog mixed signal 234 from analog mixer 214 is then inputted into analog filter 216 and is filtered with the bandpass illustrated in Figure 10 (i.e.. bandpass 1002) thereby removing the mixer output artifacts and producing analog filtered signal 236. In one embodiment, analog filter 216 is an LC filter. Analog filtered signal 236 is then inputted into amplifier 218. The gain of amplifier 218 is controlled by gain control circuitry 219 to scale the amplitude of the filtered signal to the desired output level. thereby producing output signal 246 from decoder 200.
Advantageously, the embodiment of decoder 200 and equivalents thereof eliminate the requirement of costly shaφ rolloff technology (e.g., SAW filtering) and allowing the use of other filtering technology (e.g., LC filtering). Moreover, embodiments of the decoder eliminate the need for expensive digital mixing of the digital signal prior to a D/A conversion of such a signal.
CONCLUSION
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that any arrangement which is calculated to achieve the same puφose may be substituted for the specific embodiment shown. This application is intended to cover any adaptations or variations of the present invention. For example, the data rates as well as the frequency spectrums and the shapes thereof of the analog and digital signal, as described herein, may be varied and still fall within the scope of the present invention. By further example, the inteφolation, the number of bits used during the D/A conversion as well as the selection of specific images within frequency spectrums of the various signals, as described herein, may be varied and still fall within the scope of the present invention.