WO2001050593A1

WO2001050593A1 - Method for direct conversion fsk and apparatus for using the same

Info

Publication number: WO2001050593A1
Application number: PCT/US2001/000517
Authority: WO
Inventors: Chih-Fei J. Wang
Original assignee: Nextcomm, Inc.
Priority date: 2000-01-06
Filing date: 2001-01-04
Publication date: 2001-07-12
Also published as: AU2930401A

Abstract

Quadrature signals are produced from received FSK. The quadrature signals are differentiated (550, 552) and combined (570), producing a phase signal having a phase signal velocity. A phase analysis circuit (570) analyzes the phase signal and produces a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero. A velocity analysis circuit (572, 574) analyzes the zero velocity signal and produces FSK information.

Description

Method for Direct Conversion FSK and Apparatus for Using the

Same

Technical Field

The present invention relates to methods and apparatus for reception of information transmitted by electromagnetic energy, and more particularly, to methods for direct conversion of frequency shift keyed transmissions and apparatus for using with the same.

Background of the Invention

A primary function of a radio receiver is to provide the needed gain and selectivity prior to detection and further signal processing. The filtering and amplification needed for this purpose can be performed at the radio frequency (RF) directly when the frequency is reasonably low. However, as the frequency continues to move up it is no longer practical to accomplish this in the RF stage. Therefore, an intermediate frequency (IF) stage at a lower frequency is introduced to perform these duties. This is achieved by mixing the input RF signal with a local oscillator (LO) signal. The LO frequency is either above or below the RF frequency, namely high side or low side injection respectively. The difference between the RF and the LO is exactly the IF frequency. This is typically referred to as a single conversion receiver.

Figure 1A is a block diagram of a traditional single conversion FSK receiver. The receiver 10 includes an antenna 12, an RF bandpass and amplification stage 14, a mixer 16, an IF bandpass and amplification stage 18, a demodulator 20, and a data slicer 22. The antenna 12 receives electromagnetic signals at a predetermined transmit frequency that contain the FSK information and converts these signals to an electrical form. The RF stage 14 includes a first RF bandpass filter 30, a low noise amplifier (LNA) 32, and a second RF bandpass filter 34. The electrical signals from the antenna 12 are filtered by the first filter 30 to reduce all frequencies except those near the transmit frequency. The first-filtered signals are then amplified by the LNA 32 and then further filtered by the second filter 34 to further filter out signals at frequencies away from the transmit frequency. The output of the second filter 34 is passed to the mixer 16, where it is mixed with another signal produced by a conventional LO (not shown) . This produces an electrical signal at the IF, which is then sent to the IF stage 18. The IF stage 18 includes an IF bandpass filter 36 and a limiting amplifier 38. The IF signal is filtered by the IF filter 36, which is centered at the IF frequency, and the output of the IF filter 36 is amplified by the limiting amplifier 38.

The output of the limiting amplifier 38 is passed to the demodulator 20, which includes an FM demodulator 40 and a feedback filter 42. Together the FM demodulator 40 and feedback filter 42 operate as is well known to produce an electrical signal containing the data originally provided in the electromagnetic signals received by the antenna 12. The data slicer 22 then converts the data contained in the electrical signal produced by the demodulator 20.

The IF frequency chosen for a single conversion receiver must be larger than half of the desired RF input bandwidth; otherwise, an image problem will occur. For example, in the United States, an FM receiver has an RF bandwidth from 88 MHz to 108 MHz. If 5 MHz is chosen as the IF frequency, the high side injected LO for the desired channel at 88.1 MHz will be 93.1 MHz, which will also function as the low side injected LO for the undesired channel at 98.1 MHz. Since 98.1 MHz is also in band, it will interfere with the desired reception of 88.1 MHz. In this case the undesired channel 98.1 MHz is an image.

In most cases, the available bandwidth goes up with the RF frequency. As a result, the image problem will eventually happen if the IF frequency remains the same. To solve this problem, the IF frequency has to go up accordingly. This is more expensive to implement and consumes more power. An alternative is to add a second IF stage after the first IF. This is called a double conversion receiver. A typical double conversion receiver is designed with the first IF to provide image rejection and the second IF to provide the needed gain and selectivity.

Figure IB is a block diagram of a traditional double conversion FSK receiver. The receiver 110 includes an antenna 112, an RF bandpass and amplification stage 114, a first mixer 116, a first IF bandpass filter 218, a second mixer 216, an IF bandpass and amplification stage 118, a demodulator 120, and a data slicer 122. The antenna 112 receives electromagnetic signals at a predetermined transmit frequency that contain the FSK information and converts these signals to an electrical form. The RF stage 114 includes a first RF bandpass filter 130, a low noise amplifier (LNA) 132, and a second RF bandpass filter 134. The electrical signals from the antenna 112 are filtered by the first filter 130 to reduce all frequencies except those near the transmit frequency. The first-filtered signals are then amplified by the LNA 132 and then further filtered by the second filter 134 to further filter out signals at frequencies away from the transmit frequency.

The output of the second filter 134 is passed to the mixer 116, where it is mixed with another signal produced by a conventional first LO (not shown) . This produces an electrical signal at the first IF, which is then sent filtered by the first IF filter 218. The IF filter 218 filters out signals at frequencies away from the IF. This filtered IF passes to the second mixer 216, where it is mixed with another signal produced by a conventional second LO (not shown) . The produces an electrical signal at the second IF.

The signal at the second IF is next passed to the IF stage 118. The IF stage 18 includes an IF bandpass filter 136 and a limiting amplifier 138. The IF signal is filtered by the IF filter 136, which is centered at the second IF frequency, and the output of the IF filter 136 is amplified by the limiting amplifier 138.

The output of the limiting amplifier 138 is passed to the demodulator 120, which includes an FM demodulator 140 and a feedback filter 142. Together the FM demodulator 140 and feedback filter 142 operate as is well known to produce an electrical signal containing the data originally provided in the electromagnetic signals received by the antenna 112. The data slicer 122 then converts the data contained in the electrical signal produced by the demodulator 120.

The traditional single and double conversion receivers are costly to build due to the number of components. Even with efforts made to reduce the number of RF ICs by higher integration, passive components like SAW filters and ceramic filters needed in various IF stages remain difficult, if not impossible, to integrate into the fewer RF ICs. Even worse, higher integration often creates parasitic problems due to the need to run signal traces from many external components to a tight and crowded space around the RF IC as a result of the higher level of integration.

Information in a communication system is generally encoded as the amplitude or phase (or both) of a RF carrier: S(t) = r sin (θ + ωt) (1)

As an alternative to the above amplitude and phase representation, the modulated RF carrier can also be represented in quadrature form as :

S(t) = 1 sin (θ + ωt) + Q cos (θ + ωt) (2) where I = r cos θ and Q = r sin θ

Since the I- and Q- channels are orthogonal to each other, equations (1) and (2) can also be written in a complex number notation:

S(t) = r _e ^{j(θ + ωt)} = I cos ωt + j Q sin ωt (3) where j = (-1)^1/2

The I- and Q- channel information can be recovered at the receiver by demodulating the received signal with a pair of LO signals which have 90 degree phase shifts relative to each other and a frequency identical to the frequency of the received signal. This process is also known as quadrature demodulation. Figure 2A is a block diagram of a quadrature demodulator. Quadrature demodulation is typically done in the IF stage where there is sufficient signal strength to do so.

The quadrature demodulator 300 includes a phase splitter circuit 302 driven by a signal produced by a conventional LO (not shown) . The phase splitter circuit 302, which can be realized by hybrid circuit technology, produces two output signals at the frequency provided by the LO. One output signal is produced at the port 304 of the phase splitter circuit 302, while the other output signal is produced at the port 306 of the phase splitter circuit 302. The output signal (the out-of phase" signal) produced at the port 306 is 90 degrees out of phase relative to the output signal (the "in-phase" signal) produced at the port 304.

The received signal may be at a radio frequency or an intermediate frequency. This signal is directed to two mixers 308 and 310. At the mixer 308 the received signal is mixed with the in-phase signal, while at the mixer 310 the received signal is mixed with the out-of-phase signal. The respective outputs of the mixers 308 and 310 are then filtered by low pass filters 312 and 314. The output of the low pass filter 312 is the signal I(t), while the output of the low pass filter 314 is the signal Q(t) . Figure 2B is a diagram showing the relationship between polar components and the quadrature components. The polar components describe the signal on a plane in terms of an amplitude r(t) and a phase θ(t), while the quadrature components describe the signal in terms of a real component I (t) and an imaginary component Q(t). The resulting signal can be interpreted as following a trajectory along a circular arc 400. After quadrature demodulation the only useful information retained is I(t) and Q(t), with the RF carriers, i.e., sin ωt and cos ωt, discarded. The recovered information can be represented as r_n e^jθn = I_n + j Q_n, where n is the index of the n^th sample.

Since the instantaneous frequency deviation is defined as

ΔF = (l/2π) Δθ/dt = (l/2π) dθ/dt, (4)

frequency shift keying (FSK) demodulation can be accomplished by sampling the I- and Q- channel signals at a predetermined time interval (Δt) and observing the phase change (Δθ) between the two times. As in the following equation (5a) the phase change is typically determined by multiplying the current complex sample by the complex conjugate of the previous complex sample.

( r e^^θn) ( r e^"^"1 ) ^* = ( r e^jθn) ( r e^^11"1) = r² e^ ^{(θn ~ Qn'1} = r² e>^ΔΘ _{( 5 a )}

By sampling the I- and Q- channels, this can be expressed as

r² e^jΔΘ = (I_n + jQ_n) (I_n-_! + jQ_n-ι)^* = (I_n + jQ_n) (I_n-ι - jQ_n-ι) = In In-1 + Qn Qn-1 + j ( In-1 Qn ^~ In Qn-l) = I_n ² (1 - Δl/I_n) + Qn² (1 - ΔQ/Q_n)

+ j (ΔQ I_n - ΔI Q_n) (5b) where

I_n-ι = I_n - ΔI

Qn-l = Qn - ΔQ

Phase change is primarily determined by the imaginary term (ΔQ I_n ^_ Δl Q_n) with the sign of the term reflecting the polarity of the modulating symbol. If there is no phase change the imaginary term is zero.

A direct conversion receiver is theoretically possible by demodulating the RF signal directly with the above quadrature demodulator. The needed selectivity and gain can be accomplished by low pass filters (LPFs) and low frequency (LF) amplifiers, respectively, which are considerably lower in cost and higher in performance compared to IF filters and IF amplifiers. More importantly, LPFs and LF amplifiers are easier to integrate with other baseband circuits from the integrated circuit (IC) point of view.

However, direct conversion receivers have not been widely deployed primarily due to the DC offset problem. Practical mixers, including the double balanced mixer (DBM) , produce a DC offset that is a magnitude of order larger than the desired signal. A large varying DC offset also comes from self mixing of the LO signal as a result of the limited radio frequency isolation. The large amount of DC offset will saturate the amplifier that follows the direct conversion and render the amplified signal useless. Figure 2C is a diagram showing the effect of a large amount of DC offset. In effect, the portion of the plane of the signals shown in Figure 2B is shown in the upper right hand portion of Figure 2C. The displacement of the portion of the plane shown in Figure 2B from the origin of the plane is the DC offset. The DC offset can be broken down into its real and imaginary components. According to equation (5b) both I_n and Q_n signals are needed in addition to Δl and ΔQ in order to determine the phase change. Therefore the I- and Q- channel signals cannot be AC-coupled to avoid the DC offset problem.

Summary of the Invention

According to one aspect, the invention is an apparatus for direct conversion of FSK signals containing information. The invention includes a receiving circuit to receive the FSK signals and to produce quadrature signals corresponding to the FSK signals therefrom and a differentiating circuit to differentiate the quadrature signals. The apparatus also includes a combining circuit to combine the quadrature signals and produce a phase signal therefrom, the phase signal having a phase signal velocity. The invention further includes a phase analysis circuit to analyze the phase signal and to produce a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero, and a velocity analysis circuit to analyze the zero velocity signal and produce the information contained in the FSK signals.

According to another aspect, the invention is a method for direct conversion of FSK signals containing information. The method includes the steps of a) receiving the FSK signals and producing quadrature signals corresponding to the FSK signals therefrom, and b) differentiating the quadrature signals. The method further includes the step of c) combining the quadrature signals and producing a phase signal therefrom, the phase signal having a phase signal velocity. The method also includes the steps of d) analyzing the phase signal and producing a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero, and e) analyzing the zero velocity signal and producing the information contained in the FSK signals.

According to yet another aspect, the invention is an apparatus for direct conversion of FSK signals containing information. The apparatus includes means for receiving the FSK signals and producing quadrature signals corresponding to the FSK signals therefrom and means for differentiating the quadrature signals. The invention also includes means for combining the quadrature signals and producing a phase signal therefrom, the phase signal having a phase signal velocity. The invention further includes means for analyzing the phase signal and for producing a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero, and means for analyzing the zero velocity signal and for producing the information contained in the FSK signals. Brief Description of the Drawings

Figure 1A is a block diagram of a traditional single conversion frequency shift keying (FSK) receiver.

Figure IB is a block diagram of a traditional double conversion FSK receiver.

Figure 2A is a block diagram of a quadrature demodulator.

Figure 2B is a diagram showing the relationship between polar components and the quadrature components.

Figure 2C is a diagram showing the effect of a large amount of DC offset.

Figure 3A is a diagram showing the relationship between differential changes in the phase angle and differential changes in the real and imaginary quadrature components.

Figure 3B is a diagram showing the effect on phase angle speed when an FSK symbol changes polarity.

Figure 4A is a block diagram of an embodiment of an FSK demodulator according to the present invention.

Figure 4B is block diagram of a portion of the embodiment of an FSK demodulator shown in Figure 4A. Figure 5 is a graph showing a number of waveforms demonstrating the operation of an embodiment of an FSK demodulator according to the present invention.

Figure 5A shows a waveform representing a sample of FSK data. Figure 5B shows a waveform representing the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A.

Figure 5C shows a waveform representing the real quadrature component corresponding to the sample of FSK data shown in Figure 5A. Figure 5D shows a waveform representing the time derivative of the real quadrature component corresponding to the sample of FSK data shown in Figure 5A.

Figure 5E shows a waveform representing the time derivative of the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A.

Figure 5F shows a waveform representing the square of the time derivative of the real quadrature component corresponding to the sample of FSK data shown in Figure 5A. Figure 5G shows a waveform representing the square of the time derivative of the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A.

Figure 5H shows a waveform representing the sum of the squares of the time derivative of the imaginary and real quadrature components corresponding to the sample of FSK data shown in Figure 5A.

Figure 51 shows a waveform representing the received FSK data corresponding to the FSK data shown in Figure 5A.

Figure 5J shows a waveform representing the sum of the magnitudes of the time derivatives of the real and imaginary quadrature components corresponding to the sample of FSK data shown in Figure 5A.

Figure 6A is a diagram of an operational amplifier known in the prior art that can implement a differentiator. Figure 6B is a diagram of an RC network known in the prior art that can implement a differentiator.

Figure 6C is a diagram of a differential bipolar transistor pair that can implement a differentiator.

Figure 7A is a diagram of a single quadrant squaring circuit using an NPN transistor.

Figure 7B is a diagram of a squaring circuit adapted to accept bipolar inputs . Figure 7C is a diagram of a squaring circuit adapted to sum the real and imaginary signals.

Figure 8 is a diagram of a prior art Gilbert cell configured for differential inputs and differential outputs.

Detailed Description of the Preferred Embodiment of the Invention

The goal of this invention is to solve the DC offset problem associated with the quadrature demodulator and provide a practical FSK receiver solution. Figure 3A is a diagram showing the relationship between differential changes in the phase angle and differential changes in the real and imaginary quadrature components. By observing in Figure 3A that

r Δθ ^■= [(ΔI)² + (ΔQ)²]¹⁷² (6a)^'

r (dθ/dt) = [(dl/dt)² + (dQ/dt)²]^1/2 (6b)

Substituting into equation (4) :

ΔF = (l/2π) (dθ/dt) = (1/r) [(dl/dt)² + (dQ/dt)²]^{1 2} _(7a)

ΔF² = (1/r²) [(dl/dt)² + (dQ/dt)²] (7b)

The instantaneous frequency deviation of an FSK modulation is directly tied to the angular frequency of the I- and Q- samples. Based on equation (7b) this can be accomplished by a "differentiator circuit". The differentiator output is free of DC. Figure 3B is a diagram showing the effect on phase angle speed when an FSK symbol changes polarity. As shown in Figure 3B, whenever the FSK symbol changes polarity, the angular speed must return to zero first before picking up in amplitude in the other direction (polarity) .

Figure 4A is a block diagram of an embodiment of an FSK demodulator according to the present invention. In Figure 4A the I- and Q- channel signals are filtered by a pair of low pass filters that are optimized for best signal to noise ratio (channel filtering) . The FSK demodulator 500 includes an antenna 512, an RF bandpass and amplification stage 514, a signal processing stage 516, and an FSK data production section 518. The antenna 512 receives electromagnetic signals at a predetermined transmit frequency that contain the FSK information and converts these signals to an electrical form. The RF stage 514 includes a first RF bandpass filter 530, a low noise amplifier (LNA) 532, and a second RF bandpass filter 534. The electrical signals from the antenna 512 are filtered by the first filter 530 to reduce all frequencies except those near the transmit frequency. The first-filtered signals are then amplified by the LNA 532 and then further filtered by the second filter 534 to further filter out signals at frequencies away from the transmit frequency.

The signals produced by the second filter 534 then pass to the signal processing stage 516. The signal processing stage 516 includes a phase splitter circuit 540, an in-phase mixer 542, an out-of-phase mixer 544, low pass filters 546 and 548, differentiators 550 and 552, and amplifiers 554 and 556, which are controlled by conventional AGC signals.

The phase splitter circuit 540 is driven by a signal produced by a conventional LO (not shown) . The phase splitter circuit 540, which can be realized by hybrid circuit technology, produces two output signals at the frequency provided by the LO. One output signal is produced at a port 560 of the phase splitter circuit 540, while the other output signal is produced at the port 562 of the phase splitter circuit 540. The output signal (the ^λout-of phase" signal) produced at the port 562 is 90 degrees out of phase relative to the output signal (the "in- phase" signal) produced at the port 560. The signal produced by the second RF bandpass filter 534 is directed to the two mixers 542 and 544. At the mixer 542 the received signal is mixed with the in-phase signal, while at the mixer 544 the received signal is mixed with the out-of-phase signal. The respective outputs of the mixers 542 and 544 are then filtered by low pass filters 546 and 548. As discussed previously, the output of the low pass filter 546 is the signal I (t) , while the output of the low pass filter 314 is the signal Q(t). The signal I(t) is differentiated by the differentiator 550, and the signal Q(t) is differentiated by the differentiator 552. These differentiated signals are then respectively amplified by the amplifiers 554 and 556.

According to one preferred embodiment, the FSK data production section 518 includes a zero angular speed detect circuit 570, a flip-flop 572, and a preamble detect circuit 574. The FSK data production section 518 receives the filtered differential signals from the amplifiers 554 and 556 and establishes when the angular speed of the of the differential signals passes through zero. In response, the FSK data production section 518 produces a toggle signal which is sent to the flip-flop 572. The action of the flip-flop 572 is controlled by the preamble circuit 574, which monitors the FSK data output of the flip-flop 572 in order to detect signal transitions and resolve phase ambiguities.

Figure 5 is a graph showing a number of waveforms demonstrating the operation of an embodiment of an FSK demodulator according to the present invention. Figure 5A shows a waveform representing a sample of FSK data. Figure 5B shows a waveform representing the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A. Figure 5C shows a waveform representing the real quadrature component corresponding to the sample of FSK data shown in Figure 5A.

Given the FSK data shown in Figure 5A, the corresponding I- and Q- channel signals are shown in Figure 5B and 5C, respectively. The filtered I- and Q- channel signals are then processed by a pair of differentiator circuits in Figure 4A. Figure 5D shows a waveform representing the time derivative of the real quadrature component corresponding to the sample of FSK data shown in Figure 5A, and Figure 5E shows a waveform representing the time derivative of the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A.

The differentiator outputs are free of DC and allow for AC coupling in the subsequent stages. The differentiator outputs are further amplified to increase their amplitude. The amplified signals are then processed by the circuit in Figure 4B for zero angular speed detection.

In Figure 4B the differentiated and amplified signals are squared and summed. The circuit shown in Figure 4B is shown in Figure 4A as the zero angular speed detect circuit 570. The embodiment shown in Figure 4B includes squaring circuits 600 and 602, a summation circuit 603, a signal amplitude evaluation circuit 604, a threshold generator circuit 606, and a comparator 608. The squaring circuits 600 and 602 respectively receive the differentiated I(t) and Q(t) signals and produce squares of these differentiated signals. These squared signals are added together in the summation circuit 603 to produce a summation signal. This summation signal is proportional to the square of the modulation amplitude of the received signal and to the square of the transmission frequency of the received signal.

The summation signal is sent to each of the signal amplitude evaluation circuit 604, the threshold generator circuit 606, and the comparator 608. The amplitude evaluation circuit 604 produces an AGC signal based on the output of the summation circuit 603, and sends that AGC signal to the amplifiers 554 and 556. The threshold generator circuit 606 processes the output of the summation circuit 603 to provide a threshold for the comparator 608. The comparator 608 compares the threshold developed by the threshold generator circuit 606 with the signal produced by the summation circuit 603 and produces a toggle signal which drives the flip-flop 572 shown in Figure 4A. Figure 5F shows a waveform representing the square of the time derivative of the real quadrature component corresponding to the sample of FSK data shown in Figure 5A. Figure 5G shows a waveform representing the square of the time derivative of the imaginary quadrature component corresponding to the sample of FSK data shown in Figure 5A. Figure 5H shows a waveform representing the sum of the squares of the time derivative of the imaginary and real quadrature components corresponding to the sample of FSK data shown in Figure 5A, i.e., the square of the instantaneous frequency deviation. A zero instantaneous deviation indicates a change in direction of the FSK data. This is accomplished by a voltage comparator with a threshold determined by a threshold generator circuit in Figure 4B. Since the waveform in Figure 5H is also a representation of the peak deviation most of the time, the threshold can be a low-passed and attenuated version of the waveform in Figure 5H. To avoid the waveform in Figure 5H from clipping or limiting, which may result in lower noise immunity for zero angular speed detection, an AGC voltage can be applied to the amplifiers in Figure 4A. The AGC voltage can be derived by monitoring the waveform in Figure 5H and comparing that to a predetermined reference.

The zero angular speed detector output is then used to toggle a flip-flop in order to restore the transmitted FSK data. Figure 51 shows a waveform representing the received FSK data corresponding to the FSK data shown in Figure 5A.

Prior to proper initialization of the flip-flop there will be a phase ambiguity. In a typical FSK communication system there is typically a preamble of known data pattern preceding the actual data transmission. A frame pattern follows each preamble. The preamble may have a unique pattern that provides the information to initialize the flip-flop. The preamble may be a repeating pattern which does not remove the phase ambiguity, but the end of the preamble or start of the frame pattern are usually unique which allows the flip-flop to be initialized. While the method described above gives an optimal estimation of the peak deviation, other alternatives exist as long as the zero angular speed can be determined. As an example, the squaring circuits can be replaced by a circuit that determines the absolute value of the differentiated and amplified signals. The two outputs are then summed. Figure 5J shows a waveform representing the sum of the magnitudes of the time derivatives of the real and imaginary quadrature components corresponding to the sample of FSK data shown in Figure 5A. As can be seen in Figure 5J, the output is distorted while zero angular speed can still be clearly determined.

Several circuits can be used to implement the differentiator shown in Figure 4A. Figure 6A is a diagram of an operational amplifier known in the prior art that can implement a differentiator. Figure 6B is a diagram of an RC network known in the prior art that can implement a differentiator. Figure 6C is a diagram of a differential bipolar transistor pair that can implement a differentiator.

Several circuits can be used to implement the squaring circuits shown in Figure 4A. In most cases summing can be accomplished by tying the outputs together. These include but are not limited to the circuits shown in Figures 7A-C. Figure 7A is a diagram of a single quadrant squaring circuit using an NPN transistor, Figure 7B is a diagram of a squaring circuit adapted to accept bipolar inputs, and Figure 7C is a diagram of a squaring circuit adapted to sum the real and imaginary signals. As is known, the base-emitter junction of a bipolar transistor, such as that shown in Figure 7A, has a transfer function that can be used to approximate the squaring function. Also, two transistors with differential inputs, such as shown in Figure 7B, can be used to handle bipolar inputs. Summing of the I- and Q- channel signals can be accomplished by sharing the same load resistor as shown in Figure 7C. Similar arrangements can be made for both enhancement mode and depletion mode FETs.

Figure 8 is a diagram of a prior art Gilbert cell configured for differential inputs and differential outputs. A Gilbert cell can be used as a four quadrant multiplier. Squaring can be accomplished by tying together the X- and Y- channel inputs of the Gilbert cell. Since DC is not a concern in this invention, the X- channel and Y- channel inputs can be biased at different DC levels through AC coupling, thereby simplifying the bias circuits. Similarly, summing of I- and Q- channel signals can be accomplished by sharing the load resistor in the Gilbert cell (not shown in Figure 8) .

-IS While the foregoing is a detailed description of the preferred embodiment of the invention, there are many alternative embodiments of the invention that would occur to those skilled in the art and which are within the scope of the present invention. Accordingly, the present invention is to be determined by the following claims.

Claims

1. An apparatus for direct conversion of FSK signals containing information, comprising: a receiving circuit to receive the FSK signals and to produce quadrature signals corresponding to the FSK signals therefrom; a differentiating circuit to differentiate the quadrature signals; a combining circuit to combine the quadrature signals and produce a phase signal therefrom, the phase signal having a phase signal velocity; a phase analysis circuit to analyze the phase signal and to produce a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero; and a velocity analysis circuit to analyze the zero velocity signal and produce the information contained in the FSK signals.

2. The apparatus of claim 1, wherein the differentiating circuit includes an operational amplifier.

3. The apparatus of claim 1, wherein the differentiating circuit includes an RC network.

4. The apparatus of claim 1, wherein the differentiating circuit includes a differential bipolar transistor pair.

5. The apparatus of claim 4, wherein the differential bipolar transistor pair is made from enhanced mode MOS FET transistors.

6. The apparatus of claim 4, wherein the differential bipolar transistor pair is made from depletion mode MOS FET transistors,

7. The apparatus of claim 1, wherein the combining circuit includes a circuit for differentiating the quadrature signals.

8. The apparatus of claim 7, wherein the combining circuit includes a circuit for squaring the differentiated quadrature signals .

9. The apparatus of claim 7, wherein the combining circuit includes a circuit for adding the squared differentiated quadrature signals.

10. The apparatus of claim 7, wherein the combining circuit includes a circuit for adding the magnitudes of the differentiated quadrature signals.

11. The apparatus of claim 1, wherein the velocity analysis circuit compares the zero velocity signal to a threshold to determine whether the velocity of the phase signal substantially equals zero and to toggle a signal, signifying a change in the FSK signal.

12. The apparatus of claim 11, wherein the velocity analysis circuit includes a phase ambiguity resolution circuit to resolve any ambiguities in the phase signal.

13. A method for direct conversion of FSK signals containing information, comprising the steps of: a) receiving the FSK signals and producing quadrature signals corresponding to the FSK signals therefrom; b) differentiating the quadrature signals; c) combining the quadrature signals and producing a phase signal therefrom, the phase signal having a phase signal velocity; d) analyzing the phase signal and producing a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero; and e) analyzing the zero velocity signal and producing the information contained in the FSK signals.

14. The method of claim 13, wherein step b) is performed by means including an operational amplifier.

15. The method of claim 13, wherein step b) is performed by means including an RC network.

16. The method of claim 13, wherein step b) is performed by means including a differential bipolar transistor pair.

17. The method of claim 13, wherein step b) is performed by means of a differential bipolar transistor pair including enhanced mode MOS FET transistors.

18. The method of claim 13, wherein step b) is performed by means of a differential bipolar transistor pair including depletion mode MOS FET transistors.

19. The method of claim 13, wherein step c) is performed by means of a circuit for differentiating the quadrature signals.

20. The method of claim 13, wherein step c) includes squaring the differentiated quadrature signals.

21. The method of claim 20, wherein step c) includes adding the squared differentiated quadrature signals.

22. The method of claim 13, wherein step c) includes adding the magnitudes of the differentiated quadrature signals.

23. The method of claim 13, wherein step d) includes compares the zero velocity signal to a threshold to determine whether the velocity of the phase signal substantially equals zero and to toggling a signal, signifying a change in the FSK signal.

24. The method of claim 23, wherein step d) includes resolving any ambiguities in the phase signal.

25. An apparatus for direct conversion of FSK signals containing information, comprising: means for receiving the FSK signals and producing quadrature signals corresponding to the FSK signals therefrom; means for differentiating the quadrature signals; means for combining the quadrature signals and producing a phase signal therefrom, the phase signal having a phase signal velocity; means for analyzing the phase signal and for producing a zero velocity signal that signifies when the velocity of the phase signal substantially equals zero; and means for analyzing the zero velocity signal and for producing the information contained in the FSK signals.