WO2001035608A9 - Method and apparatus for mitigation of disturbers in communication systems - Google Patents

Abstract

The present invention provides a system and method for compensating for cross-talk interference in communication systems. The compensation method consists of the following main phases: training time (210), identification (220), system design (230), and data transmission time (240). During training time (210), Time Domain Equalizer training (212) and Frequency Domain Equalizer training (214) are performed. Following the training time (210), the identification phase (220) encompasses the detection of existing disturbers and the estimation of their associated transmission parameters. The system design phase (230) entails the actual iterative design of several components of a compensator module. Lastly, the data transmission time phase (240) encompasses compensation of the Pulse Amplitude Modulated disturbance signals and final detection of the Discrete Multi Tone signal in the Pulse Amplitude Modulated compensated environment.

Description

METHOD AND APPARATUS FOR MITIGATION OF DISTURBERS IN COMMUNICATION SYSTEMS

This application claims the benefit of the filing date of the following Provisional U.S. Patent Applications:

"IMPROVEMENTS IN EQUALIZATION AND DETECTION FOR SPUTTERLESS MODEM OPERATIONS", application number 60/165,244, filed November 11, 1999; "CROSS-TALK REDUCTION IN MULTI-LINE DIGITAL COMMUNICATION SYSTEMS", application number 60/164,972, filed November 11, 1999; "CROSS-TALK REDUCTION IN MULTI-LINE DIGITAL COMMUNICATION SYSTEMS", application number 60/170,005, filed December 9, 1999; "USE OF UNCERTAINTY IN PHYSICAL LAYER SIGNAL PROCESSING IN COMMUNICATIONS", application number 60/165,399, filed November 11, 1999; "CROSS-TALK REDUCTION AND COMPENSATION", application number 60/186,701, filed March 3, 2000;

"BLIND METHOD OF ONLINE COMPENSATION FOR INTERNAL CABLE BINDER IMPAIRMENTS", application number 60/215,514, filed June 30, 2000; "FREQUENCY DOMAIN CROSS-TALK COMPENSATION METHOD", application number 60/215,633, filed June 30, 2000; and

"TIME DOMAIN CROSS-TALK COMPENSATION METHOD", application number 60/215,637, filed on June 30, 2000. BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention pertains to the field of communication systems. More specifically, the present invention relates to a method and apparatus for mitigating disturbers in communication systems.

2. Background Information

The speed at which data is transmitted or received in digital communication systems is significantly impaired by the level of background noise, impulse noise, cross-talk interference, ingress noise coming from appliances, AM radio, and other communication devices.

For example, in Digital Subscriber Line (DSL) configurations, cross-talk interference arises from electromagnetic coupling of physically proximate channels. In DSLsystems, a data signal running along a telephone wire may be diminished by the noise that is injected by the other signals running on adjacent wires. The cross-coupling between two channels can create a highly correlated noise source that can degrade the performance of the transceiver and, in severe instances, completely disable the main communication channel. Cross-talk interference degrades the signal-to-noise ratio (SNR) of a data signal. Cross-talk interference may also shorten the distance the signal can be received reliably, i.e., it may limit loop reach. Additionally, cross-talk interference limits the bit rate for a given maximum allowable transmit power. Such limitations may lower the number of users for a particular system and may limit the deployment of communication systems in certain regions.

When analyzing a single line in a network system, the cross-talk from adjacent lines is considered a disturber or noise. If a modem operating on an impaired line has access to the disturber, it may be able to cancel the interference through adaptive filtering techniques. Such measurements, however, are not always possible due to the lack of physical proximity of modems within a network.

Other factors that influence the data transmission through a network are: the large number of network users, the large amount of data collected from the deployed lines, and the presernce of competing providers in the same physical line plant. The coexistence of I ECs (Incumbent Local Exchange Carriers) and CLECs (Competitive Local Exchange Carriers) in the same cable binders, brought about by the federally mandated deregulation of local telecommunication markets, implies that services deployed by one carrier may be disturbing the users of another carrier, who has no information about the source of this disturbance.

Thus, it is highly desirable to sort through the collected data and determine whether a specific line is being disturbed by external interference and whether that offending service belongs to the same carrier or not. Specifically, it is necessary to diagnose where the crosstalk problems are originating, predict how cross-talk affects services, and optimize the use of the system based on these predictions.

SUMMARY OF THE INVENTION

The present invention includes a method and system for compensating for cross-talk interference in communication systems. The method includes determining an estimation of at least one interfering signal and performing a compensation operation on the at least one interfering signal.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention is illustrated by way of example and not limitation in the accompanying figures in which:

Figure 1 illustrates a simplified diagram of an exemplary communication network;

Figure 2 illustrates a flow diagram of an interference compensation method according to one embodiment of the present invention;

Figure 3 illustrates a block diagram of one embodiment of a system implementing the compensation method illustrated in Figure 2;

Figure 4 illustrates a flow diagram of a method of generating a transmitted signal according to another embodiment of the present invention;

Figure 5 illustrates a flow diagram of an exemplary transmission path of the received signal;

Figure 6. illustrates a block diagram of a compensation architecture according to one embodiment of the present invention; Figure 7 illustrates a flow diagram of a successive signal cancellation scheme according to one embodiment of the present invention;

Figure 8 illustrates a flow diagram of a method for determining a compensated signal- to-noise ratio according to yet another embodiment of the present invention;

Figure 9 illustrates a flow diagram of a bit loading method according to yet another embodiment of the present invention;

Figure 10 illustrates a flow diagram of an aggregation method according to the concepts of the present invention;

Figure 11 illustrates a block diagram of a joint viterbi design according to yet another embodiment of the present invention;

Figure 12 illustrates a flow diagram of a viterbi equalizer design procedure according to the concepts of the present invention;

Figure 13 illustrates a successive cancellation architecture of disturber signals of one embodiment of the present invention; Figure 14 illustrates a MMSE VEQ design scheme for detecting multiple disturbers, according to yet another embodiment of the present invention;

Figure 15 illustrates another embodiment of the present invention where the compensation method is applied to a system with uncertainty;

Figure 16 illustrates a single user DFE design according to the concepts of the present invention;

Figure 17 illustrates a joint MIMO DFE design according to the concepts of the present invention;

Figure 18 illustrates a first pass DMT removal procedure according to the concepts of the present invention;

Figure 19 illustrates an embodiment of a possible architecture of a disturber remodulation and removal module;

Figure 20 illustrates a block diagram of a direct adaptation method according to the concepts of the present invention; Figure 21 illustrates a block diagram of a indirect adaptation method according to the concepts of the present invention;

Figure 22 illustrates an exemplary embodiment of a direct adaptation mechanism according to the concepts of the present invention;

Figure 23 illustrates an exemplary communication system; and

Figure 24 illustrates an exemplary embodiment of the present invention as implemented in a DSL system.

DFT An F.n DESCRIPTION

A method and system for mitigation of disturbers in communication systems is disclosed. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be evident, however, to one skilled in the art that the present invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present invention. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical, electrical and other changes may be made without departing from the scope of the present invention.

Some portions of the detailed descriptions that follow are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self- consistent sequence of acts leading to a desired result. The acts are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

It should be bome in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the following discussion, it is appreciated that throughout the description, discussions utilizing terms such as "processing" or "computing" or "calculating" or "determining" or "displaying" or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices.

The present invention can be implemented by an apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general purpose digital signal processor computer, selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), EPROMs, EEPROMs, magnetic or optical cards, or any type of media suitable for storing electronic instructions, and each coupled to a computer system bus. The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method. For example, any of the methods according to the present invention can be implemented in hard-wired circuitry, by programming a general purpose processor or by any combination of hardware and software. One of skill in the art will immediately appreciate that the invention can be practiced with computer system configurations other than those described below, including hand-held devices, multiprocessor systems, FPGAs or other hardware platforms, microprocessor-based or programmable consumer electronics, network PCs, minicomputers, mainframe computers, and the like. The invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. The required structure for a variety of these systems will appear from the description below.

The methods of the invention may be implemented using computer software. If written in a programming language conforming to a recognized standard, sequences of instructions designed to implement the methods can be compiled for execution on a variety of hardware platforms and for interface to a variety of operating systems. In addition, the present invention is not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the invention as described herein. Furthermore, it is common in the art to speak of software, in one form or another (e.g., program, procedure, application...), as taking an action or causing a result. Such expressions are merely a shorthand way of saying that execution of the software by a computer causes the processor of the computer to perform an action or produce a result.

Overview of General Communication Network

The present invention is applicable to a variety of communication systems, for example: wireline, wireless, cable, and optical. Figure 23 illustrates an exemplary communication system 2305 that may benefit from the present invention. The backbone network 2320 is generally accessed by a user through a multitude of access multiplexers 2330 such as: base stations, DSLAMs (DSL Access Mulitplexers), or switchboards. The access multiplexers 2330 communicate management data with a Network Access Management System (NAMS) 2310. The NAMS 2310 includes several management agents 2315 which are responsible for monitoring traffic patterns, transmission lines status, etc. Further, the access multiplexers 2330 communicate with the network users. The user equipment 2340 exchanges user information, such as user data and management data, with the access multiplexer 2330 in a downstream and upstream fashion. The upstream data transmission is initiated at the user equipment 2340 such that the user data is transmitted from the user equipment 40 to the access multiplexer 2330. Conversely, the downstream data is transmitted from the access multiplexer 2330 to the user equipment 2340. User equipment 2340 may consist of various types of receivers that contain modems such as: cable modems, DSL modems, and wireless modems. The invention described herein provides a method and system for managing the upstream and downstream data in a communication system. As such, the present invention provides management agents that may be implemented in the NAMS 2310, the access multiplexers 2330, and/or the user equipment 2340. One example of such a management agent is a system software module 2370 that may be embedded in the NAMS 2310. Another management agent that manages the data in the communication system 2305 is a transceiver software module 2360 that may be embedded in the access multiplexer 2330 and/or the user equipment 2340. Further details of the operation of modules 2370 and 2360 are described below.

For illustration purposes and in order not to obscure the present invention, an example of a communication system that may implement the present invention is a DSL communication system. As such, the following discussion, including Figure 23 and Figure 24, is useful to provide a general overview of the present invention and how the invention interacts with the architecture of the DSL system. Overview of DSL Example

The present invention may be implemented in software modules or hardware that DSL equipment manufacturers may then embed in their hardware. Thus, although Figure 24 illustrates the present invention as software, the present invention should not be limited thereto. It should also be noted that this patent application may only describe a portion or portions of the entire inventive system and that other portions are described in co-pending patent applications filed on even date herewith. Figure 24 illustrates an exemplary embodiment of the present invention as implemented in a DSL system. The DSL system consists of a network of components starting from the Network Management System (NMS) 2410 all the way down to the Customer Premise Equipment (CPE) 2450. The following is a brief description of how these components are interconnected.

The Network Management System (NMS) 2410 is a very high level component that monitors and controls various aspects of the DSL system through an Element Management System (EMS) 2420. The NMS 2410 may be connected to several Central Offices (CO) 2430 through any number of EMSs 2420. The EMS 2420 effectively distributes the control information from the NMS 2410 to the DSL Access Multiplexers (DSLAMs) 2433 and forwards to the NMS 2410 network performance or network status indicia from the DSLAMs 2433. DSLAMs 2433 reside in a Central Office (CO) 2430, usually of a telecommunications company. Alternatively, DSLAMs 2433 may reside in remote enclosures called Digital Loop Carriers (DLC). The CO 2430 may have tens or hundreds of DSLAMs 2433 and control modules (CM) 2432. A DSLAM 3033 operates as a distributor of DSL service and includes line cards 2435 and 2436 that contain CO modems. The CO modems are connected to at least one line 2445, but more frequently it contains several line cards 2435 and 2436 that are connected to several lines 2445. Usually the lines 2445 are traditional phone lines that consist of twisted wire pairs and there may be multiple lines 2445 in a binder 2440 and multiple binders in a cable. The transmission cables act as packaging and protection for the lines 2445 until the lines 2445 reach the Customer Premise Equipment (CPE) 2450. It should be noted that a DSLAM 2435 does not necessarily have to be connected to lines 2445 in a single binder 2440 and may be connected to lines in multiple binders 2440. The lines 2445 terminate at the CPE 2450 in transceivers that include CPE modems. The CPE 2450 may be part of or connected to residential equipment, for example a personal computer, and/or business equipment, for example a computer system network.

As discussed in the background section, communications systems often suffer from interference and/or impairments such as crosstalk, AM radio, power ingress noise, thermal variations, and or other "noise" disturbers. The present invention or portions of the present invention provide the user the capability to analyze, diagnose and/or compensate for these interferences and/or impairments. It also provides the ability to predict and optimize performance of the communication system in the face of impairments.

As illustrated in Figure 24, the transceiver software of the present invention 2460, depending upon how implemented, may provide the user with the ability to analyze, diagnose, and compensate for the interference and/or impairment patterns that may affect their line.

Also as illustrated in Figure 24, the system software 2470, depending upon how implemented, may provide the service provider with the ability to diagnose, analyze, and compensate for the interference and/or impairment patterns that may affect the service they are providing on a particular line. The diagnosis and analysis of the transceiver software also provide the ability to monitor other transmission lines that are not connected to the DSLAMs or NMS but share the same binders.

It should be noted that the system software 2470 may be implemented in whole or in part on the NMS 2410 and/or EMS 2420 depending upon the preference of the particular service provider. Likewise, it should be noted that the transceiver software of the present invention 2460 may be implemented in whole or in part on the DSLAM 2433 and/or transceivers of CPE 2450 depending upon the preference of the particular user. Thus, the particular implementation of the present invention may vary, and depending upon how implemented, may provide a variety of different benefits to the user and/or service provider.

It should also be noted that the system software 2470 and the transceiver software of the present invention 2460 may operate separately or may operate in conjunction with one another for improved benefits. As such, the transceiver software of the present invention 2460 may provide diagnostic assistance to the system software 2470. Additionally, the system software 2470 may provide compensation assistance to the transceiver software of the present invention 2460.

Thus, given the implementation of the present invention with respect to the DSL system example of Figure 24, one of ordinary skill in the communications art would understand how the present invention may also be implemented in other communications systems, for example: wireline, wireless, cable, optical, and other communication systems. Further details of the present invention are provided below. Additional examples of how the present invention may be implemented in a DSL system are also provided below for illustrative purposes.

The present invention includes a method and apparatus for improving the quality of a digital signal on a main transmission line of a communication system by identifying the external disturbance signal and applying an opposite signal to compensate for the effect of the interference. It will be appreciated that the compensation method disclosed herein may be used in various digital communication systems, such as: DSL, wireless, wireline, optical, or cable systems. However, the applicability of the present invention is not limited to such systems. Figure 1 illustrates a typical DSL network that may benefit from the cross-talk compensation method disclosed herein. The DSL network illustrated in Figure 1 consists of a Central Office (CO) 110 that is responsible for the management of the DSL system and provides services to the Customer Premises (CPE) 120. The CPE 120 consists of modems which contain DSL transceivers 120 responsible for 2-way transmission between the CPE lines and CO 110. It should be noted that the compensation method disclosed herein may be used at the transceiver level in any chip set that is directly connected to the signal line. Thus, DSL transceivers 120 that receive a disturbed signal may compensate for the cross-talk interference by using the present invention.

For illustration purposes, the following description depicts an example of a main transmission channel that is impaired by one or more disturbers, chosen to be controlled by an Asymmetric DSL (ADSL) modem. An ADSL channel may be characterized as a Discrete Multi Tone (DMT) channel. Using the cross-talk compensation method disclosed herein, disturbers that may be attenuated include, but they are not limited to: TI, El, ISDN, or other DSL lines. These disturbers may be characterized as Pulse Amplitude Modulated (PAM) signals. It will be appreciated that the present invention also applies to disturbers that employ other modulation schemes such as QAM (Quadrature Amplitude Modulation), CAP, etc. Overview of the Compensation Method Figure 2 illustrates a flow diagram of the compensation method according to one embodiment of the present invention. The compensation method consists of the following main steps: training time 210, identification 220, system design 230, and data transmission time 240. The initial channel training time 210 is performed after the modem is powered up at step 200, as part of normal transceiver operation. During training time 210, Time Domain Equalizer (TEQ) training 212 and Frequency Domain Equalizer (FEQ) training 214 are performed, i.e., adaptation of the TEQ and FEQ parameters. Training time 210 further encompasses the estimation of the DMT signal and of the SNR of each frequency slot (bin) of the DMT signal. Following the training time 210, the identification phase 220 encompasses the detection of existing disturbers and the estimation of their associated transmission parameters. For example, during the identification phase 220, the active disturbers are detected at step 222 and their baud-rate determination 224 is performed. Additionally, an initial estimation of the co-channel impulse responses 226 is performed. More detailed descriptions of the training phase 210 and identification phase 220 are described in co-pending Patent Application Serial No.( ), filed on even date herewith, entitled " ", assigned to the assignee herein.

The system design phase 230 of the compensation method entails the actual iterative design of several components of a compensator module. The compensator module of the present invention may be located in a transceiver or in access multiplexers as illustrated in Figure 23 and Figure 24. Given the channel information from the Identification phase 220, a bit loading determination is performed at step 232. The bit loading is determined in order to achieve an acceptable first-pass DMT error rate and produce the desired bit rate or margin improvement. At step 234, a Viterbi Equalizer (VEQ) filter is designed in order to shorten the co-channel length and improve the SNR of the disturber signal. Next, at step 236, a Viterbi computational method is performed to detect the PAM disturber symbols. The PAM symbols detection is necessary for a more accurate data-aided final estimation 238 of other co-channels.

Lastly, the data transmission time phase 240 encompasses compensation of the PAM disturbance and final detection of the DMT signal in the PAM compensated environment. At step 242, a first-pass DMT receiver operation is performed. At step 244, during the PAM receiver and compensator phase, the adaptive VEQ processing and compensation of the detected PAM signal are performed. At step 246, the parameter adaptation is performed. A more detailed description of the transmission time phase 240 is described later below.

Figure 3 illustrates a block diagram of a system implementing the compensation method illustrated in Figure 2. The received signal y(t) 310 is first processed in a standard receiver 300. The signal y(t) 310 is first passed through an AD converter 315 and then it is filtered through a time domain equalizer (TEQ) 320. The output of the filter 320 is later utilized by the compensation module 350. The received signal is further processed with a prefix strip and Fast Fourier Transforms (FFT) 330. The signal is then filtered through a frequency domain equalizer (FEQ) 340. It will be appreciated that the operation of a standard communication receiver is well known by a person of ordinary skill in the art and, thus, further details of a receiver operation will not be described herein.

The compensation module 350 receives the initial co-channel estimations from the Identification Module 360 and the processed received signal from the standard receiver 300 and estimates a sequence of the disturber symbols for each of the disturbers that are chosen to be compensated. Then, this estimate of the disturber signal is subtracted from the main signal and the resulting compensated signal is passed on to the QAM decoder 362. The operation of the compensation module 350 is illustrated in Figure 10, Figure 11, and Figure 12. Further, the compensation module 350 estimates a compensated SNR of the received signal which is necessary in determining the compensated bit loading performed by the bit loading module 370. The methods of determining the compensated SNR and the bit loading are later described with reference to Figure 8 and Figure 9. Finally, the signal is processed by a QAM (Quadrature Amplitude Modulation) decoder or slicer 362 in order to obtain the compensated main channel symbols q(n) 385.

It should be noted that Figure 3 is meant to be illustrative and not limiting of the present invention. As such, other configuration may be used and other systems exhibiting interference and/or impairment problems may also benefit form the use of the present invention.

Received Signal Model

The signal received at the transceiver consists of a large number of components originating from the original DMT signal, the interference PAM signals, and noise. The received continuous time signal y(t) is represented by equation (1):

y( - yjm_t ) + ypam t) + v( r) , (1) where y_dmt(t) denotes the received DMT signal, y_pam denotes the received PAM signal and

v(t) denotes un-modeled noise.

1. DMT Signal Generation

Figure 4 illustrates a flow diagram of how the transmitted DMT signal is generated. It should be noted that the use of a DMT signal in conjunction with the present invention is only an example and the present invention may also be used with other types of signals. Block 410 represents the mapping process of the transmitted DMT signal b(n) 405 from bits to Quadrature Amplitude Modulation (QAM) symbols. At block 420, the output signal 415 of block 410 is then converted from a serial to a parallel configuration. For example, in one embodiment, the vectors are created of length 512, equal to the length of the DMT symbol. This operation is performed by selecting 223 elements out of 255 elements of the signal 415, prefixing them with 32 zeros, and conjugate them symmetrically, thus, extending the vector to 512 elements as shown in equation (2):

q(ή) = [0, ..., 0,q(223n),q(223n + l), ..., ?(223/ι + 222), Q,q * (223n + 222) , ...,$* (223/t),0, ...0]

(2)

At blocks 430 and 440, the vector q( n) 425 is then processed by a diagonal gain

matrix G and an IFFT (Inverse Fast Fourier Transform) matrix F, respectively. The

resulting signal x(n) 445 is given by equation (3):

where the diagonal gain matrix G is given by equation (4): G=diag{0,...,0,g(0),...,g(223),0,g*(223),...,g*(0),0,...,0}

(4)

and the IFFT matrix F is given by equation (5):

where N = 512. Finally, at block 450, a prefix of 32 samples is added to signal x(n) 445,

resulting in the final transmitted vector s(n) 455 given by equation (6):

where

07, π, = ^[32 x32

512x512

where / denotes the identity matrix. Finally, vector s (.1)455 is converted from parallel to

serial resulting in the scalar transmitted signal s( nN + k) = { s ( n) } _k.

Figure 5 illustrates the transmission path of the signal s ( n) 455 through the

modulating pulse 510, main channel response 520, and receiver filters such as analog front

end filter 530. Thus, the received continuous time signal y_mt(X) is given by equation (7):

where h(t) is the combined filter impulse response of blocks 510, 520, and 530. In one

embodiment of the present invention, ^Tdm = 1>( 2- 208x 10⁶) sec. Finally, the received

continuous time signal ydmfS) is sampled through the A/D converter at block 540, resulting in

the signal y_dmtfa) 45 given by equation (8):

")

where h(n) is given by equation (9):

h(n) = h(t) ._nT

2. PAM Disturber Signal Model

The continuous time PAM disturber signal is given by equation (10):

ypam(t) = ∑; _{= 1})'_;( _^

where J denotes the number of disturbers that are explicitly modeled in the received signal.

Each individual PAM signal y t) is given by equation (11):

y_jtt) = IΣ— ' (*) _j«-kT_j) _{^ (U)}

where S_j k) denotes the transmitted PAM sequence of the j-th disturber through an overall

co-channel response h_j( t) and with symbol period T_j. The sampled signal y_pa n) at the receiver is given by equation (12):

ypamin) =ypam( )\_{t = nTdmt}=-?_j ^J _{= l}y_j n)

• O4)

where y n) is given by equation (13):

y_j( ») = ∑ = — SJ( *) _j(nT_dmt - kT_j)

In one embodiment of the present invention, the baud period Tj of each PAM disturber is assumed to be an integer multiple of the DMT baud period, i.e., T_j = P_jT_dmt ,

wherein Pj denotes an integer over-sampling factor. Hence the equation (13) becomes:

where h n) is given by equation (15):

h_j(n) =h_j t)\_t^nT ^ld (15)

It should be noted that if the baud period Tj of each PAM disturber is not an integer multiple of the DMT baud period, the signal is resampled at a multiple of the PAM disturber baud rate.

3. Noise Signal Generation

The sampled noise signal is given by equation (16):

v( vn) > =v( vr) ' t_-n „_τT_dml/ iPp

General Compensation Architecture Figure 6 illustrates a block diagram of the compensation architecture according to one embodiment of the present invention. In one embodiment and for ease of explanation, the compensation architecture includes four design modules: the standard receiver module 600, the DMT removal module 660, the disturber symbol detection module 670, and the PAM remodulation and removal module 680. The discrete time signal y(n) 610 is first received at the standard receiver block 600. The received signal 610 is first passed through the TEQ 620 resulting in the filtered signal y,_eq(n) 642 . At block 630, the signal is further processed with a prefix strip and Fast Fourier Transform (FFT). The signal is then filtered through the FEQ 640, resulting in signal q\(n) 644.

1. DMT Removal Module

Since, in this embodiment, the channel identification operations are performed after the TEQ and FEQ training, the DMT signal has to be removed in order to obtain the aggregated disturbance signal.

The purpose of the DMT removal is to extract as much of the DMT component from the received signal as possible, to produce a signal y^, 665 which consists mainly of cross¬

talk disturbance. This cross-talk disturbance signal can then be used to detect the disturber symbols s(k) 675.

The first step in the DMT removal is an initial (1^st Pass) detection on the DMT symbols, as indicated by the slicer function 662. The 1^st pass detection produces 256 symbols which are conjugated and modulated back into the time domain using an IFFT. It should be noted that, in one example, the IFFT results in a real vector of 512 points, 32 points less than a frame of the received vector y(n) 610. This loss of information is due to the cyclic prefix stripping operation 630 that occurs in the standard receiver block 600. At block 664, after the remodulation operation, this cyclic prefix is added back to the vector, and the

time vector then filtered through the equalized main channel h_uq . The resulting signal 666 is

then subtracted from the TEQ filtered signal yτ_Eθ(n) 642 to form signal ^.(n), the 1^st pass

estimation of the disturbance signal:

λ-n- (») = y-π-Q (») - 5 (») (17)

A more detailed description of a DMT removal procedure is described below in the "System Transmission Time Phase" portion of the present application and, in particular, in the section entitled "DMT Removal".

2. Disturber Symbol Detection Module

The output vector y^ (n) 665 from the DMT Removal module 660 is then passed to

the VEQ 672 and Joint Viterbi Algorithm 674, resulting in a vector estimate 675 of the disturber symbols s(n). The VEQ is an FIR filter that .preconditions the vector y^, (n)665,

shortens the co-channels, and improves the SNR of the disturber signal. The Joint Viterbi Algorithm 674 processes the received vector for multiple disturbance symbols simultaneously by using a search routine based on the maximum likelihood function. In another embodiment of the present invention, the disturber symbols may be detected using a Multiple Input Multiple Output DFE (Decision Feedback Equalizer). This embodiment will be described below in the section entitled "Alternative to VEQ Design".

3. PAM Remodulation and Removal The compensation vector is constructed by modulating the detected set of disturber symbols s(k) 675 through the co-channel models, converting this signal to the frequency

domain using FFT, and applying the FEQ scaling. The compensation vector is then

subtracted from the original vector q_{(n)644, as illustrated in Figure 6. The resulting signal

q₂(n) 685 represents the compensated received signal. A more detailed description of the PAM remodulation and removal module is described below in the "System Transmission Time Phase" portion of the present application and , in particular, the section entitled "PAM Remodulation and Removal".

In a successive cancellation architecture of one embodiment of the present invention, signal qι( ) 685 is passed through a second sheer (2^nd pass) in order to get the compensated DMT symbols. Figure 7 illustrates a successive cancellation compensator architecture. The received, uncompensated signal y(k) 700 is first detected by a DMT receiver 710 and then it is remodulated by a DMT remodulator 720 (first pass detection). The resulting signal 713 is subtracted from the signal 717, which represents the original signal y(k) delayed by a delay 715. The resulting disturbance signal is then detected by a PAM receiver 730, remodulated by a PAM remodulator 740, and subtracted from the delayed received signal 737. The resulting DMT signal is again detected by a DMT receiver 750 and remodulated by a DMT remodulator 760 (second pass detection). As such, using a successive cancellation scheme the final DMT symbols 770 are detected. It will be appreciated that the successive cancellation scheme disclosed herein may be used with both time domain remodulation and frequency domain remodulation. Further, other cancellation schemes may be used to detect the DMT symbols, such as: joint detection of the PAM and DMT symbols or frequency domain subspace cancellation.

System Design Phase

1. Determination of Bit-Loading Parameters

The effectiveness of the compensation method disclosed herein is negatively affected as the rate of the first-pass DMT errors increases. Thus, a certain bit loading rate needs to be determined to yield an acceptable first-pass DMT error rate and, at the same time, produce the desired bit rate or margin improvement. Thus, a method for computing the bit loading and gains to be used in a cross-talk compensation architecture is disclosed.

The method disclosed herein satisfies both the first-pass and second-pass requirements. Since the second-pass requirements depend on the compensated SNR, that SNR has to be computed before the transceiver goes into data transmission operation. However, in one embodiment of the present invention, compensation does not occur until transmission time. Thus, in this embodiment, the compensated SNR must be predicted before compensation takes place using the SNR of the PAM receiver as the reference point. In order to determine the compensated SNR, the amount of energy of the PAM disturbers that may be removed by the compensation method disclosed herein must be predicted.

Compensated SNR Computation In one embodiment of the present invention, during the training phase of the

compensation method, the uncompensated per-bin SNR S, at the output of the first-pass

DMT receiver is first determined. Further, D'" , the Power Spectral Density (PSD) of the

total noise at the first-pass DMT receiver, and the PSD of each PAM disturbers to be compensated for, are also determined. The total PSD of the compensated and uncompensated disturbers is then determined using equations (18) and (19):

_nPAM ^ ryPAM

Uc - ( 19) compensated rrPAM Ur Y D?^AM uncompensated (18)

where D denotes the PSD of the PAM disturbers to be compensated for

andD/*** denotes the PSD of the remaining PAM disturbers (not compensated). The sum

D^PAM of the PSDs of the PAM disturbers is then calculated using equation (20):

_nPAM _ _nPAM , r.PAM

D - De +D_r (20)

The PSD of the white noise D„ is thus given by equation (21):

n - n^tot - n^PAM For a computed compensated SNR S₂ , the corresponding compensated bit loading b₂

for each bin is given by equation (22):

wherein f denotes a user-defined parameter based on a desired bit error rate.

This bit loading will result in first-pass DMT errors with a probability P_e ^DMTι that is approximated by equation (23):

The PSD of the first-pass DMT errors D_e D^UMT \ is therefore given by equation (24):

_DDMT _{= p}DUT _{D DMT = p} DMT _{SιD[ot (} ^

Thus, the total noise at the input of the PAM receiver D„^PΛM is given by equation (25):

Dζ^AM = D™^T* + D? ^M + D_n (25)

The (scalar) SNR S_p of the PAM receiver is then computed as the ratio of the total power of the compensated PAM disturbers W_C ^PAM over the total power of the noise at the input of the PAM receiver W_n ^PAM , which is illustrated in equation (26):

W_C ^PAM J (l-ι . til-)

Sn =

_WPAM Dc°^AM(ω)dθ, w£^AM= ~Dn°^AM(ω)W(ω)dω (26) ω, J ω, where the integration of the PSDs takes place over the frequency interval (ωl, ω2) where

the compensated PAM disturber PSD is nonzero, and W(ω) denotes a weighting function that accounts for the fact that the PAM receiver has different noise sensitivity in different parts of the PAM spectrum.

Utilizing the SNR determined in equation (26), the probability of error of the PAM receiver (for 2B1Q disturbers) is approximated by the equation (27):

s ng the pro ab ty o error ound in equation (27), the PSD of the compensated PAM disturber that is not removed by compensation by the PSD of the errors made by the PAM receiver is determined by equation (28):

D_e ^PAM = ¥ζ^AM D_C ^PAM (28)

Finally, the corresponding compensated per-bin SNR S₂ is computed using equation

(29):

_DDMT _DDMT

² ~

+ , UnWA- ~ U _nn + , i_r-'.rPAM +. U_nePAM ' '

It should be noted that the compensated SNR5₂ is a vector- valued function in the

case of DMT receivers. Therefore, in order to optimize the search over the values of 5₂ , a

vector-valued search method may be used. In one embodiment of the present invention, a computationally efficient method utilizes the scalar SNR S_p of equation (26) at the input of

the PAM receiver as the argument for the search minimization.

The search method for the values of S₂ is illustrated in Figure 8. At step 810, the

compensated SNR S₂ at the output of the second pass receiver is considered to be equal to

the uncompensated SNR Si at the output of the first-pass receiver. Further, the equations (22)-(26) are evaluated to initialize the PAM SNR S_p . This initial value is the one resulting

from the uncompensated bit loading, and therefore it represents an upper bound for the value

of S_P . At step 820, equations (27)-(29) are evaluated using the current value of S_P . The

resulting value of S₂ from equation (29) is then used to evaluate equations (22)-(26) and

determine the scalar SNR of the PAM receivers/ . If it is found at step 830 thatS,, is larger

than a selected lower bound (for example, -20dB), the value of S_P is reduced and step 820 is

repeated until S_p has reached a lower bound. Finally, at step 840 it is determined that the

predicted compensated SNR S₂ is the one that corresponds to the value of S_p that resulted in

the smallest discrepancy \ S_P -S_p \.

2. Disturber Ranking

In one embodiment of the present invention, the disturbers selected for compensation are the ones deemed to create the most interference. In order to evaluate which are the most offending disturbers, the compensated SNR method illustrated in Figure 8 is run several times in succession, once for each identified disturber. The disturbers are then ranked according to the SNR improvement their removal would produce on the main channel. 3. Bit Loading and Gain Selection

Compensated bit loading

After the disturber ranking procedure is completed, the highest-ranked disturbers are selected for compensation, i.e., the disturbers with the highest compensated SNR. The compensated SNR procedure illustrated in Figure 8 is repeated, this time using the disturbers that are selected for compensation. This produces a predicted compensated SNR 5₂ given

by equation (29) and a corresponding predicted compensated bit loading b2 given by equation (22).

Viterbi limit

In one embodiment of the present invention, the PAM receiver uses a Viterbi maximum-likelihood sequence estimator (MLSE). The compensated SNR method described above does not account for the fact that the performance of the Viterbi MLSE depends

nonlinearly on the first-pass errors an dete orates s gn cant y when the rst-pass DMT bit error rate (BER) is higher than a specific given value. Therefore, a "Viterbi limit" on the compensated bit loading is determined to ensure that the BER is not exceeded. The Viterbi-limited bit loading bv is determined using equation (30):

wherein the IN denotes a threshold based on the desired first-pass DMT bit error rate. Final bit loading

The final bit loading is determined by comparing the predicted compensated bit

loading b₂ given by equation (22) and the Viterbi-limited bit loading given by equation (30)

on a bin-by-bin basis, selecting the smallest of the two for each bin, and then rounding to the

b_{ = [min( b₂. bv) ^{+ 0}-⁵J (31) nearest bin. This can be expressed through equation (31):

where the floor brackets indicate the integer part of the argument, and the minimum operation is performed on a bin-by-bin basis.

Final gain selection

In a bit loading method for a DMT modem, the gain for each bin is chosen so that the resulting SNR will yield the desired BER for the selected bit constellation on this bin. Since the upper bound on the BER is expressed through the parameter T and the SNR before the

gain is denotes as 5, gain g that corresponds to the bit loading b is given by equation (32) :

S = f< 2*- 1) (32)

In one embodiment of the present invention, it is desirable to have the final gain g_f satisfy two conditions. As the first condition, the final gain has to guarantee that with the bit loading selected in equation (31), the BER of the first-pass receiver does not exceed the

* f ≥ * fl - -^( ^' - l) ( 33) Viterbi limit prescribed by T_v . Since the SNR at the first-pass DMT receiver is equal to the

measured uncompensated SNR S, , this condition is expressed by equation (33):

As the second condition, the final gain g_f has to guarantee that with the bit loading selected in (31), the BER of the second-pass receiver does not exceed the limit prescribed by T . Since

the SNR at the second-pass DMT receiver is predicted to be the compensated SNR S₂ , this

condition is expressed by equation (34):

Thus, in this embodiment, the final gain is selected to satisfy both equations (33) and

S f ^≥ S _f2= T< 2*^f - l) ( 34)

(34) and the final gain chosen to be the maximum value of gμ and g_β. Thus, the final gain

g _{ = max ( g_{f l},g _n) ( 35) of this embodiment gf is given by equation (35):

Figure 9 is a flowchart of the compensated SNR and bit loading methods. Using the predetermined inputs 900, the disturbances are first ranked at step 910 in the order of how they affect the bit loading. At step 920, the highest ranked disturbers are selected for compensation and a predicted compensated bit loading D₂942 is determined using the method illustrated in Figure 8. Further, using the uncompensated SNR and the SNR threshold 930, a Viterbi-limited bit loading b_v 944 is determined at step 940. The final bit loading is then determined at step 950 by comparing b₂942 with by 944 on a bin-by-bin basis and selecting the smallest of the two for each bin. Lastly, at step 960, the final gain g_f is determined.

Disturber Receiver Design

1. Constellation Aggregation

. In order to determine the estimates of the disturber symbols s;(n) of cross-talk interference, the joint Viterbi algorithm (JVA) may be used. In one alternative embodiment of the present invention, a MIMO (Multiple Input Multiple Output) DFE (Decision Feedback Equalizer) method may be used as well. A MIMO DFE method is described below with reference to Figures 16 and 17.

The computational load incurred by the JVA makes it difficult to implement when more than two disturbers are present. In order to take advantage of the optimality of the JVA while reducing its complexity, i.e., its number of states, constellation aggregation may be performed. Since it is desirable to identify the combined effect of all the disturbers instead of the contribution of each individual PAM disturber, it is more effective to find an approximated signal constellation set with a much smaller size for all PAM disturbers by minimizing the approximation error or distortion thus introduced. It should be noted that, according to one embodiment of the present invention, constellation aggregation is performed during the design phase of the compensation architecture.

The signal model y(n) of PAM disturbers -.,(/.), i = 1, • • • , M , is given by equation Λ y(») ^β ∑∑*,(*)Aι (» -*). Π^UΛ L, (36) i"ϊ k=\

where M PAM disturbers symbols are all chosen from the same alphabet set of size A , A,.(n) denote the corresponding impulse responses of the Λ-f channels with order L, , and

y(ή) is the summation of M overlapping pulses.

The received signal signatures g_k (n ) and g due to the transmitted PAM symbol at a

given time k, s_t (k) , are given by equations (37a) and (37b):

g_k(n) (37a)

g_k = [g_k(9) - -?* (*^■)]• (37b).

Because the vector [s_x(k) •^■• -._M (jfc)] has N = A^M combinations, g can take one

of N values. With the definition of g_k (n) , equation (36) may be re- written as:

L y(n) = 1 ∑g_k (n- k) . (38) i=0

Next, the aggregated g_k(n) with £_t = [g_t(0) ••• g_k(L)] taking N' values (iV < iv^*)is

determined such that the cost given by equation (39) is minimized.

Similar to y(τ-) , y( ) is defined by equation (40):

Expanding the cost function of equation (39) leads to

where a is a scalar. Assuming that g_k (n - k) ≠ 0 f or n = k, k + 1, • • • , k + L , the above cost

may be expressed by equation (42):

It should be noted that g has N possibilities which can be denoted as a set

G = \ vg____> ⁾ } j— i , where each — g~^ω in the set corresponds to one such possible value. Similarly,

there is an aggregated set G = |g ^U) / and e G . Thus, to minimize the original cost is

equivalent to minimize the following function given by equation (43):

where g _ϊ<Λ ') , r<e,„p,r_e-„s,-e-„nt.so t tkh_e, correspo ~~nΛd:i~ng aggre _.g„a„♦ti__o..n_ c from g U) . Thus, the aggregation

method involves a clustering method which dictates that the optimal cluster centers g are

centroids. Specifically, a point in the original cluster g is given by equation (44)

) _ = L s )

8 (44)

where A, = [A, (0) ••• A₍ (L)] (i = l,-,M).

Thus, the aggregated constellation point with s, (k) = — 1 ∑s,^CΛ> represents the

centroid equivalence given by equation (45):

where s (k) = [?, (k) ••• s_u (k)] and N_k is the number of points in the N -cluster

aggregating to g in the N' -cluster.

Given a set of (initial) centroids g Ϊ. ⁾ , g „</'⁾ m ma„„y k be. a ns,s;ig_mn.eJd f tno » the. . ce..nhtrnoiid,! g Sf *⁾

such that the distance

M ⁰⁾-rf (46) is minimized. Subsequently, based on the current cluster assignment, the centroids given by equation (47) may be recalculated:

It should be noted that the above cluster assignment and centroid recalculation can be processed iteratively until convergence. It will be appreciated that using the aggregation method disclosed herein, the size of constellation may be greatly reduced while the aggregation error is limited within an allowable range. For example, for five 4-PAM

disturbers, the input signal can take one of 4^s = 1024 combinations. However, using the aggregation method disclosed herein, a reduced constellation set of 16 points may be obtained with only minimal power lost. It should be noted that, according to one alternative embodiment of the present invention, a K-means clustering method may be applied to perform the constellation aggregation.

Figure 10 is a flow diagram of the aggregation method. The inputs 1010 of the

aggregation function are: the (original) constellation Ce R^NxM to be aggregated (C is formed from set S ), the channel impulse response matrix, and the desired constellation size.

During the aggregation process 1020, the aggregated constellation C e R^NxM 1030 are

generated from set S and the percentage of distortion introduced due to the aggregation process is determined. 2. VEQ design and Channel Shortening

As illustrated in Figure 6, the VEQ is an FIR filter that preconditions the vector

y_ώrt(/ι)665 of Figure 6. The VEQ method disclosed herein shortens the co-channels to a

user-selected length so that the joint Viterbi algorithm (JVA) can operate efficiently with a minimum number of computational operations. Furthermore, the VEQ enhances performance of the joint Viterbi, thus increasing SNR at the input.

The JVA 674 processes the received vector for multiple disturbance symbols simultaneously by using a search routine based on the maximum likelihood sequence estimate (MLSE) for a symbol sequence. Typically, the JVA performance may be degraded by additive noise that does not have a flat spectrum, but has significant correlation, thus leading to symbol detection errors. Also, when the symbols are sent through a channel with a long impulse response (i.e., having many taps) the number of operations (multiplications, additions, etc.) required to implement the VA could become prohibitive. This constraint becomes even more problematic in the case of the JVA, when multiple communication paths are decoded simultaneously, since the number of operations grows exponentially with the number of channels. Thus, if either the white noise or short channel length assumption is not satisfied, effective use of the JVA may not be possible. In these cases, pre-filtering, or equalization of the JVA input signal may be necessary. Thus, a method to jointly optimize this filter (or equalizer) design and the JVA path metrics that can approximate optimality conditions and enable a pragmatic JVA implementation is disclosed herein.

Figure 11 illustrates a joint Viterbi algorithm. The symbols to be detected d_l,...,d_m H 5 are passed through the corresponding channels A,,...,A_m 1115. Noise signal z 1120 is added to the output of these channels to produce the signal y 1145 at the receiver.

It should be noted that signal y 1145 may be oversampled, thus improving the effectiveness of the VEQ design.

In general, the noise z 1120 may be comprised of several signal components. When the Viterbi is used for cross-talk compensation for a DMT DSL modem, this noise may consist of colored noise ( A„ * n ) 1135, other disturber channels

( _+ι * ^_m+i + ^{• • •} + _+p * d_m+p ) 1130, and residual tones 1125 that result from first pass

DMT errors. These different sources of noise may be included in the VEQ design in the manner described by equations (23)-(25).

It should be noted that the total noise, including noise signals 1130 and 1135 of Figure 11 , may be modeled by an aggregate source n . The aggregate source n is passed

through a shaping filter A so that the spectrum of the received noise closely matches that

of a particular noise environment. The filter A is chosen to capture the aggregate spectrum of the total noise signal z 1120.

The purpose of the JVA 1160 is to process the received signal y 1145 and decode

the sent symbols, thus producing estimated values d_x,...,d_m 1170. However, when noise

shaping introduced by the channel A is significant, or when the co-channel models A. ,...,Λ_m

1115 have an excessive number of taps, proper functioning of the JVA can be pragmatically prohibitive. VEQ Design

Figure 12 illustrates a VEQ filter design procedure according to one embodiment of the present invention. Step 1210 is the initial set-up phase during which the design parameters are selected. The design parameters include: n_h , the desired channel lengths for

co-channels, n^ , the aggregate (correlated) noise channel, n_w , the VEQ filter length, the

number of disturbers to compensate, and the first-pass DMT error rates and tone magnitudes.

Further, a relative weight βe [θ,l] is selected to allow a design trade-off between

noise whitening and channel shortening. For example, to achieve all noise whitening without shortening co-channels, the relative weight may be set at the value of 1. To shorten co-channels without regard to noise correlation, the relative weight may be selected asβ =0.

Next, channel convolution matrices H_iti - l,..., , and noise correlation filter

matrix, H are formed. It should be noted that these matrices can be formed in either row or column form. In one embodiment of the present invention, these matrices are coded with the channel impulse on the columns, as given by equation (48a):

where each matrix has dimension R "*' "" , where n_h, is the length of the i* co-

channel, and n_w is the specified length of the equalizer.

The co-channels may be normalized as illustrated in equation (48b), so that the effective shortening can be carried out evenly over the co-channels, and the relative weighting β is a more meaningful trade-off parameter.

(48b)

"^> = %.

At step 1220, the viterbi equalizer w is solved using a joint least squares method as illustrated in equation (49). It should be noted that a singular value decomposition method may be used to solve for the equalizer w.

Matrices H_t ^r,i - 1 m, andH^rare the reduced matrices that are derived from

channel convolution matrices H_t,i = l,...,m , and noise correlation matrix, H , by removing n_h - 1 rows and n-r -l rows, respectively, that correspond to the desired windows of co-

channel response. This process is performed for a given pair of delays δ (for the co-

channels) and δ (for the composite noise channel). Equations (50a) and (50b) illustrate the matrix row removal process, according to one embodiment of the present invention.

for i = \,...,m , by stripping out the middle matrices that consist of n_h -1 and n_f -1 rows,

respectively.

In addition, vectors e_δ'_+l are unit vectors of length equal to the number of rows in

H i , with the δ+l element, corresponding to the beginning of the desired window, set to

unity in order normalize the equalized response. Unit vector e_s+l corresponds to the

reduced matrix H^r for the noise channel.

Next, at step 1260, the Least Squares Metric is determined, using equation (51), for any given equalizer w.

^5-

Claims

and δ , and repeating the process of determining the reduced matrices H , i = 1,..., m ,

and H ^r , and computing the VEQ w. If no window position meets desired performance, the

VEQ filter length n_w may be increased, and, as illustrated in Figure 12, steps 1220, 1260,

and 1280 are repeated. If channels are properly shortened, but the remaining correlation in the equalized noise channel is unsatisfactory, the relative weight β may be increased and

steps 1220, 1260, and 1280 are repeated. Similarly, if channels are not shortened enough, the relative weight β may be decreased and the design method may be re-executed.

The method described above performs joint equalization and noise whitening for joint detection of multi-user communication channels. This method produces a linear equalizer that performs the following functions: shortens the co-channels to a desired length, thus reducing the JVA computational requirements, and improves detection accuracy by whitening the additive noise. The method further reduces the effect of residual DMT tones at the input of the Viterbi by attenuating those frequencies where there is high probability of DMT error on a first pass decision, when the JVA is used as part of a crosstalk compensation method. Moreover, this VEQ design method equalizes the co-channels to the same window (in time) to improve SNR at the input and to simplify implementation of the Viterbi detection method.

It should be noted that the VEQ design is set-up in matrix form and the optimal VEQ filter is obtained by solving the least squares method (LSM). However, there are alternate computational methods that may be implemented that utilize an MMSE (Minimum Mean Square Error) formulation. In order to avoid the matrix inversions

-47-