WO2001016740A3 - Efficient event waiting - Google Patents

Efficient event waiting Download PDF

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Publication number
WO2001016740A3
WO2001016740A3 PCT/US2000/024210 US0024210W WO0116740A3 WO 2001016740 A3 WO2001016740 A3 WO 2001016740A3 US 0024210 W US0024210 W US 0024210W WO 0116740 A3 WO0116740 A3 WO 0116740A3
Authority
WO
WIPO (PCT)
Prior art keywords
systems
waiting
event waiting
methods
efficient event
Prior art date
Application number
PCT/US2000/024210
Other languages
French (fr)
Other versions
WO2001016740A2 (en
Inventor
Karlon K West
Original Assignee
Times N Systems Inc
Karlon K West
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Times N Systems Inc, Karlon K West filed Critical Times N Systems Inc
Priority to EP00959824A priority Critical patent/EP1214652A2/en
Priority to CA002382728A priority patent/CA2382728A1/en
Priority to AU71083/00A priority patent/AU7108300A/en
Publication of WO2001016740A2 publication Critical patent/WO2001016740A2/en
Publication of WO2001016740A3 publication Critical patent/WO2001016740A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0284—Multiple user address space allocation, e.g. using different base addresses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/457—Communication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0837—Cache consistency protocols with software control, e.g. non-cacheable data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/52—Indexing scheme relating to G06F9/52
    • G06F2209/523—Mode

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Hardware Redundancy (AREA)
  • Information Transfer Systems (AREA)

Abstract

Methods, systems and devices are described for efficient event waiting. A method includes: waiting for an event lock release including: providing mutually exclusive access primitives to ensure data or resource integrity; recording an intention to wait; and then performing other processing. The methods, systems and devices provide advantages because the speed and scalability of parallel processor systems is enhanced.
PCT/US2000/024210 1999-08-31 2000-08-31 Efficient event waiting WO2001016740A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP00959824A EP1214652A2 (en) 1999-08-31 2000-08-31 Efficient event waiting
CA002382728A CA2382728A1 (en) 1999-08-31 2000-08-31 Efficient event waiting
AU71083/00A AU7108300A (en) 1999-08-31 2000-08-31 Efficient event waiting

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US15215199P 1999-08-31 1999-08-31
US60/152,151 1999-08-31
US60/220,794 2000-07-25
US22097400P 2000-07-26 2000-07-26
US22074800P 2000-07-26 2000-07-26
US60/220,748 2000-07-26

Publications (2)

Publication Number Publication Date
WO2001016740A2 WO2001016740A2 (en) 2001-03-08
WO2001016740A3 true WO2001016740A3 (en) 2001-12-27

Family

ID=27387201

Family Applications (9)

Application Number Title Priority Date Filing Date
PCT/US2000/024039 WO2001016760A1 (en) 1999-08-31 2000-08-31 Switchable shared-memory cluster
PCT/US2000/024147 WO2001016737A2 (en) 1999-08-31 2000-08-31 Cache-coherent shared-memory cluster
PCT/US2000/024248 WO2001016742A2 (en) 1999-08-31 2000-08-31 Network shared memory
PCT/US2000/024217 WO2001016741A2 (en) 1999-08-31 2000-08-31 Semaphore control of shared-memory
PCT/US2000/024329 WO2001016750A2 (en) 1999-08-31 2000-08-31 High-availability, shared-memory cluster
PCT/US2000/024216 WO2001016761A2 (en) 1999-08-31 2000-08-31 Efficient page allocation
PCT/US2000/024150 WO2001016738A2 (en) 1999-08-31 2000-08-31 Efficient page ownership control
PCT/US2000/024298 WO2001016743A2 (en) 1999-08-31 2000-08-31 Shared memory disk
PCT/US2000/024210 WO2001016740A2 (en) 1999-08-31 2000-08-31 Efficient event waiting

Family Applications Before (8)

Application Number Title Priority Date Filing Date
PCT/US2000/024039 WO2001016760A1 (en) 1999-08-31 2000-08-31 Switchable shared-memory cluster
PCT/US2000/024147 WO2001016737A2 (en) 1999-08-31 2000-08-31 Cache-coherent shared-memory cluster
PCT/US2000/024248 WO2001016742A2 (en) 1999-08-31 2000-08-31 Network shared memory
PCT/US2000/024217 WO2001016741A2 (en) 1999-08-31 2000-08-31 Semaphore control of shared-memory
PCT/US2000/024329 WO2001016750A2 (en) 1999-08-31 2000-08-31 High-availability, shared-memory cluster
PCT/US2000/024216 WO2001016761A2 (en) 1999-08-31 2000-08-31 Efficient page allocation
PCT/US2000/024150 WO2001016738A2 (en) 1999-08-31 2000-08-31 Efficient page ownership control
PCT/US2000/024298 WO2001016743A2 (en) 1999-08-31 2000-08-31 Shared memory disk

Country Status (4)

Country Link
EP (3) EP1214651A2 (en)
AU (9) AU7110000A (en)
CA (3) CA2382929A1 (en)
WO (9) WO2001016760A1 (en)

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EP1410148A1 (en) * 2001-07-13 2004-04-21 Koninklijke Philips Electronics N.V. Method of running a media application and a media system with job control
US6920485B2 (en) 2001-10-04 2005-07-19 Hewlett-Packard Development Company, L.P. Packet processing in shared memory multi-computer systems
US6999998B2 (en) 2001-10-04 2006-02-14 Hewlett-Packard Development Company, L.P. Shared memory coupling of network infrastructure devices
US7254745B2 (en) 2002-10-03 2007-08-07 International Business Machines Corporation Diagnostic probe management in data processing systems
JP2008046969A (en) * 2006-08-18 2008-02-28 Fujitsu Ltd Access monitoring method and device for shared memory
US7685381B2 (en) 2007-03-01 2010-03-23 International Business Machines Corporation Employing a data structure of readily accessible units of memory to facilitate memory access
US7899663B2 (en) 2007-03-30 2011-03-01 International Business Machines Corporation Providing memory consistency in an emulated processing environment
US9442780B2 (en) * 2011-07-19 2016-09-13 Qualcomm Incorporated Synchronization of shader operation
US9064437B2 (en) * 2012-12-07 2015-06-23 Intel Corporation Memory based semaphores
CN103608792B (en) 2013-05-28 2016-03-09 华为技术有限公司 The method and system of resource isolation under support multicore architecture
US20240193686A1 (en) * 2022-12-07 2024-06-13 Hyannis Port Research, Inc. Efficient data relocation in an asymmetric multi-level caching structure for efficient data storage and retrieval

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EP0343646A2 (en) * 1988-05-26 1989-11-29 Hitachi, Ltd. Task execution control method for a multiprocessor system with enhanced post/wait procedure

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Also Published As

Publication number Publication date
WO2001016743A3 (en) 2001-08-09
WO2001016738A3 (en) 2001-10-04
WO2001016738A2 (en) 2001-03-08
WO2001016742A3 (en) 2001-09-20
WO2001016741A2 (en) 2001-03-08
AU6949700A (en) 2001-03-26
AU7113600A (en) 2001-03-26
WO2001016742A2 (en) 2001-03-08
AU7100700A (en) 2001-03-26
WO2001016750A3 (en) 2002-01-17
WO2001016738A9 (en) 2002-09-12
EP1214652A2 (en) 2002-06-19
WO2001016750A2 (en) 2001-03-08
WO2001016738A8 (en) 2001-05-03
WO2001016740A2 (en) 2001-03-08
AU7108300A (en) 2001-03-26
WO2001016743A8 (en) 2001-10-18
CA2382728A1 (en) 2001-03-08
AU7108500A (en) 2001-03-26
AU6949600A (en) 2001-03-26
EP1214651A2 (en) 2002-06-19
AU7112100A (en) 2001-03-26
WO2001016737A3 (en) 2001-11-08
CA2382927A1 (en) 2001-03-08
EP1214653A2 (en) 2002-06-19
WO2001016737A2 (en) 2001-03-08
WO2001016741A3 (en) 2001-09-20
WO2001016761A2 (en) 2001-03-08
WO2001016760A1 (en) 2001-03-08
AU7110000A (en) 2001-03-26
WO2001016743A2 (en) 2001-03-08
WO2001016761A3 (en) 2001-12-27
CA2382929A1 (en) 2001-03-08
AU7474200A (en) 2001-03-26

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