SYSTEM AND METHOD FOR DISPLAYING
WIDE-ASPECT VIDEO SOURCE MATERIAL
ON A VGA-COMPATIBLE MONITOR
FIELD OF THE INVENTION The present invention relates generally to the display of video information and, more particularly, to a system and method for the display of wide-aspect video source material on a VGA-compatible monitor.
BACKGROUND OF THE INVENTION Nearly all motion pictures arc produced in aspect ratios wider than the 4:3 aspect ratio of VGA- compatible computer monitors. Although film makers have experimented with wide-screen film making since the earliest days of the movie making, competition from the television industry is widely credited with providing the motivation for its widespread development. Much digital video content from sources such as digital versatile disc (DVD) and the like is formatted for playback on wide-screen television systems, typically having a 16:9 aspect ratio. This, however, gives rise to problems when it is desired to playback such content on a conventional VGA monitor. Most wide-screen film content is filmed using an anamorphic lens that compresses a wide-screen image, such as a 16:9 image, in the horizontal direction down to, for example, a 4:3 aspect ratio. The compressed image is then restored to the original wide aspect ratio, for example, by the use of an appropriate lens on a projector, or by circuitry in a wide-screen television system. If the 4:3 anamorphic signal is displayed on a 4:3 display such as a VGA monitor, the image appears horizontally compressed. Several solutions have been developed to produce an image that is properly proportioned. One such solution is to crop the edges and display only the center portion of the wide screen image. This, however, leaves out everything that happens at the sides of the picture.
Another way is to produce an undistorted 4:3 image from 16:9 video content is by panning and scanning. For pan and scan, the anamorphic image is restored to 16:9 and the 4:3 portion that can be actually by displayed is allowed to shift horizontally to follow a center of interest offset, as determined by the producer of the video material. The offset information may be encoded in the video stream. This process, however, generally cannot capture the original cinematography since it still omits much of the filmed material. Panning and scanning may also cause very rapid on-screen movement and blurring of the image where it is used to capture dialog or action occurring at opposite sides of the picture. Yet another method of displaying a 16:9 picture within a 4:3 system is to display the picture in letterbox form by creating and displaying black bars at the top and the bottom of the picture. This leaves only three-fourths of the height of the screen remaining. In order to fit the picture in the correct aspect ratio, the anamorphic image is compressed vertically using a letterbox filter to combine every four lines into three, i.e., from 480 scan lines to 360 scan lines in the case of 720x480 MPEG-2 video source information. Although this allows the picture to be displayed at full width, there is a resulting loss of vertical resolution and the vertical compression can produce compression artifacts. Also, because the black lines are displayed, a very high horizontal scan rate is necessary to obtain the vertical refresh rate needed for displaying full motion video. It would, therefore, be desirable to provide an improved system and method for displaying 16:9 video content on a 4:3 display, but which alleviates the drawbacks associated with the use of panning and scanning and current letterboxing techniques.
SUMMARY OF THE INVENTION The present invention is directed to a method for displaying wide aspect video information on a 4:3 computer display wherein the display hardware is dynamically adjusted to reduce the size of the vertical raster. By reducing the size of the vertical raster, the image can be displayed in its correct aspect ratio without the need for vertical compression. Also, since the vertical size of the raster is reduced, there is no need to scan black lines above and below the image, thus enabling a sufficiently high vertical refresh rate to be achieved for displaying full motion video (i.e., 24 frame per second
(fps) source material) without the need for performing a 3:2 pull down which can create artifacts in the image that is viewed. The present invention is also directed to a computer-based information handling system wherein the vertical display height is dynamically adjusted to display wide-screen video source material in its correct aspect ratio.
Much of the digitized video content is currently being produced in a 16:9 aspect ratio, regardless of the aspect ratio in which the material was originally produced for film. This material is thus suited for playback on television systems such as high density television (HDTV), wide-screen television, digital television, etc., which have adopted a 16:9 aspect ratio. Accordingly, the present invention is described herein primarily in reference to its preferred embodiment wherein the VGA-compatible monitor display height is reduced to provide a display area having a 16:9 (1.78: 1 ) aspect ratio. However, it will be recognized that many wide-screen formats are known in the art and that the present invention is not limited to this preferred embodiment. Other wide-screen aspect ratios include, but are not limited to, 1.66:1, 1.85:1, 2.0:1, 2.35:1, and so forth. Similarly, video source material may comprise variable or multiple aspect ratios, even within a single movie. Accordingly, the system and method according to the present invention may be used to dynamically adjust the vertical scan height by acting on the monitor's picture height adjustment circuitry to accommodate any desired aspect ratio. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS The detailed description of the invention may be best understood when read in reference to the accompanying drawings wherein: FIG. 1 is a block diagram of a computer system operable to embody the present invention;
FIG. 2 is a block diagram of a preferred video display system according to the present invention; and
FIG. 3 is a flow diagram outlining a video display method according to the present invention.
DETAILED DESCRIPTION OF THE INVENTION FIG. 1 shows an exemplary hardware system in which the video display method according to the present invention may be implemented. The hardware system 100 shown in FIG. 1 is generally representative of the hardware architecture of a computer- based information handling system of the present invention. The hardware system 100 is controlled by a central processing system 122. The central processing system 122 includes a central processing unit such as a microprocessor or microcontroller for executing programs, performing data manipulations and controlling the tasks of the hardware system. Communication with the central processor 122 is implemented through a system bus 128 for transferring information among the components of the hardware system. The bus 128 may include a data channel for facilitating information transfer between storage and other peripheral components of the hardware system. The bus 128 further provides the set of signals required for communication with the central processing system 122 including a data bus, address bus, and control bus. The bus 128 may comprise any state of the art bus architecture according to promulgated standards, for example industry standard architecture (ISA), extended industry standard architecture (EISA), Micro Channel Architecture (MCA), peripheral component interconnect (PCI) local bus, standards promulgated by the Institute of Electrical and Electronics Engineers (IEEE) including IEEE 488 general-purpose interface bus (GPIB), IEEE 696/S-100, and so on. Other components of the hardware system 100 include main memory 124, and auxiliary memory 126. The hardware system 100 may further include an auxiliary processing system (not shown) as required. The main memory 124 provides storage of instructions and data for programs executing on the central processing system 122. The main memory 124 is typically semiconductor-based memory such as dynamic random access memory (DRAM) and/or static random access memory (SRAM). Other semiconductor-based memory types include, for example, synchronous dynamic random
access memory (SDRAM), Rambus dynamic random access memory (RDRAM), ferroelectric random access memory (FRAM), and so on. The auxiliary memory 126 provides storage of instructions and data that are loaded into the main memory 124 before execution. The auxiliary memory 126 may include semiconductor-based memory such as read-only memory (ROM), programmable read-only memory (PROM) erasable programmable read-only memory (EPROM), electrically erasable read-only memory (EEPROM), or flash memory (block oriented memory similar to EEPROM). The auxiliary memory 126 may also include a variety of non-semiconductor-based memories, including but not limited to magnetic tape, drum, floppy disk, hard disk, optical, laser disk, compact disc read-only memory (CD-ROM), write once compact disc (CD-R), rewritable compact disc (CD-RW), digital versatile disc read-only memory (DVD- ROM), write once DVD (DVD-R), rewritable digital versatile disc (DVD-RAM), etc. Other varieties of memory devices are contemplated as well. The hardware system 100 may optionally include an auxiliary processing system (not shown) which may be a digital signal processor (a special-purpose microprocessor having an architecture suitable for fast execution of signal processing algorithms), a back-end processor (a slave processor subordinate to the main processing system), an additional microprocessor or controller for dual or multiple processor systems, or a coprocessor.
The hardware system 100 further includes a display system 130 for connecting to a display device 132, and an input/output (I/O) system 134 for connecting to one or more I/O devices 136, 138, up to N number of I/O devices 140. The display system 130 may comprise a video display adapter having all of the components for driving the display device, including memory such as video random access memory (VRAM), synchronous graphics random access memory (SGRAM), and the like, buffer, and graphics engine as desired. The display device 132 may comprise a cathode ray-tube (CRT) type display such as a monitor or television, or may comprise any additional or alternative type of display technology such as a liquid-crystal display (LCD), light- emitting diode (LED) display, gas or plasma display, electroluminescent display, vacuum fluorescent display, or cathodoluminescent (field emission) display. The input/output system 134 may comprise one or more controllers or adapters for providing interface functions between the one or more I/O devices 136-140. For example, the input/output
system 134 may comprise a serial port, parallel port, universal serial bus (USB) port, infrared port, network adapter, printer adapter, radio-frequency (RF) communications adapter, universal asynchronous receiver-transmitter (UART) port, etc., for interfacing between corresponding I/O devices, such as a mouse, trackball, touchpad, joystick, trackstick, keyboard, infrared transducers, printer, modem, RF modem, bar code reader, charge-coupled device (CCD) reader, scanner, compact disc (CD), compact disc readonly memory (CD-ROM), digital versatile disc (DVD), video capture device, touch screen, stylus, electroacoustic transducer, microphone, speaker, etc. The input/output system 134 and I/O devices 136-140 may provide or receive analog or digital signals for communication between the hardware system 100 of the present invention and external devices, networks, or information sources. The input/output system 134 and I/O devices 136-140 preferably implement industry promulgated architecture standards, including Ethernet IEEE 802 standards (e.g., IEEE 802.3 for broadband and baseband networks, IEEE 802.3z for Gigabit Ethernet, IEEE 802.4 for token passing bus networks, IEEE 802.5 for token ring networks, IEEE 802.6 for metropolitan area networks, and so on), Fibre Channel, digital subscriber line (DSL), asymmetric digital subscriber line (ASDL), frame relay, asynchronous transfer mode (ATM), integrated digital services network (ISDN), personal communications services (PCS), transmission control protocol/Internet protocol (TCP/IP), serial line Internet protocol/point to point protocol (SLIP/PPP), and so on. It should be appreciated that modification or reconfiguration of the hardware system 100 of FIG. 1 by one having ordinary skill in the art would not depart from the scope or the spirit of the present invention.
FIG. 2 shows a block diagram of a preferred video display control system according to the present invention. The present invention may be implemented in software (202) which may be tangibly embodied on a medium readable by a computer and capable of causing the computer to execute the video display method according to the present invention. Software 202 may be implemented as a part of or as an extension of an operating system or software application environment including a video playback feature. Software 202 detects incoming video source material and determines whether it is in 16:9 format. When 16:9 video content is detected, software 202 initiates the reduction in the vertical raster. Software 202 preferably controls the video hardware by
calling a command, service, or function in the VGA BIOS residing in the system ROM 204 to change the height of the display. It will be recognized that software 202 may be likewise be implemented that controls the video hardware directly, rather than via the BIOS interface, as would be understood by those skilled in the art. The height adjustment command may be sent to the microprocessor 208 in the monitor via VGA controller 206, e.g., via a DDC-2B compatible interface. The microprocessor 208 adjusts height control circuitry 210. By changing the limits on the vertical sweep, the display monitor may thus be set to display the correct aspect ratio for 16:9 video source material.
Although height control circuitry 210 may be additional dedicated circuitry specifically provided to limit the vertical scan height in accordance with the present invention, it will be recognized that it is most advantageous to use the monitor's own built-in display height adjustment circuitry for this purpose.
In another aspect according to the present invention, the invention may be implemented in a computer system employing a universal serial bus (USB) monitor and the command for reducing the vertical raster may be transmitted via the universal host controller interface (UHCI) and the USB. In yet another aspect according to the present invention, an explicit command to reduce the vertical raster is not necessary and a reduction in the vertical raster may be accomplished by variation of the sync timing.
Referring now to FIG. 3, there is shown a flow diagram outlining a method of displaying 16:9 video material according to the present invention. In step 302, video source material is input into a computer system, such as the exemplary system 100 shown in FIG. 1. Such material will typically be input from a DVD drive, although it is contemplated that the material may also be input from other sources including, but not limited to, other computer readable media, another computer via a high speed network connection, and the like. Given the enormous storage requirements for digital video, the video source material will generally be in a compressed format, and the video source material is decompressed in step 304. Compression and decompression algorithms (CODECs) are generally known in the art and typically use interframe compression, intraframe compression, or both. The decompression may be performed by dedicated hardware in display system 120 (FIG. 1). Also, the decompression may also be performed by a software CODEC running on central processing system 102 of system
100 (FIG. 1) where a processor of a sufficiently high performance is used. In a particularly preferred embodiment according to the present invention, the video source material is encoded according to the MPEG-2 standard for digital video compression, storage, and communication as promulgated by the Motion Picture Experts Group committee of the International Standards Organization.
When 16:9 source material is detected, the vertical size of the raster is adjusted in step 306 in accordance with the present invention and as described above. By adjusting the vertical raster to the correct aspect ratio, the video information may be displayed in step 308 in a letterbox-like fashion. This display provides the advantages of the letterbox format, but does not require that the blank lines above and below the image actually be scanned. When displaying the content at 60 Hz with 3:2 pull-down, the monitor with this invention can display an entire 720 x 480 decoded frame such as found in MPEG-2 for DVD in the correct aspect ratio without the need to drive the horizontal sweep frequency over the standard 31.5 kHz required for a basic VGA monitor. If it is desired to remove the 3:2 pull-down (because of undesirable artifacts or other reasons) by driving a vertical refresh rate of 72 Hz (thereby displaying each frame 3 times from 24 fps source material such as movies), the present invention will allow the monitor to run at a lower horizontal sweep frequency than if the blank lines were scanned. Accordingly, the monitor can display an entire 720x480 decoded MPEG-2 image in the correct aspect ratio without the need to drive the horizontal sweep frequency over the standard 31.5 kHz required for a basic VGA monitor.
Although the invention has been described with a certain degree of particularity, it should be recognized that elements thereof may be altered by persons skilled in the art without departing from the spirit and scope of the invention. One of the embodiments of the invention can be implemented as sets of instructions resident in the main memory 104 of one or more computer systems configured generally as described in FIG. 1. Until required by the computer system, the set of instructions may be stored in another computer readable memory such as the auxiliary memory of FIG. 1 , for example in a hard disk drive or in a removable memory such as an optical disk for utilization in a CD- ROM drive, a magnetic media for utilization in a magnetic media drive, a magneto- optical disk for utilization in a magneto-optical drive, a floptical disk for utilization in a
floptical drive, or a personal computer memory card for utilization in a personal computer card slot. Further, the set of instructions can be stored in the memory of another computer and transmitted over a local area network or a wide area network, such as the Internet, when desired by the user. Additionally, the instructions may be transmitted over a network in the form of an applet that is inteφrcted after transmission to the computer system rather than prior to transmission. One skilled in the art would appreciate that the physical storage of the sets of instructions or applets physically changes the medium upon which it is stored electrically, magnetically, chemically, physically, optically or holographically so that the medium carries computer readable information.
The description above should not be construed as limiting the scope of the invention, but as merely providing illustrations to some of the presently preferred embodiments of this invention. In light of the above description and examples, various other modifications and variations will now become apparent to those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims. Accordingly, the scope of the invention should be determined solely by the appended claims and their legal equivalents.