WO2001011645A2

WO2001011645A2 - Cathodoluminescent flat panel displays with charge removal electrodes

Info

Publication number: WO2001011645A2
Application number: PCT/SG2000/000094
Authority: WO
Inventors: John Alan Turner
Original assignee: Ipc-Transtech Display Pte Ltd.
Priority date: 1999-08-05
Filing date: 2000-07-04
Publication date: 2001-02-15
Also published as: WO2001011645A3

Abstract

Conducting charge removal electrodes (CREs) (50) are incorporated in the anode structure of cathodoluminescent flat panel displays to act as electron 'sinks' for capturing surface electrons that would otherwise remain on the surface of anode phosphors (54). These CREs (50) are electrically conductive electrodes maintained at a positive voltage relative to the selected anode pixels (52) and are interposed between the anode pixels (52). In addition to capturing surface electrons, excess electrons are also captured by the CREs (50).

Description

CATHODOLUMINESCENT FLAT PANEL DISPLAYS WITH

CHARGE REMOVAL ELECTRODES

FIELD OF THE INVENTION

The present invention is related to cathodoluminescent technology. In particular, the present invention is related to cathodoluminescent flat panel displays.

BACKGROUND OF THE INVENTION

Cathodoluminescent Displays produce visible light by accelerating electrons from a cathode towards a conducting anode covered with a layer of luminescent phosphor. Between the cathode and the anode is an electron directing means which attracts the electrons from the cathode and accelerates them towards the anode pixels. There are generally two types of cathodoluminescent flat panel displays : Vacuum Fluorescent Displays (VFD) and Field Emission Displays (FED). The electron directing means in VFD is generally referred to as grids, while electron directing means in FED is generally referred to as gates.

Flat Panel Vacuum Fluorescent Displays (VFD) utilize electrons that are emitted from a hot cathode, the anode-cathode voltage usually being less than 200 volts. Originally VFDs were manufactured as fixed-character alphanumeric displays or as bar-graph displays. Subsequently, matrix addressed VFDs were developed in which images (pictorial and/or alphanumeric) were generated by selecting groups of picture elements (pixels) from a matrix of pixels using row and column selection. Field Emission Displays (FED) produce electrons by field emission using the high electric field gradient in the vicinity of a cold cathode. FEDs are usually matrix addressed and produce light emission by electron impact onto cathodoluminescent phosphors in a manner similar to VFDs. Low voltage FEDs use anode-cathode voltages up to 400 volts and colour writing can be conventional or field sequential.

Low voltage VFD and FED flat panel displays use close proximity between the control-grid and anode or control-gate and anode, thereby removing the need for electron beam focussing. This close proximity enhances pixel clarity but introduces difficulties in producing and maintaining a high vacuum and increases the probability of catastrophic gaseous breakdown within the display. Additional problems are caused by faceplate and/or grid/gate distortion due to temperature cycling during manufacture and during panel operation.

In a typical triode construction of a cathodoluminescent flat panel display, conducting anodes are coated with a cathodoluminescent phosphor on a transparent substrate or on an inside wall of the display. A series of cathodes is positioned above the anodes, and grid/gate electrodes are positioned between the anodes and cathodes. The display can be viewed from the cathode side through the cathode and grid/gate structure. Alternatively, the display can be viewed from the front (Front Luminous) using transparent conducting anodes. In the case of matrix addressed displays, a pixel (picture element) is row and column selected such that the grids/gates in the selected row is made positive with respect to the cathode, and the anodes in the selected column is made positive with respect to the cathode. Matrix addressed VFD or FED displays have two distinct constructional means. In Type 1 constructions, the cathodes are orthogonal to the grids/gates. In Type 2 constructions, the cathodes run parallel to the grids/gates.

Cathodoluminescent displays that use line sequential addressing (for example Vacuum Fluorescent Displays and Field Emission Displays) employ techniques that necessitate the electron illumination of adjacent colour or monochrome pixels at identical times during a proportion of a line-scan period. Luminance control is achieved by Pulse Width Modulation (p.w.m.) of either the anode-cathode voltage or the gate-cathode voltage.

Electrons are accelerated towards an anode by an electric field between the cathode and anode. When electrons strike a phosphor, the kinetic energy of the electrons is converted to visible light (and heat) in the phosphor. The majority of cathodoluminescent phosphors exhibit dielectric properties; thus, after electron impact, the surface of the phosphor is covered with low energy negatively charged electrons resulting in an additional electric field above the surface of the phosphor. The additional electric field reduces the speed of electrons traveling towards the anodes, hence reducing the luminance of anode pixels. As a result, commercially available Matrix VFD or FED panels have reduced luminance.

Several methods have been proposed to reduce residual surface charge on phosphors. One method is the use of thin phosphor layers with gaps between phosphor particles.This allows surface electrons to be attracted to the underlying anode, but the thin phosphor layer reduces display luminance and some residual surface charge remain A second method involves the addition of indium oxide crystals to colour phosphors. Indium oxide increases the removal of surface electrons from the phosphor by improving secondary emission. Adding indium oxide improves luminance, but it has been reported that the lifetime of phosphors with Indium Oxide is reduced significantly from approx. 40,000 hours to approx. 4,000 hours.

The grid structure in vacuum fluorescent displays must be positioned close to the anode (ideally less than 0.2mm) in order to be an effective collector of secondary electrons from the phosphor surface. If this close spacing is not achieved, display luminance will be significantly reduced. An additional reason for close separation between grids/gates and anodes is to prevent unwanted spillover of electrons onto adjacent pixels, noting that the electron stream is not focussed onto the recipient pixel. Furthermore, air pressure on the anode faceplate causes it to become concave, moving the anode structure towards the grid/gate structure when vacuum processing takes place. If the anode-grid/gate separation becomes zero, the panel fails totally due to short-circuits between anodes and grids/gates. As the display diagonal increases, maintaining close separation without anode-grid/gate contact can be achieved by increasing face-plate thickness but this increases the weight of the display significantly.These fabrication constraints currently prevent commercial application in display formats larger than approx. 10 inches diagonal for both monochrome and colour displays.

OBJECT OF THE INVENTION

It is therefore an object of the present invention to reduce substantially the deficiencies previously described.

It is another object to provide a cathodoluminescent flat panel display with improved luminance uniformity. BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a basic construction of a cathodoluminescent flat panel display.

Figure 2 is a type 2 passive matrix vacuum fluorescent display in the prior art.

Figure 3 is a detailed anode structure of a cathodoluminescent flat panel display according to one embodiment of the present invention.

Figure 4A is a computer simulation of electron trajectories in a cathodoluminescent flat panel display according to prior art constructions.

Figure 4B is a computer simulation of electron trajectories in a cathodoluminescent flat panel display incorporating charge removal electrodes (CREs) according to one embodiment of the present invention.

Figure 4C is a computer simulation of electron trajectories in a cathodoluminescent flat panel display incorporating charge removal electrodes (CREs) according to another embodiment of the present invention.

Figure 5A-C are computer simulations of surface charge removal from anode pixels separated by elevated CREs according to one embodiment of the present invention.

SUMMARY OF THE INVENTION

According to one aspect of the present invention, conducting charge removal electrodes (CREs) are incorporated in the anode structure to act as electron "sinks" for capturing surface electrons that would otherwise remain on the surface of anode phosphors. These CREs are electrically conductive electrodes maintained at a positive voltage relative to the selected anode pixels.

According to another aspect of the present invention, the CREs are interposed between the anode pixels. In addition to capturing surface electrons, excess electrons are also captured by the CREs.

According to yet another feature of the present invention, the CREs protrude from (or are elevated relative to) the array of anode pixels, such that they form walls around or adjacent to each anode pixel to provide a prominent structure to attract phosphor surface electrons and excess electrons.

DESCRIPTION OF THE INVENTION

In the following discussion and in the claims, the terms "containing", "including", "having" and "comprising" are used in an open-ended fashion, and thus should be interpreted to mean "including but not limited to". Also, the term "couple" or "coupled" is intended to mean either an indirect or direct electrical connection. Thus if a first device "couples" to a second devices, that connection may be a direct electrical connection or through an indirect electrical connection via other devices or connections. As used herein, anode structure refers to the structure comprising anode pixels for receiving accelerating electrons. An anode pixel refers to a sub-area of an independently controlled anode electrode on which a phosphor is coated. Anode electrodes of a monochrome display are all covered with the same type of phosphor. In the case of a colour display, an anode electrode is typically coated with one of three different colour phosphors and three adjacent anode electrodes combine visually to provide full colour capability.

Selected pixels refer to those anode pixels in which luminance is required to generate the desired image at selected locations. Non- selected anode pixels refer to those anode pixels that are switched to the non-luminescence mode at other selected locations.

Electron-emitting cathodic element refers to a structure within the display unit from which electrons are generated. This cathodic element may comprise a series of hot filaments or cold cathodes.

An electron-directing means comprises one or more conducting wires or mesh set at a positive potential relative to the cathodic element for directing and accelerating electrons originating from the cathodic element. These wires or mesh are commonly known as grids (for VFD) or gates (for FED). One in the art understands that both the grid/gate and the anode pixels play a role in accelerating the electrons. The term "electron-directing means" is therefore used to refer to the grid/gate electrode structure as a matter of clarity, and not to be interpreted as excluding the element from having other functions.

Incident electrons refer to those electrons that are intended to strike selected anode pixels to generate the desired luminance. Excess electrons refer to electrons generated by the cathodic element that are not incident electrons.

Surface electrons refer to those incident electrons that have collided with the selected anode pixels to generate luminance, but which have not been absorbed by the anode due to, for example, the poor conductivity of the phosphor layer. These surface electrons form a layer of negative charge on the phosphor-coated anode that reduces the speed of subsequent in-coming incident electrons, and thus reduces pixel luminance.

Numerous specific details are set forth such as the cathodic and electron directing means and their relative positioning in order to provide a thorough understanding of the present invention. It should be understood that the overview is not intended to limit the scope of the present invention, and that the charge removal electrodes described herein can be used in other cathodoluminescent displays without departing from the principles of the present invention. In addition, one skilled in the art will understand that certain components of the display unit, such as the electrical circuitry and connections to a power supply have been omitted in the following discussion so as not to digress unnecessarily from the focus of the present invention. It should be understood that a display device contains all these components.

Figure 1 shows the basic construction of a cathodoluminescent flat display panel. Within the vacuum enclosure 21 , electron emitting cathodes 20 are positioned above the anodes with the grid or gate electrodes 24 provided therebetween. The anodes comprises separate anode electrodes 22 covered by a phosphor layer 23 to form anode pixels which produce visible light when impacted by energetic electrons. Electrons emitted by cathode 20 are accelerated towards the anode by an electric field found between the cathode and anode. This electric field is created by the potential difference between (a) cathode 20, and grid/gate 24 and (b) grid/gate 24 and anode electrodes 22. The luminance is directly dependent on the number of electrons and the speed of these electrons at impact.

Figure 2 shows the construction and operation of a Type 2 Passive Matrix Vacuum Fluorescent Display (PMVFD) which is used as an example of a cathodoluminescent flat panel display for the purposes of explaining the present invention. The back-plane 31 and surface 40 are the inside surfaces of a glass envelope (not fully shown) in which a high vacuum is maintained. The back plane 31 consists of a metallic surface on the inside of the glass envelope that is held at a prescribed potential during panel operation. In this example, the cathodic element comprises cathodes 32 made of tungsten wires coated with electron emissive oxides. The cathodes are under mechanical tension and carry an electrical current that raises the cathode temperature to a level that results in electron emission. A plurality of co-parallel cathodes 32 are situated with the plane of the cathodes at a substantially fixed distance from the back plane 31.

The grid structure 34a, 34b, 34c and 34d includes a plurality of equally spaced and parallel pre-tensioned wires that may have a circular or rectangular cross-section. The plane of the grid wires is at a substantially fixed distance from the cathode plane 32. Grid wires are taken through a vacuum seal so that a specific voltage can be applied to each individual grid wire from external electronic circuitry. In a typical electrode arrangement, a single cathode provides electron emission for up to 10 consecutive scanning lines (11 consecutive grid wires). The anode structure consists of a plurality of substantially parallel conducting electrodes 38a and 38b, attached to surface 40 and positioned so that the anode electrodes are at right angles to the grid wires. Each anode electrode is coated with a layer of cathodoluminescent phosphor 36 that produces visible light when impacted by electrons. The anode electrodes 38a and 38b are fabricated using a substantially transparent conductor such as Indium-Tin Oxide (ITO) deposited on the inner surface 40 of the glass envelope. The plane of the anode structure is at a substantially fixed distance from the plane of the grid wires. Anode electrodes are taken through vacuum seals so that a specific voltage can be applied to each individual anode electrode from external electronic circuitry.

For convenience in describing panel operation, the reference voltage of the cathodes is set at 0 volts and the voltages of all other electrodes are specified relative to the cathode voltage. The voltage applied to the back plane can be varied to control the acceleration of electrons from the cathode towards the grids. Electrons 39 from cathode 32 are accelerated towards the selected grids 34b and 34c by virtue of the positive voltage on these grids and the resultant electric field between the cathode and the grids. (Note : electrons would be pulled from the length of the cathode, but the electron stream 39 is depicted as a line rather than a sheet for clarity of illustration). The majority of these electrons pass between grids 34b and 34c and continue moving to a selected anode electrode 38a also held at a positive voltage. Non-selected anode electrode 38b are held at a voltage that is typically less than, or equal to, the cathode voltage. Anode pixels (elements) are located on each anode electrode, each pixel being delineated by the spacing between two adjacent grid wires and the width of an anode electrode.

Cathodoluminescent light is emitted when electrons strike the phosphor coating 36 on the surface of a selected anode. During horizontal line selection, every anode pixel of the selected horizontal line can be switched "ON" to a 'selected' mode (e.g. +100 volts) or switched "OFF to an 'unselected' mode (e.g. 0 volts). Where pixel luminance is varied to provide a grey-scale, this is achieved by controlling the 'ON' duration of the anode current. The maximum 'ON' duration of an anode pixel is the time for a single horizontal line of picture information.

Operation of the Passive Matrix Display consists of horizontal line selection using positive voltages applied to two adjacent grid wires. The full matrix display of alpha-numeric characters or pictorial information is achieved by selecting sequential pairs of grid wires, starting at the top of the display and ending at the bottom of the display. For example, if the grid wires are numbered consecutively 1 ,2,3,4 598, 599, 600 starting at the top of the display, the selected adjacent pairs of grid wires will be

(1 ,2), (2,3), (3,4) (599, 600) to produce one picture. Thereafter, the two-grid-wire sequence will be repeated to produce consecutive (moving) pictures at a picture repetition rate of >50 per second to prevent picture flicker.

In the anode structure according to the present invention as shown in

Figure 3, elevated conducting charge removal electrodes (CREs) 50 are interposed between adjacent anode electrodes 52 that are coated with a phosphor layer 54. The entire anode structure is mounted on the anode substrate 56 of the glass envelope. In this embodiment, the CREs are positioned between and substantially parallel to adjacent anode electrodes.

The CREs may be fabricated by thick film technology or other known means. In the preferred embodiment, the height of the CREs (denoted as h in Figure 3) is taller than the anode electrodes, such that the upper surface 58 of the CREs is closer to the cathode than the phosphor layer on the anode electrodes. As an example, the minimum height of the CRE may be 0.03mm above the phosphor surface for an anode pixel with a width of 0.1mm, with the CRE's held at +50V relative to the anode. This ratio is preferably maintained for other anode electrode widths. An increase in height of the CRE requires a proportionate increase in the potential difference between the CRE and the adjacent anodes. The CRE width is most preferably a small fraction of the anode electrode width. Another example is a CRE height of 0.3mm to 0.03mm for an anode pixel width of 0.1mm.

During normal panel operation, the CREs are held at a positive potential, preferably +20 to +100v above the potential of selected anode electrodes, thereby creating an electric field that accelerates low energy electrons away from the phosphor surface to the CREs. In this manner, the incoming incident electrons from the cathodes are able to produce maximum light output when they strike the phosphor layer since they are no longer slowed down by a retarding electric field created by the negative surface charge of residual electrons on the phosphor surface. In a preferred embodiment, the CREs are fabricated from a visible light absorbing and electrically conducting material. Alternatively, the CRE's can be fabricated by deposition of a conducting thick-film onto said visible light absorbing material. In this connection it should be noted that the inclusion of a visible light absorbing material within the viewing area of the display would enhance both the contrast and the luminance of the resulting picture.

Figures 4B and C show the effectiveness of CREs in absorbing excess electrons generated by the cathodes when compared to the absence of CRE's (Fig. 4A). In all these examples (Fig. 4A-C), the cathode has a potential of Ov, the grids have a potential of 100v, the electron trajectories are solid black lines 58, 59 and 60 in Figs. 4A-C respectively, and the spacing between the grid/gate plane and the anode plane is 1.0mm. This spacing is five time larger than that typically found in the prior art.

Figure 4A shows that electrons generated by the cathode (not shown) are accelerated towards the anode electrodes 63a to 63 h. The electrons (as shown by trajectories 58) are directed away from the unselected anode electrodes 63d, 63f, 63g and 63h in prior art anode structure, and tend to back-scatter within the vacuum enclosure or are redirected in error towards neighbouring selected pixels. In this simulation, the unselected anode electrodes 63d, 63f, 63g and 63h have a potential of Ov and the selected anode electrodes 63a, 63b, 63c and 63e are set to 200v.

Figure 4B shows that in the presence of the CREs, the excess electrons generated by cathode and accelerated towards the anode electrodes are absorbed by the CREs such that fewer electrons are back- scattered within the vacuum enclosure. In this example, the CREs 68 protrude above the anode electrodes from the anode structure. The unselected anode electrodes 70d, 70f, 70g and 70h have a potential of Ov and the selected anode electrode 70a, 70b, 70c and 70e are set to 200v. Figure 4C shows that when the unselected anode electrodes 80 d, 80f, 80g and 80h are set to a low positive voltage of 10v relative to the cathode according to another embodiment of the present invention, and CREs 84 are provided between the anode electrodes, no electron back- scattering is seen in the computer simulation. In this example, the electrons approach the anode structure at substantially 90 degrees. A large portion of the excess electrons directed at the unselected anode electrodes 80d, 80f, 80g and 80h are absorbed by these anode electrodes. The remaining excess electrons are absorbed by the CREs 84 adjacent these unselected anode electrodes. Furthermore, the CREs adjacent the selected anode electrodes 80a, 80b 80c and 80e also act to absorb excess electrons in that vicinity.

Figures 5A to 5C, show the effectiveness of elevated CREs in removing residual electrons from the surface of the selected anode pixels. In all three simulations, the cathode (not shown) is set at Ov, the CREs 90 are 0.015mm above the phosphor surface and the CRE voltage is set to +250v. The anode pixels 72 are set at 200v or Ov as indicated. In these example, CREs are elevated and disposed juxtaposing the anode pixels. The solid lines 94 are the trajectories of the residual electrons being removed from the phosphor surface and landing on the CRE's. Fig. 5A-C show that elevated CREs set to a potential of +50v higher than the selected pixels was totally effective in removing surface charge irrespective of whether adjacent anode pixels are selected (+200v) or unselected (Ov).

From the above results, it will be appreciated readily that the use of

CREs gives many benefits. The removal of surface charge from the phosphor surface restores maximum luminance to the phosphor layer. Furthermore, the existing solutions, such as providing gaps between the phosphor crystals or the addition of indium oxide, are no longer necessary, eliminating the problems associated with such methods. The uniform spacing of the electron trajectories shown in Fig.s 4B and 4C, show that CREs also improve the uniformity of the electron currents that flow into selected anode electrodes even when the spacing between anode and the grid/gate structure is increased e.g. to 1.0mm. The flow of electron current is normal (or at 90 degrees) to the anode plane because its surface has improved uniformity of potential due to incorporation of CREs at a constant voltage. Thus close spacing between grid/gate and anode is no longer necessary to remove secondary electrons or to prevent loss of resolution caused by spillover of electrons onto adjacent pixels. Therefore, using CREs allows a larger distance between the anode and grid/gate, thereby reducing the problems of anode-grid/gate interference resulting from anode faceplate curvature due to atmospheric pressure. An increase in the spacing between the anode and the grid/gate also reduces both the vacuum processing time and the probability of catastrophic gaseous breakdown during panel operation. The use of CREs further reduces unwanted heating of the grid/gate structure as the stray and excess electrons can now be collected by the CREs. Blackened CREs also increase both picture contrast and available luminance. In the preferred embodiment, the the upper surfaces of the CREs are higher than the upper surface of the phospor layers, both measured relative to the anode substrate 56.

While the present invention has been described particularly with reference to the aforementioned figures with an example on providing CREs in a Type 2 PMVFD, it should be understood that the figures are for illustration only and should not be taken as a limitation of the invention. The invention is applicable to Passive Matrix Vacuum Fluorescent Displays (PMVFD), Active Matrix Vacuum Fluorescent Displays (AM VFD) and to Field Emission Displays (FED). It is contemplated that many changes and modifications may be made by one of ordinary skill in the art without departing from the spirit and the scope of the invention described.

The CREs become effective in removing phosphor surface charges when the CREs have a higher potential than selected (or "ON") anode electrodes. The actual potential of the CRE is determined by the potential of the selected anode electrode, for example, +50v relative to a selected anode electrode. The dimensions of the CREs are based on the width and height of the anode pixels, as mentioned above.

Claims

1. A matrix cathodoluminescent flat panel display comprising :

a vacuum enclosure;

an electron-emitting cathodic element, disposed within said vacuum enclosure, containing a substantially planar array of cathodes adapted for electrical connection to a power source;

an anode structure including an array of anode electrodes disposed on a planar support element and within said vacuum enclosure, said support element being substantially co-planar with said cathodic element, said anode electrode being electrically conducting and coated with a layer of cathodoluminescent phosphor, said anode electrodes adapted for electrical connection to said power source, the electrical potential of each anode electrode further controlled by a microprocessor;

an electron directing means, disposed within said vacuum enclosure and further positioned between said cathodic element and said array of anode electrodes, said electron directing means coupled to a power supply, controlled by said microprocessor and adapted for providing a positive electric potential relative to said cathode such that electrons emitted by said cathodes are accelerated and directed towards said anode electrodes after being accelerated by said electron directing means; and

said anode structure further including a plurality of charge removal electrodes disposed proximate said anode electrodes and operable at a positive voltage relative to said cathodic element for absorbing excess and residual electrons during operation.

. An anode structure for a vacuum matrix cathodoluminescent flat panel display, said display containing an electron-emitting cathodic element and an electron-directing means, said anode structure comprising :

a support element;

a plurality of anode electrodes disposed on said support element, each said anode electrode coated with a layer of cathodoluminescent phosphor capable of luminescence upon impact by fast-moving electrons, said anode electrodes further electrically coupled to a processing unit such that each anode electrode may be set to selected electrical potentials during operation; and

a plurality of charge removal electrodes disposed on said support element and interposed between said anode electrodes; said charge removal electrodes coupled to a power source with an electrical potential more positive than said anode electrodes during operation.

3. A panel display according to claim 1 wherein the height of said charge removal electrodes is higher than the height of the phosphor coated anode electrodes.

4. A panel display according to claim 3 wherein said support element is transparent.

5. A panel display according to claim 3 wherein the ratio between the height of said charge removal electrodes and the width of the anode electrode about 0.3 : 1.

6. A panel display according to claim 3 wherein the shortest distance between the phosphor coating of the anode electrodes and the electron-directing element is at least 0.2mm.

7. A panel display according to claim 3 wherein the charge removal electrodes are electrically connected to the same potential.

8. A panel display according to claim 3 wherein the charge removal electrodes are blackened.

9. A panel display according to claim 3 wherein the anode electrodes are designated as selected or unselected anode electrodes during operation, said selected electrodes being held at an electrical potential of +10v to +500v relative to said cathodes for a predetermined period of time; said nonselected anode pixels being held at an electrical potential of Ov to +30v relative to the cathode for another predetermined period of time; and said charge removal electrodes being held at +20v to +100v relative to said selected anode pixels.

10. An anode structure according to claim 2 wherein the height of said charge removal electrodes is higher than the height of the phosphor coated anode electrodes.

11. An anode structure according to claim 10 wherein said support element is transparent.

12. An anode structure according to claim 10 wherein the ratio between the height of said charge removal electrodes and the width of the anode electrode is about 0.3 : 1.

13. An anode structure according to claim 10 wherein the shortest distance between the phosphor coating of the anode pixels and the electron-directing element is at least 0.2 mm.

14. An anode structure according to claim 10 wherein said support structure is the inner surface of one side of a vacuum envelope of said display structure.

15. An anode structure according to claim 10 wherein the anode electrodes are designated as selected or unselected anode electrodes during operation, said selected electrodes being held at an electrical potential of +10v to +500v relative to said cathodes for a predetermined period of time; said nonselected anode pixels being held at an electrical potential of Ov to +30v relative to the cathode for another predetermined period of time; and said charge removal electrodes being held at +20v to +100v relative to said selected anode pixels.

16. An anode structure according to claim 15 wherein said charge removal electrodes are set at 20-1 OOv more positive than the selected anode electrodes.

17. An anode structure according to claim 9 wherein said charge removal electrodes are set at 20-1 OOv more positive than the selected anode electrodes.

18. A method of charge removal in matrix cathodoluminescent flat panel displays, said display containing an electron emitting cathodic element, a plurality of anode electrodes, and an electron-directing element therebetween, said method comprising : providing a plurality of charge removal electrodes proximate said anode electrodes; and setting the charge removal electrodes to a electrical potential more positive than the electrical potential of the selected anode electrodes.