WO2001008388A1

WO2001008388A1 - Reduced power line driver

Info

Publication number: WO2001008388A1
Application number: PCT/US2000/020265
Authority: WO
Inventors: Robert Bisson; Francois Tremblay
Original assignee: Catena Networks, Inc.
Priority date: 1999-07-26
Filing date: 2000-07-25
Publication date: 2001-02-01
Also published as: JP2003505982A; EP1206872A4; CA2278909A1; EP1206872A1; AU6493400A

Abstract

A telephone line feed circuit for use with a telecommunication line includes a transformer having a primary winding and a secondary winding wound with low resistance conductors, the primary for direct connection to a tip terminal and a ring terminal, and a driver circuit having an output connected to a secondary winding of the transformer for driving the transformer secondary winding directly with substantially no resistance therebetween while maintaining an impedance match between the telecommunications line and the telephone line feed circuit, to thereby reduce power consumption of the driver circuit. The present invention seeks to provide a line interface circuit that allows the significant reduction of driver power, namely up to about 50 %.

Description

REDUCED POWER LINE DRIVER

BACKGROUND OF THE INVENTION This invention relates to a method and system for reducing power consumption in a line driver.

With the increasing popularity of the Internet, there has been a corresponding increase in the demand for high rate digital transmission over the local subscriber loops of telephone companies. A loop is a twisted-pair copper telephone line coupling a user or subscriber telephone to a central office (CO). Traditional data communication equipment uses the voice band of the subscriber loop. Such equipment includes voice band modems, which operate at up to 56 kbps using compression techniques. On the other hand, Integrated Services Digital Network (ISDN) systems have boosted data rates over existing cooper phone lines to 120 kbps. However traditional voice bands equipment is limited by the maximum data rate of the existing switching networks and PCM (Pulse Code Modulation) data highways.

By utilizing the frequency bandwidth of the loop outside the voiceband has enabled other high-speed systems to evolve. However because loops can differ in distance, diameter, age and transmission characteristics depending on the network, they pose some limitations and challenges for designers of these high-speed systems. Current high-speed digital transmission systems of the above type include asymmetric, symmetric, high-rate, and very high-rate digital subscriber loops, conventionally known as ADSL, SDSL, HDSL and VDSL respectively. Normally these and other similar protocols are known as xDSL protocols.

Of these flavors of xDSL, ADSL is intended to co-exist with traditional voice services by using different frequency spectra on the loop. In the future, it is possible that multiple different transmission schemes may be employed in different frequency bands on the same loop, and that these transmission schemes may include traditional analog voice services as well as current and new forms of xDSL. In today's ADSL systems, the plain old telephone services (POTS) uses the frequency spectrum between 0 kHz and 4 kHz and the ADSL uses the frequency spectrum between 30 kHz and 1.1 MHz for data over the telephone line. This is shown schematically in Figure la. ADSL also partitions its frequency spectrum with upstream (subscriber to CO) transmission in a lower frequency band, typically 30 kHz to 138 kHz, and with downstream transmission in a higher frequency band, typically 138 kHz to 550 kHz or 1.1 MHz. ADSL uses a discrete multi-tone (DMT) multi-carrier technique that divides the available bandwidth into approximately 4 kHz sub-channels.

Much effort is being expended by various xDSL hardware manufacturers to reduce overall power dissipation of the xDSL equipment. Although overall power reduction improvements have been made, significant power improvements in the area of line drivers have not occurred. Minor improvements have been due to crest factor reductions that in turn precipitated a slight driver voltage rail reduction at the expense of DSP MIPS. For all of these applications the driver power is not significantly improved. To make xDSL technology attractive, the overall power dissipation must be reduced beyond that of the presently offered solutions. This power dissipation manifests itself in the form of increased operation temperature of the equipment. A number of design constraints are introduced in order to maintain circuits at a reasonable operating temperature, including the inclusion of additional fans, air conditioning, heat sinks and space for thermal ventilation. These constraints significantly increase the material, labor and maintenance cost associated with the system. Furthermore, excessive heat may restrict the density of equipment, thereby increasing the size of the facility hosting the system and/or limiting the number of customers that can be served by a fixed size facility. Thus, reducing the power consumption in communications systems can be a key aspect of any system design.

The line driver is a component that consumes a significant amount of power. Typically, the line driver includes an amplifier for receiving an analog signal from a preceding circuit, such as a digital to analog (DA) converter on the xDSL line card, to drive this signal through a source resistance and a line transformer onto a twisted pair telephone line or loop. The xDSL line drivers commonly in use include a source or feed resistance equal to the reference impedance of the loop, usually 100 ohms implemented as a series resistance. Typical line drivers use two amplifiers working differentially.

Various forms of line interface circuits are known, and which are particularly applicable to POTS system. For example U.S. Pat. No. 5,258,713 describes an impedance generator for a telephone line interface circuit, which uses a sensing circuit coupled to the feed resistors in series with the tip and ring lines. The sensing circuit produces a feedback signal for use by an impedance generator circuit. In U.S. Pat. No. 5,661,794 also describes a telephone line interface circuit, however loop current and common mode current are through the feed resistors are monitored and converted to digital signals for providing programmable control of the operating conditions of the circuit. Other exemplary line interface circuits are described in U.S. Pat. No. 4,764,956, U.S. Pat. No. 5,052,039 and U.S. Pat. No. 5,333,192. Thus it appears that without exception current line interface circuits, for use either with POST or xDSL systems, utilize a series feed resistance to match the impedance on the line, which is relatively wasteful of power.

Accordingly there is a need for a line driver circuit that exhibits lower power consumption than current implementations and which is easily implemented in integrated circuit form.

SUMMARY OF THE INVENTION In accordance with this invention, a telephone line feed circuit for use with a telecommunication line includes a transformer having a primary winding and a secondary winding wound with low resistance conductors, the primary for direct connection to a tip terminal and a ring terminal, and a driver circuit having an output connected to a secondary winding of the transformer for driving the transformer secondary winding directly with substantially no resistance therebetween while maintaining an impedance match between the telecommunications line and the telephone line feed circuit, to thereby reduce power consumption of the driver circuit. The present invention seeks to provide a line interface circuit that allows the significant reduction of driver power, namely up to about 50%.

In one embodiment the line feed circuit includes an active impedance synthesis circuit for generating the line impedance for xDSL signals. In another embodiment the line feed circuit includes an active impedance synthesis circuit for generating the line impedance for POTS signals.

In a further embodiment the line feed circuit is coupled to an integrated POTS/xDSL line card.

In a still further embodiment the line feed circuit includes an active impedance synthesis circuit for generating line impedances for both xDSL and POTS signals. BRIEF DESCRIPTION OF THE DRAWINGS

These and other features of the prefened embodiments of the invention will become more apparent in the following detailed description in which reference is made to the appended drawings. Figure 1 is a schematic diagram of a line feed circuit according to the prior art.

Figure 2 is a schematic diagram of a line feed circuit according to an embodiment of the invention.

Figure 3 is a schematic diagram of a line feed circuit with a current sense feedback.

Figure 4 is a schematic diagram of a line feed circuit with a current sense feedback according to a further embodiment of the invention.

Figure 5 is a schematic diagram of a line feed circuit with a current sense feedback using a transformer. Figure 6 is a schematic diagram of a line feed circuit with a current sense feedback using a transformer according to a further embodiment of the invention.

Figure 7 is a schematic diagram of a line feed circuit with a voltage sense feedback.

DESCRIPTION OF SPECIFIC EMBODIMENTS

In the following description like numerals refer to like structures in the drawings.

Referring to Figure 1 , a line feed circuit according to the prior art is shown generally by numeral 10. The line feed circuit 10 includes driver stage 12, feed resistors 18 and a line transformer 19. The driver stage normally comprises two driver amplifier circuits 14 and 16 (normally fixed-gain amplifiers) for supplying a subscriber line comprising tip T and ring R lines, via respective series feed resistors R_F 18. A load resistance R_L normally terminates the line. For xDSL signals the line is normally terminated by a load resistance R_L of typically 100 ohms, thus the series feed resistors R_F are chosen to equal the reference impedance of the loop, i.e. 50 ohms each. Other values of the feed resistors are chosen for different signals such as POTS signals. Furthermore as illustrated in Figure 1, the drive amplifiers 14 and 16 are each powered by (+)V_suppi_y voltage rails referenced to ground. Alternatively the drive amplifiers may be powered by (")V_SUppi_y/2 and (+)V_suppι_y/2 voltage rails. For convenience the following definitions of specific terms that are used in the following description are provided:

V_h = total voltage headroom required on side of the voltage rail for allowing proper biasing of the drive amplifiers, typically 3V/2; R_s = total source resistance;

R_tr — tip and ring load resistance, 100 ohms for xDSL; V_tr = tip and ring voltage, 2V rms;

I_tr = tip and ring cunent, 20 mA rms (or 16.2 dBm into 100 ohms); σ = CF = crest factor, which is the ratio of the peak signal to the rms signal ( typically 5.3 for the g.Lite standard); R_L = load impedance; R_F = feed impedance; n = transformer turns ratio; Vp/_d = peak output voltage at one driver; P_t = total power for two driver amplifiers;

V_p._p = total peak-to-peak voltage at output of drivers; l_b = quiescent bias cunent per drive amplifier; _suppiy = total driver amplifier supply voltage across supply rails; and V2/π = (average DSL cunent)/(rms DSL cunent). Refening back to the circuit of Figure 1, the peak voltage at one driver may be derived as follows:

V_p/d = (R_F + R_L)/(n*R_L)*V_tr/2*σ; the supply voltage rails required, given the desired voltage headroom above is then given by: V_supply = (V_h + V_p/d)*2.

The total differential driver power consumption for xDSL signals can be defined in terms of the driver supply voltage and the required cunent to be driven onto the line, as follows:

Pt = V_supply *(V2/π*n*V_tr/R_L + 2*I_b) P_drlve = 2*(Vh + ((R_s+R_tr)/(n*R_tr)*V_t,/2 * _σ)*(V2/π*nV_tr/R_L + 2*I_b) (1) The supply voltage Vsupply is a function of the total resistance, the cunent and the crest factor requirement. Power consumption can be calculated for the circuit in Figure 1 assuming

C_F ⁼ 5.3; V_h=1.5V;

R_F=100 ;and

R_L=100 .

Then using equation (1) the driver power:

P_dπv_e = 2*(1.5V + (2 * 2V_rms/2 * 5.3)) * V2/π* 2/100 +2*7 mA = 557 mW

According to the present invention, a mechanism is provided for reducing the nominal DSL driver power consumption (ideally by 50%) by driving the DSL signal directly onto the line and not through a source resistance. The source resistance is actively generated through feedback.

Accordingly, referring to Figure 2, a telephone line feed circuit 20 for use with a telecommunication line, comprises a transformer 29 having a primary and secondary winding wound with low resistance conductors; the primary for direct connection to the tip T terminal and a ring terminal R of a telecommunication line, a driver circuit 22 having an output 23 connected to the secondary winding of the transformer for driving the transformer secondary winding directly with substantially no resistance therebetween, a sensing circuit 27 for producing a feedback signal which is combined in a summing circuit 21 with the signal from the preceding xDSL/POTS circuit (not shown) to the driver circuit 22, while maintaining an impedance match between the telecommunications line and the telephone line feed circuit, to thereby reduce power consumption of the driver circuit 22.

The feedback signal from the sensing circuit 27 represents either the loop current I^ flowing differentially in the tip and ring lines or the voltage Vtr between the tip and ring lines. In a specific embodiment the drive stage 22 includes two drive amplifiers operating differentially.

Power consumption for the circuit of Figure 2 is calculated as follows, assuming R_F= 0— because the driver circuit 22 is coupled directly to the transformer 29 — and R_L = 100 ; then from equation 1 :

P_dπve = 2*(1.5V+ (1 * 2Vrms/2 * 5.3 * 2)) *V2/π* 2/100 + 2*7 mA. = 313 mW.

Thus, the power consumption is reduced from 557 mW to 313 mW, a reduction of 44%. Referring to Figure 3 a line feed circuit according to a first embodiment of the invention is shown by numeral 30. In the following description the following additional symbols are used:

Z_out - the source impedance of the line. This impedance is usually 100 ohms in the xDSL band. sense ⁼ sense resistor resistance

Isense ⁼ cunent though sense resistor R_sense

K = gain of the sense amplifier.

Referring back to Figure 3, the line feed circuit 30 comprises two voltage sources 32 and 34 , coupled via respective cunent sense resistors 36 and 38 to the secondary winding of a line transformer 40. The cunent I_sense through the each sense resistor R_sense generates a voltage V_senSe, which is sensed and applied to the differential inputs of a sense amplifier 42. The output of the sense amplifier is amplified and fed back as an input to the voltage sources 32 and 34. The gain K of the sense amplifier 42 is chosen so that the voltage feedback to drivers 32 and 34 causes the drivers to drive a voltage sufficient to maintain the output impedance at Z_out.

The line feed circuit 30 provides a voltage source with a cunent sense. Although the sensing circuit uses a sense resistor to sense the cunent, this could be a reduced value feed, which would reduce the overall power savings. In operation, the driver stage must drive a cunent of I_fee = 20 ma rms into a load Z_out of approximately 100 ohms. Thus the voltage at the output of the voltage source 32 and 34 is given by

V₀ut ⁼ (Zout - 2*Rfeed) * Ifeed

= (100 -2*5 ) * Ife_ed

= 90*Ifeed

The gain K of the feedback amplifier is thus chosen to be 90. Because a separate drive is used to drive the tip and ring lines, the gain of these voltage source drivers 32 and 34 is chosen to be (+)0.5 and (-)0.5 respectively. These amplifiers may be easily implemented by one of many known circuits as is well known in the art and will not be discussed further. Furthermore the summing circuit in the illustrated embodiment is implemented using a simple series connected resistors as shown. However, other summing circuits known in the art may equally well be used.

A variation of the circuit of Figure 3 is shown in Figure 4. In this second embodiment the cunent sensing is on the tip and ring side (primary) of the transformer. The sense resistors are indicated as 36' and 38' respectively. Once again the gain of the feedback amplifier K is 90, based on the computation as for the circuit of Figure 3.

Referring to Figure 5, a third embodiment of the invention is indicated generally by numeral 50. In this embodiment using a sense transformer 52 performs the cunent sense. An advantage of this configuration is that there is no power loss by using a sense resistor. The operation of the circuit is similar to that of Figure 3, however the output voltage of the voltage sources 32 and 34 is given by: out ⁼ Ifeed (Z₀ut)

= W(100)

Thus the gain K of the feedback amplifier 42 is chosen to be 100. Cunent sense transformers are well known in the art and will not be discussed further.

A variation of the circuit of Figure 5 is shown in Figure 6. In this embodiment the cunent sensing is performed on the tip and ring side of the line transformer 40.

Referring to Figure 7, a fifth embodiment of the active source resistance generation circuit 70 for the driver stage comprises two cunent sources 72 and 74, coupled directly to the secondary winding of a line transformer 40. A voltage sense amplifier 76 is coupled to receive the voltage across the transformer primary Vtr i.e. at the line side, which is amplified by the gain K' of the amplifier 76 and fed back as an input to the cunent sources 72 and 74. The gain K' of the sense amplifier 76 is chosen so that the cunent feed back to drivers 72 and 74 causes the drivers to drive a cunent into the secondary of the transformer 40 sufficient to match the output impedance to Zout. The cunent I_out driven by the cunent sources may be given by

= V_Λ/100

Thus the gain K' of the amplifier 76 is 0.01

Although the invention has been described with reference to certain specific embodiments, various modifications thereof will be apparent to those skilled in the art without departing from the spirit and scope of the invention as outlined in the claims appended hereto. For example the turns ratio of the line transformer used for illustration purposes is 1 :1. Other turns ratios may equally well be used, such as 1 :2, 2:1, etc.

Claims

WHAT IS CLAIMED IS:

l. A telephone line feed circuit for use with a telecommunication line having a tip terminal and a ring terminal, comprising:

a) a transformer having a primary winding and a secondary winding each wound with low resistance conductors, the primary winding for direct connection to the tip terminal and the ring terminal of said telecommunication line; and

b) a driver circuit having an output coupled to the transformer secondary winding, the driver circuit operative to drive the transformer secondary winding directly with substantially no resistance therebetween while maintaining an impedance match between the telecommunication line and the telephone line feed circuit.

2. A circuit as defined in claim 1, wherein said driver circuit is operative to receive signals from an integrated POTS and xDSL line card.

3. A circuit as defined in claim 1, wherein said driver circuit includes an active impedance synthesis circuit for generating said line impedance for DSL signals.

4. A circuit as defined in claim 3, wherein said impedance synthesis circuit is operative to synthesize matching impedance by sensing a cunent in the telecommunication line and driving a voltage source with a conesponding voltage.

5. A circuit as defined in claim 4, wherein said cunent being sensed is on the secondary side of said transformer.

6. A circuit as defined in claim 4, said cunent being sensed on the primary side of said transformer.

7. A circuit as defined in claim 5, including a sense resistor coupled in series in said line.

8. A circuit as defined in claim 6, including a sense resistor coupled in series in said line.

9. A circuit as defined in claim 5, including a sense transformer coupled in series in said line.

10. A circuit as defined in claim 6, including a sense transformer .coupled in series in said line.

11. A circuit as defined in claim 3, wherein said impedance synthesis circuit is operative to synthesize matching impedance by sensing a voltage on the telecommunication line and driving a cunent source with a conesponding cunent.

12. A circuit as defined in claim 11 , wherein said voltage being sensed is on the secondary winding side of said transformer.

13. A circuit as defined in claim 11 , wherein said voltage being sensed is on the primary winding side of said transformer.