WO2001006561A3 - Ferroelectric memory capacitor - Google Patents

Ferroelectric memory capacitor Download PDF

Info

Publication number
WO2001006561A3
WO2001006561A3 PCT/DE2000/002184 DE0002184W WO0106561A3 WO 2001006561 A3 WO2001006561 A3 WO 2001006561A3 DE 0002184 W DE0002184 W DE 0002184W WO 0106561 A3 WO0106561 A3 WO 0106561A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory capacitor
ferroelectric memory
dielectric
iridium
ruthenium
Prior art date
Application number
PCT/DE2000/002184
Other languages
German (de)
French (fr)
Other versions
WO2001006561A2 (en
Inventor
Hermann Kohlstedt
Original Assignee
Forschungszentrum Juelich Gmbh
Hermann Kohlstedt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Forschungszentrum Juelich Gmbh, Hermann Kohlstedt filed Critical Forschungszentrum Juelich Gmbh
Publication of WO2001006561A2 publication Critical patent/WO2001006561A2/en
Publication of WO2001006561A3 publication Critical patent/WO2001006561A3/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/75Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention relates to a memory capacitor for use in DRAM memories which has electrodes consisting of ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir) or iridium dioxide (IrO2) and a dielectric consisting of barium strontium titanate (BST). In order to obtain the smallest possible leakage currents, the dielectric is coated on both sides with the finest possible platinum (Pt) coating. This memory capacitor structure is easily configured by conventional etching processes, such as reactive ionic etching (RIE).
PCT/DE2000/002184 1999-07-14 2000-07-04 Ferroelectric memory capacitor WO2001006561A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19932844.7 1999-07-14
DE19932844A DE19932844A1 (en) 1999-07-14 1999-07-14 Storage capacitor

Publications (2)

Publication Number Publication Date
WO2001006561A2 WO2001006561A2 (en) 2001-01-25
WO2001006561A3 true WO2001006561A3 (en) 2001-05-17

Family

ID=7914712

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2000/002184 WO2001006561A2 (en) 1999-07-14 2000-07-04 Ferroelectric memory capacitor

Country Status (2)

Country Link
DE (1) DE19932844A1 (en)
WO (1) WO2001006561A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5619393A (en) * 1994-08-01 1997-04-08 Texas Instruments Incorporated High-dielectric-constant material electrodes comprising thin ruthenium dioxide layers
US5824563A (en) * 1995-05-29 1998-10-20 Samsung Electronics Co., Ltd. Method for forming lower electrode of capacitor
US5905278A (en) * 1996-12-11 1999-05-18 Fujitsu Limited Semiconductor device having a dielectric film and a fabrication process thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5619393A (en) * 1994-08-01 1997-04-08 Texas Instruments Incorporated High-dielectric-constant material electrodes comprising thin ruthenium dioxide layers
US5824563A (en) * 1995-05-29 1998-10-20 Samsung Electronics Co., Ltd. Method for forming lower electrode of capacitor
US5905278A (en) * 1996-12-11 1999-05-18 Fujitsu Limited Semiconductor device having a dielectric film and a fabrication process thereof

Also Published As

Publication number Publication date
DE19932844A1 (en) 2001-01-25
WO2001006561A2 (en) 2001-01-25

Similar Documents

Publication Publication Date Title
KR0147640B1 (en) Capacitor of semiconductor device & its fabrication method
KR960026808A (en) Pin type capacitors and manufacturing method thereof
CA2158165A1 (en) Hybrid wet-slug and electrochemical electrode capacitor
JP2001501375A (en) Semiconductor device having a protective barrier against staple cells
US5861332A (en) Method for fabricating capacitors of semiconductor devices
EP1298730A3 (en) Ferroelectric memory and method for fabricating the same
US6476433B1 (en) Semiconductor interconnection structure and method
WO2001006561A3 (en) Ferroelectric memory capacitor
KR960009189A (en) Ferroelectric Capacitor Manufacturing Method
KR100471163B1 (en) Methods of forming a semiconductor device having capacitors
US6596580B2 (en) Recess Pt structure for high k stacked capacitor in DRAM and FRAM, and the method to form this structure
KR100200753B1 (en) Ferroelectric capacitor of semiconductor device and manufacturing method thereof
US6420267B1 (en) Method for forming an integrated barrier/plug for a stacked capacitor
JPH07235639A (en) Semiconductor device
KR100431744B1 (en) Method of fabricating capacitor in semiconductor device
KR970054183A (en) Manufacturing method of FRAM cell
US6218231B1 (en) Methods for fabricating high dielectric capacitors of semiconductor devices
KR100362198B1 (en) A method of forming ferroelectric capacitor in semiconductor device
Fukushima Conductive Oxide Electrodes for LSI Memory Capacitors
KR100493008B1 (en) Semiconductor memory device having an electrode formed of conductive oxide
KR20030028044A (en) Ferroelectric memory device and method of fabricating the same
KR19990086181A (en) Capacitor of Semiconductor Device and Manufacturing Method Thereof
KR19980077149A (en) Capacitor of Ferroelectric Memory with Multi-layered Electrode Structure and Manufacturing Method Thereof
KR970060494A (en) Capacitor structure
KR19980029365A (en) Method of manufacturing ferroelectric capacitor

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): JP US

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP