WO2000079390A1 - Mise a jour de programme d'amorçage de microprocesseur - Google Patents

Mise a jour de programme d'amorçage de microprocesseur Download PDF

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Publication number
WO2000079390A1
WO2000079390A1 PCT/FI2000/000552 FI0000552W WO0079390A1 WO 2000079390 A1 WO2000079390 A1 WO 2000079390A1 FI 0000552 W FI0000552 W FI 0000552W WO 0079390 A1 WO0079390 A1 WO 0079390A1
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WO
WIPO (PCT)
Prior art keywords
microprocessor
boot software
watchdog timer
connection
software
Prior art date
Application number
PCT/FI2000/000552
Other languages
English (en)
Inventor
Marko Holappa
Tommi Huhtala
Original Assignee
Nokia Networks Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Networks Oy filed Critical Nokia Networks Oy
Priority to AU54095/00A priority Critical patent/AU5409500A/en
Publication of WO2000079390A1 publication Critical patent/WO2000079390A1/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1415—Saving, restoring, recovering or retrying at system level
    • G06F11/1433—Saving, restoring, recovering or retrying at system level during software upgrading
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs

Definitions

  • the invention relates to two methods of updating boot software in a microprocessor, and to systems using the methods.
  • the boot software in a microprocessor refers to software that is executed during start-up of the microprocessor.
  • BIOS Basic Input/Output System
  • BIOS Basic Input/Output System
  • the term kernel may also be associated with boot software.
  • the kernel refers to, for example, the Input/Output Handler software of the MS-DOS operating system, which uses BIOS services for implementing disk management, memory management and other input/output operations.
  • boot software is to be understood broadly, since the terminology is not necessarily established, i.e. the term refers to parts of the software or the entire software carrying out the start-up of a microprocessor.
  • Updating boot software refers to an operation during which the old boot software in the memory of a microprocessor is replaced with new boot software obtained over a data transmission connection.
  • a data transmission connection refers to, for example, the transmission of new boot software locally by means of a communication port or a disk drive.
  • a data transmission connection may also be implemented over long distances by using a data transmission device connected to a communication port of the microprocessor. Consequently, data transmission can be implemented over telecommunication networks, from a distance of, for example, hundreds or thousands of kilometres, if need be.
  • a microprocessor can be placed for example in a telecommunica- tion device in the field; for example a base station used in mobile communication systems usually comprises several microprocessors.
  • Software updates in devices in the field can be performed over a telecommunication network connected to the device.
  • a service person has to perform software updates on site or, alternatively, parts of the device have to be sent to a factory or service centre to be updated.
  • Usually only the application software is updated, but at times the boot software has to be updated, too. If problems occur during the update of boot software, the worst outcome is that the microprocessor no longer properly boots or, alternatively, remains in what is known as a reset loop, i.e. keeps on booting.
  • An object of the invention is to provide a method and an apparatus for implementing the method so as to solve the above problems. This is achieved by the method to be described next.
  • the method of updating the boot software of a microprocessor comprises: replacing the old boot software in the microprocessor's memory with new boot software obtained over a data transmission connection; rebooting the microprocessor by the new boot software; starting a watchdog timer for monitoring the microprocessor.
  • the boot software update is assumed to have been successful and the watchdog timer is restarted; if the microprocessor does not send a signal to the watchdog timer before the watchdog timer expires, the watchdog timer reboots the microprocessor; if at least a predetermined number of microprocessor reboots are performed by the watchdog timer within a given time, the boot software update is assumed to have failed and the microprocessor is rebooted by using recovery boot software in the microprocessor's write-protected mem- ory, the boot software in the microprocessor's memory is replaced with the new boot software obtained over the data transmission connection, and the method continues from the second step where the microprocessor is rebooted by using the new boot software.
  • the invention also relates to a second method of updating the boot software of a microprocessor, comprising: replacing the old boot software in the microprocessor's memory with new boot software obtained over a data transmission connection.
  • the method comprises starting a time counter; rebooting the microprocessor by the new boot software; starting a watchdog timer for monitoring the microprocessor; if the microprocessor sends a signal to the watchdog timer before the watchdog timer expires, the boot software update is assumed to have been successful and the watchdog timer is restarted and the time counter is switched off; if the microprocessor does not send a signal to the watchdog timer before the watchdog timer expires, the watchdog timer reboots the microprocessor; if the time counter indicates that a predetermined time has lapsed, the boot software update is assumed to have failed and the microprocessor is rebooted by recovery boot software in the microprocessor's write-protected memory, the boot software in the microprocessor's memory is replaced with the new boot software obtained
  • the invention further relates to an update system for a microprocessor's boot software, comprising: a microprocessor; an erasable memory in which the boot software is stored and which is connected to the microprocessor; a watchdog timer connected to the microprocessor, whereby the micro- processor sends a toggle signal after successful start-up to the watchdog timer over a toggle signal connection and the watchdog timer is restarted; a connection from the watchdog timer to the microprocessor, whereby the watchdog timer sends a reset signal for rebooting the microprocessor over said connection to the microprocessor when the watchdog timer expires; a data transmission connection connected to the microprocessor for receiving new boot software; pointer means for indicating to the microprocessor which boot software is to be used; copying means for copying the new boot software obtained over the data transmission connection to replace the old boot software in the erasable memory.
  • the system further comprises: a write-protected memory in which recovery boot software is stored for booting the microprocessor in problem situations; a reset counter, which is connected to the microprocessor by the toggle signal connection and which is reset to zero when a toggle signal is received from the toggle signal connection; a time counter, which is connected to the microprocessor by the toggle signal connection and which is reset to zero when a toggle signal is received from the toggle signal connection; a connection from the time counter to the reset counter, over which connection the time counter gives to the reset counter, after a predetermined time has expired, a signal that resets the reset counter to zero; a connection from the reset counter to the pointer means, over which connection the reset counter, when the reset counter indicates at least a predetermined number of occurred resets, sets the pointer means to indicate the recovery boot software in the write-protected memory; a connection from the copying means to the pointer means, over which connection the copying means, after copying has taken place, set the pointer means to indicate the new boot software in the erasable memory
  • the invention also relates to a second update system for a microprocessor's boot software, comprising: a microprocessor; an erasable memory in which the boot software is stored and which is connected to the microprocessor; a watchdog timer connected to the microprocessor, whereby the microprocessor sends a toggle signal after successful start-up to the watchdog timer over a toggle signal connection and the watchdog timer is restarted; a connection from the watchdog timer to the microprocessor, whereby the watchdog timer sends a reset signal for rebooting the microprocessor over said connection to the microprocessor when the watchdog timer has expired; a data transmission connection connected to the microprocessor for receiving new boot software; pointer means for indicating to the microprocessor which boot software is to be used; copying means for copying the new boot software obtained over the data transmission connection to replace the old boot software in the erasable memory.
  • the second system further comprises: a write- protected memory in which recovery boot software is stored for booting the microprocessor in problem situations; a time counter, which is connected to the microprocessor by the toggle signal connection and which is reset to zero when a toggle signal is received from the toggle signal connection; a connection from the time counter to the pointer means, over which connection the time counter, after a predetermined time has expired, sets the pointer means to indicate the recovery boot software in the write-protected memory; a connection from, the copying means to the pointer means, over which connection the copying means, after copying has taken place, set the pointer means to indicate the new boot software in the erasable memory.
  • the invention is based on providing a device, which uses a micro- processor, already in the factory with a special recovery boot program including at least the necessary software parts for booting the processor.
  • the recovery boot program is stored in a write-protected memory, whereby it cannot be accidentally made inoperative.
  • the method and system of the invention provide a plurality of ad- vantages.
  • a service person does not have to travel to the device, but the device is able to automatically re- cover. This eliminates travel expenses. Neither does the device have to be delivered to service. The interruption in the use of the device will be short compared with a situation where a new device component would have to be delivered from the service centre.
  • Figure 1 shows an example of the structure of an update system
  • Figure 2 shows a second example of the structure of an update system
  • Figures 3A and 3B are flow diagrams of an update method; Figure 3C shows a second update method.
  • the system comprises a microprocessor 100 and an erasable non-volatile memory 102, which is connected to the microprocessor 100 and in which boot software 104 is stored.
  • the memory is erasable to allow updating of its contents. Examples of erasable memories that can be used include FLASH memory circuits or (electronically) erasable programmable read-only- memories ((E)EPROM).
  • the boot software 104 usually serves to load other software 106 on the memory circuits 102, i.e. usually the actual application software, to a random access memory (RAM) after the microprocessor has been started up 100.
  • Figure 1 does not show the random access memory separately, as it is thought to be included in the parts of the microprocessor 100 that are not shown herein.
  • a watchdog timer 112 is connected to the microprocessor 100 by a toggle signal connection 122.
  • Watchdogs are generally used in real time systems, which have to have a means of dealing with intra-system problems, for example when a program goes into an endless loop, or hardware problems that prevent the software from operating correctly.
  • the name 'watchdog' indicates that it has to be 'stroked' in order for it not to 'bite'. This means that a program has to restart the watchdog timer at regular intervals; otherwise the watchdog timer expires, leading to hardware reset.
  • the watchdog is so stroked that after a successful start-up the microprocessor 100 sends over the toggle signal connection 122 a toggle signal to the watchdog timer 112, whereby the watchdog timer 112 is restarted, and no hardware reset occurs. If problems arise during start-up of the microprocessor 100, the watchdog is not stroked, and when the watchdog timer 1 12 expires, the watchdog timer 112 sends over a connection 120 from the watchdog timer 112 to the microprocessor 100 a reset signal causing microprocessor (100) reset to the microprocessor 100.
  • the boot software 104 can for instance calculate a check sum for the kernel, and if the check sum is incorrect, the microprocessor 100 will not boot.
  • a data transmission connection refers, for example, to the transmission of new boot software locally by means of a communication port or a disk drive.
  • a data transmission connection can also be implemented over long distances by the use of a data transmission device connected to a communication port in the microprocessor. Consequently, data transmission can be implemented over telecommunication networks, for example from a distance of hundreds or thousands of kilometres, if need be. For example in product development it may be advantageous to use a communication port, whereas, when the device is located in the field, the boot software 124 can be transmitted over the telecommunication network.
  • Telecommunication devices such as base stations, generally have what is known as a master/slave structure.
  • One of the circuit cards of the device is defined as a master card, in which the software of all slave cards is stored.
  • the software is updated by transmission of new software over a telecommunication network to the master card, which then updates the slave cards. If the software update fails in a slave card, the software does not have to be retransmitted over the telecommunication network, but the old or new software is obtained from the master card.
  • an apparatus using the master/slave structure can automatically recover from problems occurring in the update of boot software.
  • the microprocessor 100 comprises pointer means 118 for indicating the boot software 104, 110 to be used to the microprocessor 100.
  • the microprocessor also comprises copying means 128 for copying the new boot software 124 obtained over the data transmission connection 126 to replace the old boot software 104 in the erasable memory 102.
  • arrow 124 denotes this update, i.e. the new boot software 124 is copied onto the original old boot software 104.
  • the microprocessor 100 comprises a write-protected memory 108, in which the recovery boot software 110 is stored, and the recovery boot software 1 10 is used to boot the microprocessor 100 when problems arise.
  • the write-protected memory 108 is part of the read-only memory (ROM) in the processor 100 or of a read-only memory connected to the processor 100, but it can also be part of the erasable memory 102, for example a FLASH memory, part of which is protected by software so that it is write-protected, i.e. said part of the memory operates as a write-protected memory.
  • Software stored in the write-protected memory 102 is sometimes called firmware.
  • FLASH memory circuits are usually surface-mounted to a circuit board, and therefore very difficult or impossible to change under field conditions, which means that a device having corrupt boot software always has to be taken to a service centre or even to the factory to be repaired.
  • the apparatus also comprises a connection 134 from the copying means 128 to the pointer means 118, over which connection 134 the copying means 128 set, after copying, the pointer means 118 to indicate the new boot software 124 in the erasable memory 104.
  • a reset counter 116 which counts resets, is connected to the microprocessor 100 by means of the toggle signal connection 122. The reset counter 116 is reset to zero when a toggle signal is re- ceived from the toggle signal connection 122.
  • a time counter 114 is connected to the microprocessor 100 by means of the toggle signal connection 122, and the time counter 114 is reset to zero when a toggle signal is received from the toggle signal connection 122.
  • connection 130 from the time counter 114 to the reset counter 116, and over the connection 130 the time counter 114 gives a signal for resetting the reset counter 116 to zero to the reset counter 116 after a pre- determined time has expired.
  • connection 132 from the reset counter 116 to the pointer means 118, and over the connection 132 the reset counter 116 sets the pointer means 118 to indicate the recovery boot software 110 in the write-pro- tected memory 108 when the reset counter 116 indicates at least a predetermined number of occurred resets.
  • the above-described mechanism enables the recovery boot software 110 to be changed as the boot software to be used when the device performs a given number of resets within a predetermined time, i.e. for example three resets in five minutes indicates that the boot software may be corrupt.
  • a predetermined time i.e. for example three resets in five minutes indicates that the boot software may be corrupt.
  • said predetermined limits are set such that they allow detection of problems occurring in booting the microprocessor 100.
  • FIG. 2 A second preferred embodiment of the system is presented next in Figure 2.
  • the embodiment of Figure 2 is identical to that shown in Figure 1 , except that the mechanism for changing the boot software to be used in booting the microprocessor 100 in failure, i.e. when the microprocessor 100 does not start up properly by the new boot software 124, is different.
  • a time counter 114 for counting time is connected to the microproc- essor 100 by means of the toggle signal connection 122, and the time counter 114 is reset to zero when a toggle signal is received from the toggle signal connection 122.
  • connection 200 from the time counter 114 to the pointer means 118, and over the connection 200 the time counter 114 sets the pointer means 118 to indicate the recovery boot software 110 in the write-protected memory 108 after a predetermined time has expired.
  • the mechanism described is slightly simpler than that presented in the embodiment of Figure 1.
  • the mechanism of Figure 2 allows the recovery boot software 110 to be replaced as the boot software to be used when the device does not boot properly within a predetermined time, i.e. within for example five minutes.
  • a predetermined time limit is set such that it allows the detection of problems in booting the microprocessor.
  • the old boot software in the microprocessor's memory is replaced with new boot software obtained over the data transmission connection.
  • the microprocessor is rebooted by using the new boot software.
  • a watchdog timer for monitoring the microprocessor is started up.
  • the success of the start-up is then tested in block 308.
  • the test is: did the watchdog timer receive, before expiration, a signal from the microprocessor, which caused the watchdog time to be restarted. If the microprocessor sends a signal to the watchdog timer before the watchdog timer expires, the process moves to block 310, where the boot software update is assumed to have been successful, and the watchdog timer is restarted. If the microprocessor does not send a signal to the watchdog timer before the watchdog timer expires, the process moves to block 314, where the watchdog timer reboots the microprocessor.
  • the crucial test is then carried out in block 316, i.e. if at least a given number of microprocessor reboots have occurred within a given time. If at least a predetermined number of microprocessor reboots performed by the watchdog timer occur within a predetermined time, then the boot software up- date is assumed to have failed, and the recovery measures are carried out in accordance with block 318.
  • FIG. 3B shows the contents of block 318 in greater detail.
  • the functionality of block 318 is composed of two blocks, 330 and 332.
  • the microprocessor is rebooted by using the recovery boot software in the write-protected memory of the microprocessor.
  • the boot software in the microprocessor's memory is replaced with new boot software obtained over the data transmission connection, i.e. the boot software is updated again.
  • the process then continues with another measure, i.e. block 304, by rebooting the microprocessor by the new boot software. If the microprocessor does not boot properly by the new boot software, the recovery can be repeated a few times. There is naturally a limit at some point, i.e.
  • An alternative is to use some diagnostics software over the data transmission connection after the microprocessor has been booted by the recovery boot software. This may allow the fault to be remote diagnosed, and the service person is able to take along the necessary tools when starting for the field.
  • Figure 3C shows a second preferred embodiment of the method corresponding to the second preferred embodiment of the update system.
  • the meanings of the blocks are the same as in the first embodiment shown Figure 3A and 3B, except that between blocks 302 and 304 is a new block 340, between blocks 306 and 308 a new block 342, and between blocks 310 and 312 a new block 344.
  • the time counter is started.
  • the test of block 342 is performed after the microprocessor has been rebooted and the watchdog timer started. If the time counter indicates that a predetermined time has lapsed, the assumption is that the boot software update has failed, and the microprocessor is rebooted in block 330 by using the recovery boot software in the microprocessor's write-protected memory; in block 332, the boot software in the microprocessor's memory is replaced with new boot software ob- tained over the data transmission connection, and the process continues from the second step of the method, i.e. block 340, where the time counter is started.
  • the test of block 308 is performed. If the microprocessor sends a signal to the watchdog timer before the watchdog timer has expired, the process continues in block 310, where an assumption is made that the boot software update has been successfully carried out, and the watchdog timer is restarted; and, finally, in block 344, the time counter is switched off. If the microprocessor does not send a signal to the watchdog timer before the watchdog timer has expired, then in block 314, the watchdog timer reboots the microprocessor.
  • Parts of the devices according to the invention are preferably implemented as software to be executed in the microprocessor 100.
  • Parts of the network part of the invention are also implemented by hardware, e.g. as ASIC (Application Specific Integrated Circuit) or by separate logic, such as PLD (Programmable Logic Device).
  • the pointer means 1 18, the reset counter 116, and the timer counter 114 are preferably implemented by hardware, and the copying means 128 by software.

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)

Abstract

L'invention concerne deux procédés de mise à jour de programme d'amorçage dans un microprocesseur, et des systèmes de mise à jour utilisant les procédés. Le procédé comporte les étapes consistant à: (302) remplacer l'ancien programme d'amorçage dans la mémoire du microprocesseur à l'aide d'un nouveau programme d'amorçage obtenu par une connexion de transmission de données; (304) réamorcer le microprocesseur au moyen du nouveau programme d'amorçage; (306) mettre en marche une horloge de surveillance du microprocesseur; (308 OUI) si le microprocesseur envoie un signal à l'horloge de surveillance avant expiration du délai de surveillance, alors (310) la mise à jour du programme d'amorçage est présumée réussie et l'horloge de surveillance est remise en marche; (308 NON) si le microprocesseur n'envoie pas de signal à l'horloge de surveillance avant expiration du délai de surveillance, alors (314) l'horloge de surveillance réamorce le microprocesseur ; (316 OUI) si au moins un nombre prédéterminé d'amorçages du microprocesseur sont effectués par l'horloge de surveillance pendant une période donnée, la mise à jour du programme d'amorçage est présumée non réussie et (330) le microprocesseur est réamorcé au moyen du programme d'amorçage récupéré dans la mémoire protégée en écriture du microprocesseur, le programme d'amorçage situé dans la mémoire du microprocesseur est (332) remplacé par le nouveau programme d'amorçage obtenu par une connexion de transmission de données, et le procédé se poursuit à partir de la deuxième étape (304) dans laquelle le microprocesseur est réamorcé au moyen du nouveau programme d'amorçage.
PCT/FI2000/000552 1999-06-21 2000-06-20 Mise a jour de programme d'amorçage de microprocesseur WO2000079390A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU54095/00A AU5409500A (en) 1999-06-21 2000-06-20 Updating microprocessor boot software

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI991411A FI991411A (fi) 1999-06-21 1999-06-21 Mikroprosessorin alkulatausohjelmiston päivittäminen
FI991411 1999-06-21

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WO2000079390A1 true WO2000079390A1 (fr) 2000-12-28

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