WO2000076200A1

WO2000076200A1 - Solid-state imaging device, method for driving the same, and image input device

Info

Publication number: WO2000076200A1
Application number: PCT/JP2000/003735
Authority: WO
Inventors: Toshiaki Azuma; Katsunori Noguchi
Original assignee: Sony Corporation
Priority date: 1999-06-09
Filing date: 2000-06-08
Publication date: 2000-12-14
Also published as: DE60020324T2; DE60020324D1; EP1102467A1; JP2001057622A; EP1102467B1; JP4419275B2; US6744539B1; EP1102467A4

Abstract

A solid-state imaging device having a multiplex structure in which charges in adjacent pixels in the same sensor line are summed, comprising a first CCD register (10) for transferring the charge taken in by a first light-receiving pixel line (1), a second CCD register (20) for transferring the charge taken in by a second light-receiving pixel line (2), a multiplexing part (30) for transferring the charges transferred by the first and second CCD registers (10, 20) towards a floating diffusion amplifier (FD), signal generating means (3) for feeding a signal to the last stage of the first CCD register (10) and a signal in opposite phase to the last stage of the second CCD register (20) in an alternate output mode, and for feeding a signal for accumulating charge by a transfer timing corresponding to the sum operated by the second CCD register (20) to the last stage of the second CCD register (20) in a sum output mode.

Description

Specification

TECHNICAL FIELD The present invention relates to a solid-state imaging device, a driving method thereof, and an image input device.

The present invention relates to a solid-state imaging device that alternately transfers and outputs charges captured by a plurality of sensor rows or adds and outputs charges of pixels in the same row, a driving method thereof, and an image input device. Background art

2. Description of the Related Art A solid-state imaging device including a linear sensor is used in an image input device applied to a scanner, a copying machine, and the like, and an image is input by scanning a reading position of the solid-state imaging device.

In recent years, there has been a strong demand for improved reading resolution and reduced reading speed, and linear sensors that use multiple sensor arrays have been developed. For example, in a solid-state imaging device having two sensor rows, one sensor row and the other sensor row are shifted by half a pixel pitch, and the charge captured by one sensor row and the other sensor row are captured. The charge is multiply-stated and output alternately.

In addition, when performing an output in which the charge of the pixel is added, the timing of the reset pulse for discharging the charge of the floating diffusion, which is the charge-voltage conversion means, is controlled, and the floating diffusion amplifier is controlled. The pixels captured by both sensor rows, which are transferred alternately, are added by a floating diffusion amplifier and output.

However, as described above, charge addition is performed by a floating diffusion amplifier in a multiplexed solid-state imaging device. In this case, the charge captured by one sensor row is transferred to the opening / diffusion amplifier, and then the charge captured by the other sensor row is added. Until the charge is transferred to the floating diffusion amplifier, the addition output cannot be obtained, and the period of the addition output is shortened, so that there is a problem that it is difficult to perform the subsequent signal processing. In addition, compared with the case where charges taken in two columns are output alternately, the cycle of obtaining the added output becomes slower, and there is a problem that it is not possible to respond to the demand for quick signal processing in the subsequent stage. Disclosure of the invention

The present invention provides a solid-state imaging device, a driving method thereof, and an image input device which have been made to solve such problems. That is, the solid-state imaging device according to the present invention includes a first charge transfer column for transferring the charge captured by the first light receiving pixel column, and a second charge transfer for transferring the charge captured by the second light receiving pixel column. Column, a multiplex section for transferring the charges transferred in the first charge transfer column and the second charge transfer column in the direction of the charge-voltage conversion means, respectively, and, in the case of the alternate output mode, the first charge transfer. Signals of opposite phases are applied to the last stage of the column and the last stage of the second charge transfer column, and in the addition output mode, the addition in the second stage of the second charge transfer column is performed in the second stage. Signal generation means for providing a signal for accumulating charges only at the transfer timing corresponding to the minute o

In the present invention as described above, in the addition output mode, the signal generation means accumulates electric charges at the final stage of the second charge transfer sequence only at the transfer timing corresponding to the added amount in the second charge transfer sequence. Therefore, the charges transferred in the second charge transfer train are accumulated, that is, added, just before the final stage of the second charge transfer train. Also, While the above signal is given to the last stage of the charge transfer sequence of No. 2, the charges transferred in the first charge transfer sequence are sent to the multiplex unit, and the first stage of the multiplex unit corresponds to the added amount. The charge transferred in the first charge transfer train is accumulated, that is, added only at the transfer timing.

Further, the driving method of the solid-state imaging device according to the present invention includes a first charge transfer row for transferring the charge captured by the first light receiving pixel row and a second charge transfer row for transferring the charge captured by the second light receiving pixel row. And a multiplex unit for transferring the charges transferred in the first charge transfer train and the second charge transfer train in the direction of the charge-to-voltage conversion means, respectively. In the alternate output mode, signals of opposite phases are given to the last stage of the first charge transfer train and the last stage of the second charge transfer train, respectively, and in the addition output mode, the second charge transfer is performed. In the last stage of the column, a signal for accumulating charges is provided only at the transfer timing corresponding to the added amount in the second charge transfer column.

According to the present invention, in the addition output mode, only the transfer timing corresponding to the added amount in the second charge transfer train is accumulated at the final stage of the second charge transfer train. Therefore, the charges transferred in the second charge transfer column are accumulated, that is, added, just before the final stage of the second charge transfer column. In addition, while the above signal is given to the final stage of the second charge transfer train, the charges transferred in the first charge transfer train are sent to the multiplex unit, and the addition is performed in the first stage of the multiplex unit. The accumulation, that is, the addition of the charges transferred in the first charge transfer column is performed only at the transfer timing corresponding to.

Further, the image input device of the present invention includes a first charge transfer column for transferring the charge taken in the first light receiving pixel column, and a second charge transfer for transferring the charge taken in the second light receiving pixel column. And the charges transferred in the first charge transfer row and the second charge transfer row, respectively. A multiplex unit for transferring in the direction of the voltage conversion means, and in the case of the alternate output mode, signals of opposite phases are given to the last stage of the first charge transfer train and the last stage of the second charge transfer train, respectively. In the case of the addition output mode, signal generation means for providing a signal for accumulating charges only at a transfer timing corresponding to an addition in the second charge transfer sequence to a final stage of the second charge transfer sequence. And a solid-state imaging device having the following.

In the present invention as described above, in the addition output mode, only the transfer timing corresponding to the added amount in the second charge transfer train is accumulated at the final stage of the second charge transfer train. Therefore, the charges transferred in the second charge transfer column are accumulated, that is, added, just before the final stage of the second charge transfer column. In addition, while the above signal is given to the final stage of the second charge transfer train, the charges transferred in the first charge transfer train are sent to the multiplex unit, and the addition is performed in the first stage of the multiplex unit. The accumulation, that is, the addition of the charges transferred in the first charge transfer column is performed only at the transfer timing corresponding to the transfer timing. This makes it possible to obtain an output image in which adjacent pixels transferred in each charge transfer column are added. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a schematic diagram illustrating a solid-state imaging device according to the present embodiment, FIG. 2 is a schematic diagram illustrating a main part of the solid-state imaging device according to the present embodiment, and FIG. FIG. 4 is a timing chart for explaining the mode, and FIG. 4 is a timing chart for explaining the addition output mode. BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, a solid-state imaging device, a driving method thereof, and an image input device according to the present invention will be described. An embodiment of a force device will be described with reference to the drawings. FIG. 1 is a schematic diagram illustrating a solid-state imaging device according to the present embodiment, FIG. 2 is a schematic diagram illustrating main components of the solid-state imaging device of the present embodiment, and FIG. 3 and FIG. 4 is a timing chart illustrating a method for driving the solid-state imaging device according to the embodiment.

As shown in FIG. 1, the solid-state imaging device according to the present embodiment has a first CCD register provided corresponding to two sensor rows, that is, a first light receiving pixel row 1 and a second light receiving pixel row 2. 10, a second CCD register 20, and a multiplex unit 30 for transferring the charges transferred by the first CCD register 10 and the second CCD register 20 according to the output mode.

In each of the transfer elements constituting the first CCD register 10, the second CCD register 20, and the multiplex section 30, the potential of a part of the charge output side is deeper than other areas. It is formed as follows.

Further, the solid-state imaging device according to the present embodiment also includes a signal generation unit 3 that supplies a pulse signal to the first CCD register 10, the second CCD register 20, the multiplex unit 30, and the like at a predetermined timing. O

In such a solid-state imaging device, the charges captured by the two sensor rows are alternately transferred by the multiplexing section 30, and each of the charges is received from the floating diffusion amplifier FD connected at the subsequent stage. Output mode, and an addition output mode in which, of the charges captured by the two sensor rows, the charges of adjacent pixels in the same row are added and output.

In other words, in this solid-state imaging device, the first light receiving pixel row 1 and the second light receiving pixel row 2, which are two sensor rows, are arranged in a state shifted by a half pixel pitch, so that the alternate output mode is set. By the two Sen By alternately outputting the charges captured by the sub-arrays, an image can be read at a resolution twice as high as the pitch of the pixels in a single row in the pixel row direction.

On the other hand, in the addition output mode, the charges taken in adjacent pixels in the same column are added and output, so that one pixel of the pixel pitch in one column is output.

An image is read at a resolution of 2.However, since the added charges are transferred to the floating diffusion amplifier FD, a signal output that adds the charges of adjacent pixels at the same timing as in the alternate output mode is obtained. Can be.

In performing such output mode switching, the solid-state imaging device according to the present embodiment can apply a pulse signal to the last stage of the second CCD register 20 independently. Switching is performed according to the timing of the pulse signal to be applied.

That is, as shown in FIG. 2, in the solid-state imaging device of the present embodiment, a pulse signal composed of ø1 and ø2 is alternately applied to the first CCD register 10 and 0 is applied to the second CCD register 20. Pulse signals consisting of 2, 0 1 are applied alternately, and 0 1 'is independently applied to the final stage of the second CCD register 20.

Switching between the alternate output mode and the addition output mode is performed by the output timing of these pulse signals output from the signal generation means 3. Hereinafter, the output timing of the pulse signal in each output mode will be described.

FIG. 3 is a timing chart in the case of the alternate output mode. In the alternate output mode, ø1 and ø2, which are out of phase with each other, are applied to the first CCD register 10 and the second CCD register 20, respectively. Also, the same pulse as Φ 1 is applied as 0 1 ′ applied to the final stage of the second CCD register 20. As a result, the transfer of the charge taken in the first light receiving pixel column by the first CCD register 10 and the transfer of the charge taken in the second light receiving pixel column by the second CCD register 20 are performed alternately. .

In addition, 0 3 and Φ 4, which are out of phase with each other, are applied to the multiplex unit 30. 0 3 and 4 4 have a frequency twice as high as the above 0 1 and 0 2, and are transmitted alternately from the first CCD register 10 and the second CCD register 20 in the first light receiving pixel column. The charges and the charges in the second light receiving pixel column are sequentially transferred to the floating diffusion amplifier FD.

With this drive, the stage is reset to the ø3 force and L0 w level, and the ø4 force and Hig h level. Lus øRS While the power is at the Low level (reset, until Lus ¾6 RS goes to the High level) The signal of one pixel in the first pixel line from the floating diffusion amplifier FD and the floating diffusion amplifier FD A signal for one pixel in the second pixel column can be output alternately.

On the other hand, FIG. 4 is a timing chart in the case of the addition output mode. In the addition output mode, ø1 and ø2, which are out of phase with each other, are applied to the first CCD register 10 and the second CCD register 20, respectively. In addition, as the ø1 'applied to the final stage of the second CCD register 20, the High level is set only once in the period of the ø1 force and the High level twice.

In other words, in the section indicated by 4 in Fig. 4, 03 is set to the high level, and the charges of two adjacent pixels transferred by the first CCD register 10 by 01 and 02 are shown in Fig. 2. Addition is made at the part shown in (c). Then, 0 3 is set to the High level—Low level—High level (

By setting 0 4 to the low level → high level → low level), the previously added charge can be transferred to (b) shown in FIG. In the section indicated by ①, 0 1 ′ is the Low level, and ø 1 is the High level → Low level → High level (0 2 is the Low level → High level—Low level) Level), the charges of two adjacent pixels transferred by the second CCD register 20 are added in (d) shown in FIG.

On the other hand, in the section indicated by ② in Fig. 4, 03 is changed from the high level to the low level and the high level to the high level (ø4 is the low level to the high level and the high level to the low level). As a result, the charge of the two-pixel addition adjacent to the first CCD register 10 transferred to (b) shown in FIG. 2 is transferred to (a).

In addition, by setting 0 1 ′ to the low level—high level (while 03 is the high level), the second CCD register 20 added in (d) shown in FIG. The charges of the two pixels are transferred to (c) shown in FIG.

Then, by setting 03 to High level-Low level-High level (04 is Low level → High level → Low level), the second CCD register is set. The charge of 20 adjacent two-pixel addition can be transferred to (b) shown in FIG.

By such driving, the floating diffusion ion amplifier FD finally adds the two pixels of the first light receiving pixel array in the period of ① and the two pixels of the second light receiving pixel column in the period of ②. The signals can be output alternately in the order of the signals.

The above-described solid-state imaging device and its driving method are mainly applied to an image input device such as a scanner and a copying machine. In this case, when high resolution is required, such as when capturing a fine image, each pixel captured in the first light receiving pixel row and the second light receiving pixel row by the alternate output mode described above is used. Pre-scanning at the time of image capture (reading to determine image size and area, etc.) For example, when it is necessary to perform high-speed signal processing within a limited time, such as in the case of (1), the addition output mode described above is used to add and output the two adjacent pixels of the first light receiving pixel column. Two adjacent pixels of two light receiving pixel columns are alternately output. As a result, one solid-state imaging device can meet the requirements of both high resolution and high-speed processing.

In the above-described embodiment, the case of a line sensor in which a plurality of pixels are arranged in a row has been described. However, in the case of an area sensor in which a plurality of pixels are arranged in an area (a matrix). Is also applicable. In addition, in the timing chart in the addition output mode shown in Fig. 4, the reset pulse øRS is thinned out from two times to one time, so that the charges obtained by adding two adjacent pixels of the same row sensor are added in different rows. It is also possible to obtain the output of the sum of four pixels. Industrial applicability

As described above, the solid-state imaging device, the driving method thereof, and the image input device according to the present invention have the following effects. In other words, in a solid-state imaging device having a multipletus structure, charges of adjacent pixels in the same light receiving pixel column can be added by simple pulse change, and the mode can be reduced without complicating circuit wiring and the like. It is possible to respond to switching. In addition, a single solid-state imaging device can support both high-resolution and high-speed signal processing, and can respond to various needs. As a result, it is possible to reduce the manufacturing cost of the solid-state imaging device that can support both high-resolution and high-speed signal processing.

Claims

The scope of the claims

1. a first charge transfer column for transferring the charge captured by the first light receiving pixel column;

A second charge transfer column for transferring the charge captured by the second light receiving pixel column;

A multiplex unit for transferring the charges transferred in the first charge transfer train and the second charge transfer train in the direction of the charge-to-voltage conversion means, respectively;

In the case of the alternate output mode, signals of opposite phases are given to the last stage of the first charge transfer train and the last stage of the second charge transfer train, respectively. Signal generation means for providing a signal for accumulating charges only at a transfer timing corresponding to the added amount in the second charge transfer sequence, at a final stage of the second charge transfer sequence;

A solid-state imaging device comprising:

2. A first charge transfer column for transferring the charge captured by the first light receiving pixel column, a second charge transfer column for transferring the charge captured by the second light receiving pixel column, and the first charge A method for driving a solid-state imaging device, comprising: a transfer train; and a multiplex unit for transferring the charge transferred in the second charge transfer train in the direction of the charge-voltage converter.

In the case of the alternate output mode, signals of opposite phases are given to the last stage of the first charge transfer train and the last stage of the second charge transfer train, respectively. A signal for accumulating charges only at the transfer timing corresponding to the added amount in the second charge transfer sequence is provided to the final stage of the charge transfer sequence.

A method for driving a solid-state imaging device, comprising:

3. A first charge transfer column for transferring the charge captured by the first light receiving pixel column and a second charge transfer column for transferring the charge captured by the second light receiving pixel column. A charge transfer train, a multiplex unit for transferring the charges transferred in the first charge transfer train and the second charge transfer train in the direction of the charge-voltage converter, respectively; Signals of opposite phases are given to the final stage of the first charge transfer train and the final stage of the second charge transfer train, respectively.In the case of the addition output mode, the last stage of the second charge transfer train is provided. A solid-state imaging device equipped with signal generation means for providing a signal for accumulating charges only at a transfer timing corresponding to the added amount in the charge transfer train of No. 2 is used.

An image input device, characterized in that: