WO2000076096A1

WO2000076096A1 - Remote controlled programmable transceiver

Info

Publication number: WO2000076096A1
Application number: PCT/US2000/011244
Authority: WO
Inventors: Donna Ryan; Joseph Silvia; Richard Lizotte; Jerald E. Archambault
Original assignee: Spike Broadband Systems, Inc.
Priority date: 1999-06-07
Filing date: 2000-04-26
Publication date: 2000-12-14
Also published as: AU4667300A

Abstract

A remote controlled programmable transceiver is disclosed. The transceiver includes a transmitter, a receiver, and a processor to monitor and control various operating parameters associated with the transmitter and receiver. The transceiver may be remotely programmed, controlled, and monitored to provide a wide range of versatility for a variety of applications. In one example, the transceiver is designed and programmed particularly for use in broadband wireless communication systems. In this example, the transceiver converts information bearing signals in a first frequency range of approximately 10 MHz to 1 GHz, which are carried, for example, by a coaxial cable, to a second frequency range of greater than 1 GHz, for radiation in open space. In one aspect, each information bearing signal has a bandwidth of at least approximately 6 MHz.

Description

REMOTE CONTROLLED PROGRAMMABLE TRANSCEIVER

Field of the Invention

The present invention relates to signal transmitters and receivers, and more particularly, to a transceiver that may be remotely programmed, controlled, and/or monitored.

Background of the Invention Signal transmitters and receivers are used in a wide range of physical systems, such as electrical, optical, radio and microwave, acoustical, and mechanical systems, which transport or convey information from one point to another. In particular, transmitters and receivers serve as the building blocks for a variety of communication systems, including communication systems which transport information, for example, over wire conductors, fiber optics, or through open space, such as wireless communication systems. Generally, transmitters and receivers convert one or more information bearing signals having a first set of characteristics, such as frequency, amplitude, and modulation format, to a signal having a second set of characteristics. Depending on a particular application, a given transmitter and receiver may convert one or more of the characteristics of the set. For example, a transmitter may convert an information bearing signal in a first frequency range having a first amplitude to a second frequency range having a second amplitude. The first frequency range and amplitude may, for example, be more suitable for processing the information bearing signals "locally," at or near the site of the transmitter, while the second frequency range and amplitude may be more suitable for transmitting the signals some distance over a given communication medium. The second frequency range and amplitude often depends on the choice of communication medium, such as wire conductors, fiber optics, or open space, and the particular communication application, such as, for example, cellular telephones, cable television, telephony, data transfer, Internet access, etc. In a similar manner, a receiver may convert an information bearing signal that has propagated over the communication medium from the second set of characteristics to the first set of characteristics. For many applications, it is convenient to employ a transmitter-receiver pair, or a "transceiver," to permit a bi-directional conversion of information bearing signals that have travelled across the communication medium. Typically, transceivers are employed in communication systems which are implemented for particular purposes or custom applications, in which the information bearing signals passing through the transceiver are required to have specific predetermined frequencies, amplitudes, and modulation formats. Accordingly, transceivers are generally designed with specific preset signal frequency ranges and frequency conversion factors, signal amplification levels, and modulation formats in mind. While transceiver parameters, such as signal amplification or "gain" and signal frequency, are typically constrained by the particular design of the transceiver based on the intended use of the transceiver, such parameters may have some limited range of adjustability for purposes of calibration. For example, in some conventional transceivers, the gain or frequency of a signal input to, or output from, a transceiver may be adjusted for calibration purposes via a potentiometer, which often is manually adjusted by an operator. Alternatively, some transceivers may include the capability to select a particular range of signal gain or frequency using, for example, jumpers or DIP switches on a transceiver circuit board, or external switches provided on a user- accessible panel of the transceiver.

Summary of the Invention

The present invention is directed to a remote controlled programmable transceiver.

In one embodiment, a transceiver according to the invention includes a transmitter to transmit a transmit signal, a receiver to receive a receive signal, and a processor coupled to the transmitter and the receiver to monitor and to control the transmitter and the receiver. According to this embodiment, the transceiver may also include a remote interface coupled to the processor, through which the transmitter and the receiver may be remotely programmed, controlled, and monitored. In another embodiment, a method of operating a transceiver according to the invention includes steps of monitoring at least some of a plurality of operating parameters associated with the transceiver, and making a comparison of a first operating parameter of the at least some monitored operating parameters and at least one of calibration data and configuration data associated with the transceiver. According to this embodiment, the method also includes steps of remotely controlling at least one operating parameter, such as a frequency and/or a gain of a signal passing through the transceiver. In one aspect of this embodiment, the method further includes a step of stabilizing at least one of the first operating parameter and a second operating parameter of the plurality of operating parameters based on the comparison.

Brief Description of the Drawings

The accompanying drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component that is illustrated in various figures is represented by a like numeral. For purposes of clarity, not every component may be labeled in every drawing.

Fig. 1 is a block diagram of a remote controlled programmable transceiver according to one embodiment of the invention; Fig. 2 is a more detailed block diagram of a portion of the transceiver shown in

Fig. 1, according to one embodiment of the invention;

Fig. 3 is a more detailed block diagram of a remote interface of the transceiver shown in Fig. 2, according to one embodiment of the invention;

Fig. 4 is a more detailed block diagram of a transmitter of the transceiver shown in Fig. 1, according to one embodiment of the invention; and

Fig. 5 is a more detailed block diagram of a receiver of the transceiver shown in Fig. 1, according to one embodiment of the invention.

Detailed Description

The present invention is directed to a remote controlled programmable transceiver. Transceivers according to the present invention include a transmitter, a receiver, and a processor coupled to the transmitter and receiver to monitor and control the transmitter and receiver. By integrating a processor with the transmitter and the receiver, several operating parameters associated with transceivers according to the invention may be programmed, controlled, and monitored to provide a wide range of versatility for a variety of applications. In various embodiments, transceivers according to the invention may include a storage device or memory, and may be programmed, for example, with configuration and calibration data associated with several operating parameters. Examples of such operating parameters include, but are not limited to, signal frequency, signal gain or amplification, signal strength, various circuit voltages at test points throughout both the transmitter and the receiver, and temperature.

During normal operation of the transceiver, the processor monitors several operating parameters associated with both the transmitter and the receiver, and compares these parameters to one or both of the calibration data and the configuration data programmed into memory. The stored data may include, for example, various parameter set-points or parameter temperature dependencies.

As a result of comparing the monitored parameters to the stored data, the processor may effect a number of control and/or stabilization functions, via several analog and digital outputs to various control circuitry, in connection with a variety of parameters associated with one or both of the transmitter or the receiver. For example, in some embodiments, the processor may automatically compensate parameters, such as transmitter or receiver signal gain and frequency, for variations in temperature.

Additionally, in various embodiments, transceivers according to the invention may be remotely programmed, controlled, and monitored. The capability to remotely program, control, and monitor the transceivers provides several advantages, including, but not limited to, the ability to adjust a frequency and a gain of various signals passing through the transceiver from a remote location, without the need to physically change a potentiometer, jumper, switch setting, or the like, on the transceiver itself.

In embodiments related to remote programming, control, and monitoring, the processor generally receives programming and control information, and transmits a variety of status information associated with the transceiver, via a remote communications interface. In one embodiment, for example, the remote interface may be an RS232 and TTL compatible interface externally accessible from the transceiver. In other embodiments, programming, control, and monitoring information may be multiplexed with some of the information bearing signals transmitted and received by the transceiver.

In one embodiment, a transceiver according to the invention is designed and programmed particularly for use in two-way broadband wireless communication systems. In this embodiment, the transceiver converts bi-directional information bearing signals in a first frequency range of approximately 10 MHz to 1 GHz to a second frequency range of greater than 1 GHz, and more preferably greater than 2 GHz. The first frequency range is typical, for example, of cable TV frequencies, for which the information bearing signals are generally transported over one or more coaxial cables, while the second frequency range is typical, for example, of several wireless frequency spectra, for which the information bearing signals are radiated in open space. In one aspect of this embodiment, each information bearing signal has a bandwidth of at least approximately 6 MHz. Fig. 1 shows a block diagram of a remote control programmable transceiver 10 according to one embodiment of the invention. The transceiver 10 of Fig. 1 includes a transmitter 12 to transmit a transmit signal 14 (TX), and a receiver 16 to receive a receive signal 18 (RX). The transmitter 12 converts an input signal 22 (IN) to the transmit signal 14 and the receiver 16 converts the receive signal 18 to an output signal 24 (OUT).

In the embodiment shown in Fig. 1, the transceiver 10 also includes a multiplexer 34 (MUX), coupled to line 32, to multiplex and demultiplex the output signal 24 and the input signal 22 to and from the line 32. In other embodiments, however, the output signal 24 and the input signal 22 may be coupled to the transceiver 10 on respective lines (not shown). Additionally, in some embodiments, as shown in Fig. 1, the line 32 may also carry DC power signals and remote programming, control, and monitor signals. In such embodiments, the multiplexer 34 may direct any DC power signals from line 32 to power supply 36, and may direct any remote programming, control, and monitor signals between line 32 and a remote interface 26 via line 28B, as discussed further below in connection with Figs. 2 and 3.

The transceiver 10 of Fig. 1 also includes a processor 20, coupled to the transmitter 12 and the receiver 16, to monitor and to control the transmitter and the receiver. For example, the processor 20 may control a frequency of the transmit signal 14 and/or the output signal 24, as well as a gain of the transmitter 12 and/or the receiver 16, as discussed further below.

In one embodiment of the invention, the transmit signal 14 and the receive signal 18 each has a frequency greater than 1 GHz, and more preferably greater than 2 GHz. Examples of frequency ranges suitable for the transmit signal 14 and the receive signal 18 of this embodiment include, but are not limited to, the Multi-Point Distribution Services (MDS) spectrum from 2.15 GHz to 2.156 GHz, the Multi-Channel Multi-Point Distribution Services (MMDS) spectrum from 2.5 GHz to 2.686 GHz, the Wireless Communication Services (WCS) spectrum, which is a 30 MHz band at approximately 2.3 GHz, the National Information Infrastructure (Nil) spectrum from 5 GHz to 6 GHz, and the Local Multi-Point Distribution Services (LMDS) spectrum, near 28 GHz and 31 GHz. Additionally, the transmit signal 14 and the receive signal 18 may have other frequencies in various spectra that may or may not be presently developed or licensed by the Federal Communications Commission (FCC). In one aspect of this embodiment, the input signal 22 and the output signal 24 each has a frequency in a range of from approximately 10 MHz to 1 GHz, which includes frequencies typically used for public and cable television broadcasting. While the transmit signal 14 and the receive signal 18 are radiated in open space in this embodiment, the input signal 22 and the output signal 24 may be received and transmitted, for example, over one or more coaxial cables serving as the line 32 coupled to the transceiver 10, as shown in Fig. 1. In yet another aspect of this embodiment, the transmit signal 14, the receive signal 18, the input signal 22, and the output signal 24, each has a bandwidth of at least approximately 6 MHz.

Fig. 1 also shows that the transceiver 10, according to one embodiment of the invention, may include a remote interface 26 (RI) coupled to the processor 20, through which the processor 20, the transmitter 12, and the receiver 16, may be remotely programmed, controlled, and monitored via signals on lines 28A or 28B to the remote interface 26. Fig. 1 also shows that the transceiver 10 may include a temperature sensor 30 coupled to the processor 20 to monitor a temperature of one or both of the transmitter 12 and the receiver 16.

Fig. 2 shows a more detailed block diagram of a portion of the transceiver 10 shown in Fig. 1, according to one embodiment of the invention. Fig. 2 shows that the processor 20 may include an analog-to-digital converter 44 (A/D) to receive a number of analog inputs to the processor which may, for example, represent monitored values of a number of parameters associated with the transceiver 10. One example of a processor suitable for purposes of the invention includes, but is not limited to, Motorola Micro- Controller Unit (MCU), Model MC68HC711E9. Processors suitable for purposes of the invention, such as the Motorola MCU, may also include various forms of internal memory or storage devices, for example Read-Only Memory (ROM) and Random Access Memory (RAM), in addition to an internal analog-to-digital converter, as shown in Fig. 2.

Fig. 2 also shows that the remote interface 26 is coupled to the processor 20 via line 82 which may be, for example, a serial data control interface bus such as an RS232 and TTL compatible bus, or a parallel data bus. According to one embodiment, the remote interface 26 may include a programmable logic device (shown in Fig. 3) which receives programming signals and control signals and transmits monitor signals to remotely program, control, and monitor the processor 20, as well as the transmitter 12 and receiver 16 shown in Fig. 1. The programmable logic device included in the remote interface 26 may include one or more serial interfaces to provide remote access to the transceiver 10, as discussed further below in connection with Fig. 3.

Fig. 2 shows that the remote interface 26 may transmit and receive RS232 and TTL compatible programming, control, and monitor signals from one serial interface port via line 28A. The remote interface 26 may additionally transmit and receive programming, control, and monitor signals as bi-directional on-off-keyed signals through another serial interface port via line 28B. While the remote signals received via line 28 A may be considered as "isolated" programming, control, and monitor signals, the bidirectional on-off keyed signals may be multiplexed on line 32 with DC power signals, as well as the input signal 22 and the output signal 24, and directed to the remote interface 26 by the multiplexer 34, via line 28B.

Generally, the RS232 serial interface of remote interface 26 may accommodate signal levels on line 28 A of from ± 5 volts to ± 15 volts, may be additionally designed for TTL signal level compatibility, and may be used for transferring ASCII-encoded programming, control, and monitor signals, as well as other encoded signals. For embodiments in which the remote interface 26 employs an RS232 and TTL compatible serial interface, only the programming signals, the control signals, and the monitor signals may pass through the remote interface 26. In this manner, programming, control, and monitoring signals received from an external source may be isolated from the input signal 22 and the output signal 24 of the transmitter 12 and the receiver 16, respectively. Fig. 3 is a more detailed diagram of the remote interface 26, showing a programmable logic device 85, used primarily to convert bi-directional on-off-keyed programming, control, and monitor signals to RS232 and TTL compatible signals. One example of the programmable logic device 85 suitable for purposes of the invention includes, but is not limited to, an Altera Model EPM7064ST144-7 programmable logic device. The programmable logic device 85 may be specifically programmed to implement signal processing functions, which are shown for purposes of illustration in Fig. 3 as functional blocks.

As shown in Fig. 3, the programmable logic device 85 may include a modulator 84, a demodulator 86, two controllable switches 87 and 89, and a square wave reference generator 90. The programmable logic device 85 may also receive an external clock signal to drive the reference generator 90. Fig. 3 also shows that the remote interface 26 may also include a band pass filter 88 and a sine-to-square wave converter 92 to "pre- process" any bi-directional on-off-keyed signals received on line 28B.

The remote interface 26 shown in the embodiment of Fig. 3 functions essentially as follows. The programmable logic device 85 is programmed to implement modulation, demodulation, switching, and square wave generation functions, as illustrated by blocks 84, 86, 87, 89, and 90, respectively. As shown in Fig. 3, bidirectional on-off-keyed signals received by, or transmitted from, the remote interface 26 pass through the band pass filter 88. Any received on-off-keyed signals are generally in the form of keyed sine wave signals, and as such, pass through the sine to square wave converter 92.

In the embodiment of Fig. 3, the modulator 84 converts RS232 and TTL compatible signals received from the processor via control bus 82 to "outgoing" on-off- keyed signals, and the demodulator 86 converts "incoming" on-off-keyed signals to RS232 and TTL compatible signals which proceed to the processor via control bus 82. The modulator 84 is programmed to utilize RS232 signals from the processor to toggle switch 89. In this manner, a square wave reference signal from the generator 90 is "keyed" on and off, based on an RS232 signal input to the modulator 84 from the processor. For example, in one embodiment, the modulator 84 may be programmed to close switch 89 in response to a high level RS232 signal from the processor 20. The on- off-keyed signal from switch 89 passes through the band pass filter 88 to remove higher harmonics from the square wave, to create an on-off-keyed sinusoidal signal which is transmitted onto line 28B.

In Fig. 3, when switch 89 is closed to provide an on-off-keyed signal output, the modulator 84 opens switch 87 to prevent any output on-off-keyed signal from feeding back into an input of the demodulator 86. Conversely, when the modulator 84 detects an on-off-keyed signal input on line 28B, switch 89 is opened and switch 87 is closed to permit the output of the sine to square wave converter 92 to pass to the demodulator 86. The demodulator 86 is programmed to output a predetermined high or low RS232 signal level to the processor via control bus 82 depending on the presence or absence of an on- off-keyed signal input via line 28B. For example, in one embodiment, the demodulator 86 may drive the RS232 input line to the processor to a low level state when an on-off- keyed input is detected.

As discussed above, in one aspect of this embodiment, the bi-directional on-off- keyed signals on line 28B may be multiplexed with one or both of the input signal 22 and the output signal 24, as shown in Fig. 1. In this manner, any programming, control, or monitor signals may be transported on the same medium as the input signal 22 and the output signal 24, for example, on one or more coaxial cables serving as line 32 to the transceiver 10.

In this aspect, each on-off-keyed signal carrying programming, control, or monitoring information preferably has a respective frequency outside of a signal bandwidth associated with each of the input signal 22 and the output signal 24. For example, in embodiments of the transceiver 10 in which the frequency range of the input signal 22 and the output signal 24 is 10 MHz to 1 GHz, and the bandwidth of the input signal 22 and the output signal 24 is approximately 6 MHz, any on-off-keyed programming, control, or monitor signals, multiplexed with one or both of the input signal 22 and the output signal 24, may have a frequency of approximately 500 kHz. Accordingly, the on-off-keyed signal frequency of 500 kHz in this example is well "outside" of both respective bandwidths of the input signal 22 and the output signal 24. With reference again to Fig. 2, the transceiver 10 according to one embodiment of the invention may also include a receive signal strength circuit 40, coupled to the processor 20, to measure a power level of the receive signal 18 received by the receiver 16. Fig. 2 shows that the received signal strength circuit 40 may measure the power level of the receive signal 18 by monitoring the output signal 24 of the receiver 16. One example of a received signal strength circuit suitable for purposes of the invention includes, but is not limited to, an RF Micro Devices Model RF2604 circuit.

The received signal strength circuit 40 according to the invention may be capable of continuously measuring the power level of the receive signal 18 at a predetermined programmed update rate, as discussed further below. An output of the received signal JO- strength circuit 40 is coupled to the analog-to-digital converter 44 included in the processor 20, to convert the power level measured by the received signal strength circuit 40 to a digital power level used for various monitoring, control, and stabilization functions of the processor 20. As discussed above, Fig. 2 shows that the transceiver 10, according to one embodiment of the invention, may also include a temperature sensor 30. One example of a temperature sensor 30 suitable for purposes of the invention includes, but is not limited to, a National Model LM34DM temperature sensor. An output of temperature sensor 30 is monitored by the analog-to-digital converter 44 of the processor 20, similarly to the output of the received signal strength circuit 40.

Fig. 2 also shows that a number of test points 42 may be monitored by the analog-to-digital converter 44 of the processor 20. Each test point 42 may correspond to a respective voltage, for example, associated with various power supplies of the transmitter 12 and the receiver 16. By monitoring various power supply levels throughout the transmitter and receiver circuitry, the processor 20 may ensure proper operation of the transmitter 12 and the receiver 16. In addition to various voltage supply levels, the analog-to-digital converter 44 may monitor a variety of status bits from other control circuitry external to the processor 20, as discussed further below.

Fig. 2 also shows that the transceiver 10 according to one embodiment of the invention may include one or more programmable frequency synthesizer phase-locked loops 62 and 64 (PLL), coupled to the processor 20, to control the respective frequencies of the transmit signal 14 and the output signal 24. One example of a frequency synthesizer phase-locked loop suitable for the purposes of the invention includes, but is not limited to, a National Model LMX2330A programmable dual mode frequency synthesizer phase-locked loop having a serial data input.

The PLLs 62 and 64 shown in Fig. 2 each receive digital frequency data from the processor 20 via data bus 80, which like bus 82, may be a serial or parallel data bus depending on the choice of circuit architecture and components. The PLLs 62 and 64, shown in the embodiment of Fig. 2, are dual channel frequency synthesizer phase-locked loops, and include a voltage controlled oscillator (VCO) (not shown) for each frequency channel. PLL 62 provides two local oscillator signals 66 and 68 (LO1 RX and LO2 RX, respectively) to the receiver 16, shown in Fig. 5 and discussed in greater detail below. Similarly, PLL 64 provides two local oscillator outputs 70 and 72 (LO1 TX and LO2 TX, respectively) to the transmitter 12, shown in Fig. 4 and discussed in greater detail below.

Each PLL 62 and 64 also receives a reference frequency signal from a voltage controlled crystal oscillator 56 (VCXO). One example of a voltage-controlled crystal oscillator 56 suitable for purposes of the invention includes, but is not limited to, a Rakon Model VTX0210BR voltage-controlled oscillator.

The processor 20 controls the frequency of the transmit signal 14 and the output signal 24 by digitally adjusting the local oscillator signals 66, 68, 70, and 72 through the frequency synthesizer phase-locked loops 62 and 64. Additionally, the processor may compensate for frequency variations due to temperature changes through a frequency compensation circuit that controls the voltage-controlled crystal oscillator 56 (VCXO), as discussed further below.

Fig. 2 also shows that the processor 20 may digitally control a gain of the transmitter 12 and the receiver 16 via respective digital gain control signals 46 and 48. With reference to Figs. 4 and 5, which are detailed diagrams of the transmitter 12 and the receiver 16, respectively, the transceiver 10 may include one or more gain adjustment circuits coupled to the processor 20 to adjust a transmitter gain and/or a receiver gain. For example, Fig. 4 shows that, according to one embodiment of the invention, the transmitter 12 may include a digital antennuator 102, coupled to the processor 20 to receive transmitter digital gain control signal 46. One example of a digital antennuator suitable for purposes of the invention includes, but is not limited to, an RF Micro Devices Model RF2420 digitally controlled antennuator. The digital antennuator 102 of Fig. 4 receives the input signal 22 and, based on the transmitter digital gain control signal 46, may adjust the gain of input signal 22 by, for example, -4 dB to - 44 dB in ±1 dB increments. Similarly, Fig. 5 shows that the receiver 16 may include a digital antennuator 104, similar to that of digital antennuator 102 of the transmitter 12, to digitally adjust the receiver gain based upon receiver digital gain control signal 48 from the processor 20.

With reference again to Fig. 2, a gain adjustment circuit of the transceiver 10 according to one embodiment of the invention may also include a digital-to-analog converter 54 (D/A). The digital-to-analog converter 54 receives digital signals for the processor 20 and outputs analog gain control signals 50 and 52 to the transmitter 12 and the receiver 16, respectively. As shown in Fig. 4, the transmitter 12 may include an analog antennuator 106 which receives the analog gain control signal 50 from the D/A converter 54. On example of an analog antennuator suitable for purposes of the invention includes, but is not limited to, an M/A-COM Model AT- 109 voltage variable attenuator, which is capable of adjusting the transmitter gain by -7 dB to -27 dB based upon the analog gain control signal 50. Similarly, as shown in Fig. 5, the receiver 16 may include an analog antennuator 108, similar to that of analog antennuator 106 of the transceiver 12. The analog antennuator 108 of the receiver 16 receives the analog gain control signal 52 from the D/A converter 54.

By employing both digital and analog gain control, the transceiver 10, according to various embodiments of the invention, is capable of both coarse and fine adjustments of one or both of the transmitter gain and the receiver gain. For example, through digital gain control using digital antennuators 102 and 104, coarse adjustments to the transmitter and receiver gains may be made, for example, in ±1 dB increments. Similarly, by employing D/A converter 54 and analog antennuators 106 and 108, the transmitter and receiver gains, respectively, may be finely adjusted, for example, in ± 0J dB increments. The processor 20 shown in Fig. 2 may also be capable of adjusting one or both of the transmitter gain and the receiver gain, as well as frequencies of the transmit signal 14 and the output signal 24, based on a temperature as measured by the temperature sensor 30. For example, based upon the temperature output from the temperature sensor 30 as monitored by the analog-to-digital converter 44, the processor 20 may output digital signals via bus 80 to the digital-to-analog converter 54 to control the gain of the transmitter 12 and the receiver 16 by analog gain control signals 50 and 52, respectively. The processor 20 may also control a reference frequency of the voltage controlled crystal oscillator 56 based on the temperature via a control signal 51 output by the D/A converter 54. In one embodiment, the processor 20 may be programmed, for example, to adjust one or both of the transmitter gain and the receiver gain for every 2°C change in the temperature, as discussed further below.

Fig. 2 also shows that the transceiver 10 according to one embodiment of the invention may include a status indicator 60, coupled to the processor 20, to indicate an operating status of one or both of the transmitter 12 and the receiver 16. In one embodiment, the status indicator 60 may be an LED, wherein the LED may indicate the operating status of a variety of parameters associated with the transceiver 10 using various blink codes. Such blink codes may include a unique blink rate or a unique number of blinks to indicate the operating status of a particular parameter.

For example, the status indicator 60 shown in Fig. 2 may indicate a level of one or more source powers to the transmitter 12 and the receiver 16 measured, for example, by the analog-to-digital converter 44 monitoring test points 42. The status indicator 60 may also indicate such parameters as a stability of signal frequency or transmitter and/or receiver gain. According to some embodiments, parameters for which an operating status may be indicated, and any associated codes such as blink codes used to indicate the operating status of a particular parameter, may be programmable features of the transceiver 10, as discussed further below.

Fig. 2 also shows that the transceiver 10 according to one embodiment of the invention may include a storage device 58, coupled to the processor 20 via data bus 80, to store one or both of calibration data and configuration data associated with the transmitter 12 and the receiver 16. One example of a storage device suitable for purposes of the invention includes, but is not limited to, a Microchip model 25L320ISN electrically erasable programmable read-only memory (EEPROM) having a serial data port. The storage device 58 may be remotely programmable via the remote interface 26 which, as discussed above, may transmit and receive data signals such as programming signals, control signals, and monitoring signals to remotely download and access the calibration data and the configuration data to and from the storage device 58.

The storage device 58 shown in Fig. 2 may store a variety of configuration data including, but not limited to, frequency set-points for the transmit signal 18 and the output signal 24, respective gain set-points of the transmitter 12 and the receiver 16, indication modes for the status indicator 60, update rates for the analog-to-digital converter 44 to monitor the received signal strength circuit 40, the temperature sensor 30, and the test points 42, temperature compensation update rates, a model number and a serial number of the transceiver 10, other instructional textual messages and memoranda entered by an operator for calibration and set-up purposes, and the like.

Additionally, the storage device 58 may store a variety of calibration data such as temperature compensation tables, including one or more gain compensation tables and one or more frequency compensation tables. Such temperature compensation tables may be used by the processor 20 to automatically adjust transmitter or receiver gains and signal frequencies based on temperature variations, as discussed further below. Figs. 4 and 5 are more detailed block diagrams showing the transmitter 12 and the receiver 16, respectively, of the transceiver 10 shown in Fig. 1, according to one embodiment of the invention. The various components indicated in Figs. 4 and 5 may be particularly selected according to various embodiments of the invention to be specifically suited for various signal frequency, bandwidth, and amplification ranges of operation. In particular, according to one embodiment of the invention, the various components illustrated in Figs. 4 and 5 for the transceiver 12 and the receiver 16, respectively, are selected to accommodate frequencies for the transmit signal 14 and the receive signal 18 of greater than 1 GHz, and preferably greater than 2 GHz, for various wireless communication system applications. Additionally, several of the components, in particular filtering components, are designed or selected to accommodate signal bandwidths of at least 6 MHz for the input signal 22, the transmit signal 14, the receive signal 18, and the output signal 24. Furthermore, each of the transmitter 12 and the receiver 16, as shown in Figs. 4 and 5, may include at least two stages of frequency conversion, allowing for a wide range of versatility in frequency ranges between the input and transmit signals, as well as the receive and output signals.

Fig. 4 shows that, according to one embodiment, the input signal 22 to the transmitter 12 passes to digital attenuator 102 which, as discussed above, may be controlled by the processor 20 through digital gain control signal 46. After the digital attenuator 102, the signal passes through various fixed gain stages to a first transmitter mixer 140, which provides a first frequency conversion stage of the transmitter 12.

The first transmitter mixer 140 shown in Fig. 4 receives the local oscillator signal 70 output from the PLL 64 shown in Fig. 2, to convert the input signal 22 to a first mixed transmitter signal 142, having a frequency of that of the frequency of the input signal 22 plus the local oscillator signal 70. For example, if the frequency of the input signal 22 is 95 MHz, and the frequency of the local oscillator signal 70 is 325 MHz, the first mixed transmitter signal 142 output from the mixer 140 will have a frequency of approximately 95 + 325 = 420 MHz. As discussed above, the frequency of the local oscillator signal 70 is digitally-programmable and controllable by the processor 20 and the PLL 64. In this manner, the processor 20 may control the frequency of the first mixed transmitter signal 142 during the first frequency conversion stage of the transmitter 12.

Within the first conversion stage of the transmitter 12 shown in Fig. 4, after the first transmitter mixer 140, the first mixed transmitter signal 142 passes through a variety of fixed gain amplifiers, attenuators, and various filters. In one embodiment, the filters may be particularly designed or selected to accommodate signal bandwidths of at least 6 MHz or greater. The first mixed transmitter signal 142 also passes through analog attenuator 106, which is controlled by the analog gain control signal 50 output by the digital-to-analog converter 54 shown in Fig. 2.

Continuing with Fig. 4, the first mixed transmitter signal 142 proceeds to a second conversion stage beginning with a second transmitter mixer 144, which receives local oscillator signal 72 output by the PLL 64 shown in Fig. 2. The second transmitter mixer 144 converts the first mixed transmitter signal 142 to a second mixed transmitter signal 146 at an output of the mixer 144. The second mixed signal 146 passes through various fixed gain amplifiers and attenuators, as well as various filters, and is transmitted from the transmitter 12 as transmit signal 14.

The frequency of the transmit signal 14 transmit by the transmitter 12 of Fig. 4 is given by the sum of the frequency of the first mixed transmitter signal 142 and the frequency of the local oscillator signal 72. For example, if the frequency of the first mixed transmitter signal 142 is approximately 420 MHz, as given above, and the frequency of the local oscillator signal 72 is between 2080 and 2176 MHz, the frequency of the transmit signal 14 is approximately 2500-2596 MHz. The local oscillator signal 72, similar to the local oscillator signal 70, is programmable and controllable by the processor 20 and PLL 64. In this manner, both stages of frequency conversion in the transmitter 12, and hence the frequency of the transmit signal 14, are programmable and controllable.

Fig. 5 shows a detailed diagram, similar to that of Fig. 4, of the receiver 16 according to one embodiment of the invention. In a manner similar to that of the transmitter shown in Fig. 4, the receiver 16 of Fig. 5 includes two frequency conversion stages, provided by a first receiver mixer 150 and a second receiver mixer 154. The first receiver mixer 150 converts the frequency of the receive signal 18, using the local oscillator signal 66 output from the PLL 62 shown in Fig. 2. Likewise, the second receiver mixer 154 converts a first mixed receiver signal 152 output by mixer 150 to a second receiver mixed signal 156 output from mixer 154, using local oscillator signal 68 output from the PLL 62. As in the transmitter 12 of Fig. 4, the receiver 16 of Fig. 5 includes a digital attenuator 104 and an analog attenuator 108 which also provide for a programmable, controllable gain of the receiver 16 via digital gain control signal 48 and analog gain control signal 52, as discussed above.

In one embodiment, a frequency of the receive signal 18 is in a range of from 2.596 GHz to 2.692 GHz, and a frequency of the local oscillator signal 66 is in a range of from 2J56 GHz to 2.252 GHz, resulting in a first mixed receiver signal frequency 152 of approximately 440 MHz. Additionally, a frequency of the local oscillator signal 68 is approximately 404.25 MHz, resulting in a frequency for the second receiver mixed signal 156, and hence the output signal 24, of approximately 35.75 MHz.

A remote control programmable transceiver according to one embodiment of the invention functions as follows. During an initial testing or calibration period, a number of parameters associated with the transceiver 10, such as the gain of the transmitter 12 or the receiver 16, the local oscillator frequencies of the PLLs 62 and 64, a signal strength of the receiver output signal 24, and voltages at various test points 42, may be measured, as well as a temperature dependency of selected parameters, such as transmitter or receiver gain or local oscillator frequencies. Based on the parameters measured during the testing or calibration period, various calibration data is determined and stored in the storage device 58. According to one embodiment, "raw" data corresponding to the measured parameters themselves may also be stored in the storage device 58. Once stored, any calibration data or raw data may be remotely accessed from the storage device 58 through the processor 20 by way of the remote interface 26, as discussed above.

According to one embodiment, the calibration data may be stored in the storage device 58 as a number of calibration data tables. For example, such calibration data tables may include a receive signal strength data table which includes a number of signal strengths. Each signal strength of the table may be associated with a particular level of a signal output by the received signal strength circuit 40, as monitored by the analog-to- digital converter 44 of the processor 20. Accordingly, the received signal strength data table "maps" a signal level to an actual signal strength of the receive signal 18.

By calibrating the received signal strength circuit 40 on a unit-by-unit basis, and storing the calibration data in the form of a received signal strength data table in the storage device 58, transceivers 10 according to various embodiments of the invention are capable of providing absolute power level measurements of the receive signal 18 that may be accurate, for example, to within ± 1 dBm over a 40 dB range. The calibration data stored in the storage device 58 may also include one or more gain compensation data tables for the transmitter 12 and the receiver 16. Each gain compensation data table may include a number of gain values, wherein each gain value is associated with a particular operating temperature of the transmitter 12 and receiver 16. During the initial test or calibration period, the transmitter 12 and receiver 16 may be monitored to measure any changes in gain due to temperature variations. The gain compensation data tables may be formulated based on such parameters monitored during the initial test or calibration period, so that the processor may actively regulate and stabilize transmitter and receiver gains as a function of temperature during normal operation.

As discussed above, the processor 20 may control transmitter or receiver gain based on temperature by consulting the gain compensation data tables stored in the storage device 58. Based on the data arranged in the tables, the processor 20 sends appropriate instructions to the digital-to-analog converter 54, via data bus 80, to output analog gain control signals 50 and 52 to the analog attenuators 106 and 108 of the transmitter 12 and the receiver 16 shown in Figs. 4 and 5, respectively.

According to various embodiments, the gain compensation data tables may include a specific table for the gain variation of each analog attenuator 106 and 108 as a function of temperature, and may also include one or more "master" tables which account for other transmitter and receiver component tolerances in a composite manner as a function of temperature. By programming such gain compensation data after an initial testing or calibration period of transceivers according to the invention on a unit- by-unit basis, predictable, accurate, and reproducible gain control can be achieved amongst a number of transceivers employed in the same communication system. Similarly, the calibration data tables stored in storage device 58 may include one or more frequency compensation data tables which include a number of frequency values, wherein each frequency value is associated with a particular temperature. For example, during the initial test or calibration period, the reference frequency of the voltage controlled crystal oscillator 56 shown in Fig. 2 may be monitored as a function of temperature, and a frequency compensation data table for the voltage controlled crystal oscillator 56 may be formulated from the calibration data and stored in the storage device 58. During normal operation of the transceiver, the processor 20 may consult the frequency compensation data table stored in a storage device 58 based on a temperature output from the temperature sensor as monitored by the analog-to-digital converter 44. The processor may then send instructions to the digital-to-analog converter 54, via data bus 80, to output control signal 51 to the voltage controlled crystal oscillator 56 to appropriately adjust the reference frequency output to the PLLs 62 and 64. According to one embodiment of the invention, various configuration data may also be stored in the storage device 58. As with the calibration data, the configuration data may be remotely downloaded from an external source via the remote interface 26, and once stored may be remotely accessed through the remote interface 26. Additionally, during normal operation, various configuration data, such as frequency or gain set-points, may be reprogrammed in the storage device 58 via the remote interface 26 so that the transceiver 10 may be dynamically controlled.

Additionally, as with the calibration data, the various configuration data may be stored in the storage device 58 as one or more configuration data tables. The configuration data tables may include various set-points for the transmit signal frequency and the output signal frequency, as well as initial gains for the transmitter 12 and the receiver 16. The configuration data may also include, for example, indication modes associated with various operating status of the transceiver 10, as indicated by the status indicator 60.

Additionally, the configuration data may include various update rates for monitoring the received signal strength circuit 40, the temperature 30 and the plurality of test points 42, as well as update rates for stabilizing gains and/or frequencies, including temperature compensation. Furthermore, the configuration data may include respective lower threshold values and upper threshold values for signals such as voltage levels measured at the various test points 42, as well as a model number and a serial number of the transceiver or a textual message entered by an operator.

According to one embodiment of the invention, during normal operation, the processor consults the various configuration and calibration data stored in the storage device 58, which may be in the form of a number of data tables, and controls and monitors the transmitter 12 and the receiver 16 based on the stored data. For example, the processor 20 may consult configuration data tables including various frequency set- points so as to instruct the PLLs 62 and 64 to output local oscillator signals 66, 68, 70 and 72 having appropriate frequencies to achieve the desired frequency up-conversion or down-conversion in the various frequency conversion stages of the transmitter 12 and the receiver 16. Additionally, the processor 20 may consult configuration data stored in storage device 58 to digitally set an initial gain of the transmitter 12 and the receiver 16 via digital gain control signals 46 and 48.

During normal operation, the processor 20 additionally monitors at least some of the various operating parameters associated with the transceiver 10, such as a frequency locking status of the PLLs 62 and 64, the temperature from the temperature sensor 30, signal levels at various test points 42, and received signal strength from received signal strength circuit 40. Based on the monitored operating parameters, the processor 20 compares one or more monitored parameters with the calibration data and/or configuration data stored in the storage device 58 to effect a number of control and/or stabilization functions, thereby ensuring reliable operation of the transceiver 10.

Additionally, the processor 20 may provide various operating status associated with the transceiver 10, through the status indicator 60 or through the remote interface 26 so that operating status information may be remotely accessed. For example, the processor 20 may indicate a failure to stabilize one more of the local oscillator signals 66, 68, 70, or 72, and may additionally disable the transmitter 12 and the receiver 16 if stabilization of one or more parameters such as local oscillator frequency fails. The processor 20 may also provide operating status information in connection with one or more power supply levels associated with the transmitter 12 and/or the receiver 16, as well as if one or more test points 42 are not within a predetermined range, as specified by the configuration data stored in the storage device 58. From the foregoing, it should be appreciated that a wide range of operational versatility and adaptability is provided by remote controlled programmable transceivers according to various embodiments of the invention. Having thus described at least one illustrative embodiment of the invention, various alterations, modifications and improvements will readily occur to those skilled in the art. Such alterations, modifications and improvements are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description is by way of example only and is not intended as limiting. What is claimed is:

Claims

1. Apparatus comprising: a transmitter to transmit a transmit signal; a receiver to receive a receive signal; and a processor coupled to the transmitter and the receiver to monitor and to control the transmitter and the receiver.

2. The apparatus of claim 1, wherein the processor controls a frequency of at least one of the transmit signal and the receive signal.

3. The apparatus of any of the foregoing claims, wherein the processor controls a gain of at least one of the transmitter and the receiver.

4. The apparatus of any of the foregoing claims, wherein the transmit signal and the receive signal each has a frequency greater than 1 GHz.

5. The apparatus of any of the foregoing claims, wherein the transmit signal and the receive signal each has a frequency greater than 2 GHz.

6. The apparatus of any of the foregoing claims, wherein the transmit signal and the receive signal each has a bandwidth of at least approximately 6 MHz.

7. The apparatus of any of the foregoing claims, wherein: the transmitter converts an input signal received by the transmitter to the transmit signal; and the receiver converts the receive signal received by the receiver to an output signal.

8. The apparatus of claim 7, wherein the processor controls a frequency of at least one of the transmit signal and the output signal.

9. The apparatus of claim 7 or 8, wherein each of the transmitter and the receiver includes at least two stages of frequency conversion.

10. The apparatus of any of claims 7-9, wherein: the transmit signal and the receive signal each has a frequency greater than 1

GHz; and the input signal and the output signal each has a frequency in a range of from 10 MHz to 1 GHz.

11. The apparatus of any of the foregoing claims, further including a remote interface, coupled to the processor, through which to remotely program, control, and monitor the processor, the transmitter, and the receiver.

12. The apparatus of claim 11, wherein only programming signals, control signals, and monitor signals pass through the remote interface.

13. The apparatus of claim 11 or 12, wherein a frequency of at least one of the transmit signal and the output signal is remotely controllable.

14. The apparatus of any of claims 11-13, wherein a gain of at least one of the transmitter and the receiver is remotely controllable.

15. The apparatus of any of claims 11-14, wherein the remote interface includes a programmable logic device to receive programming signals and control signals and to transmit monitor signals to remotely program, control, and monitor the processor, the transmitter, and the receiver.

16. The apparatus of claim 15, wherein the programmable logic device includes at least one serial interface.

17. The apparatus of claim 16, wherein the at least one serial interface is an RS232 and TTL compatible interface.

18. The apparatus of claim 16, wherein the programming signals, the control signals, and the monitor signals are on-off-keyed signals.

19. The apparatus of claim 18, wherein the programmable logic device includes a modulator to modulate the monitor signals and a demodulator to demodulate the programming signals and the control signals.

20. The apparatus of claim 19, wherein: the modulator converts RS232 signals to the on-off-keyed signals; and the demodulator converts the on-off-keyed signals to the RS232 signals.

21. The apparatus of claim 18, wherein: the transmitter converts an input signal received by the transmitter to the transmit signal; the receiver converts the receive signal received by the receiver to an output signal; and the on-off-keyed signals are multiplexed with at least one of the input signal and the output signal.

22. The apparatus of claim 21 , wherein: each of the input signal and the output signal has a respective bandwidth; and each on-off-keyed signal has a respective frequency outside of both respective bandwidths.

23. The apparatus of claim 22, wherein the respective frequency of each on- off-keyed signal is approximately 500 kHz.

24. The apparatus of any of the foregoing claims, further including a received signal strength circuit, coupled to the processor, to measure a power level of the receive signal received by the receiver.

25. The apparatus of claim 24, wherein the received signal strength circuit is capable of continuously measuring the power level at a predetermined update rate.

26. The apparatus of claim 24 or 25, wherein: the receiver converts the receive signal received by the receiver to an output signal; and the received signal strength circuit measures the power level of the receive signal by monitoring the output signal.

27. The apparatus of any of claims 24-26, wherein the processor includes an analog to digital converter to convert the power level measured by the received signal strength circuit to a digital power level.

28. The apparatus of any of the foregoing claims, wherein: the transmit signal has a first frequency; the output signal has a second frequency; and the apparatus further includes at least one controllable frequency synthesizer phase-locked loop, coupled to the processor, to control the first frequency and the second frequency.

29. The apparatus of claim 28, wherein the processor is capable of disabling the transmitter if at least one of the first frequency and the second frequency becomes unlocked.

30. The apparatus of any of the foregoing claims, wherein: the transmitter has a transmitter gain; the receiver has a receiver gain; and the apparatus further includes at least one gain adjustment circuit, coupled to the processor, to adjust at least one of the transmitter gain and the receiver gain.

31. The apparatus of claim 30, wherein the at least one gain adjustment circuit includes a digital attenuator to digitally adjust the at least one of the transmitter gain and the receiver gain.

32. The apparatus of claim 30 or 31, wherein the at least one gain adjustment circuit is capable of adjusting the at least one of the transmitter gain and the receiver gain in ±l dB increments.

33. The apparatus of claim 30, wherein the at least one gain adjustment circuit includes a digital to analog converter.

34. The apparatus of claim 33, wherein the at least one gain adjustment circuit includes at least one analog attenuator coupled to the digital to analog converter.

35. The apparatus of claim 33, wherein the at least one gain adjustment circuit is capable of both coarse and fine adjustments of the at least one of the transmitter gain and the receiver gain.

36. The apparatus of claim 35, wherein: the at least one gain adjustment circuit adjusts the at least one of the transmitter gain and the receiver gain in ±1 dB increments as a coarse adjustment; and the at least one gain adjustment circuit adjusts the at least one of the transmitter gain and the receiver gain in ±0.2 dB increments as a fine adjustment.

37. The apparatus of any of the foregoing claims, further including a temperature sensor, coupled to the processor, to monitor a temperature of at least one of the transmitter and the receiver.

38. The apparatus of claim 37, wherein the processor includes an analog to digital converter to measure a temperature signal from the temperature sensor.

39. The apparatus of claim 37, wherein: the transmitter has a transmitter gain; the receiver has a receiver gain; and the apparatus further includes a gain compensation circuit, coupled to the processor, to automatically adjust the transmitter gain and the receiver gain based on the temperature.

40. The apparatus of claim 39, wherein the gain compensation circuit adjusts at least one of the transmitter gain and the receiver gain for every 2 degree Celsius change in the temperature.

41. The apparatus of claim 37, wherein: the transmit signal has a first frequency; the output signal has a second frequency; and the apparatus further includes a frequency compensation circuit, coupled to the processor, to adjust at least one of the first frequency and the second frequency based on the temperature.

42. The apparatus of claim 41, wherein the frequency compensation circuit includes: a digital to analog converter coupled to the processor; and a voltage controlled oscillator having a reference frequency based on an output voltage of the digital to analog converter, wherein the first frequency and the second frequency are each based on the reference frequency.

43. The apparatus of any of the foregoing claims, further including an indicator, coupled to the processor, to indicate an operating status of at least one of the transmitter and the receiver.

44. The apparatus of claim 43, wherein the indicator is an LED.

45. The apparatus of claim 44, wherein the LED indicates the operating status using a plurality of blink codes.

46. The apparatus of claim 45, wherein each blink code includes at least one of a unique blink rate and a unique blink number.

47. The apparatus of any of claims 43-46, wherein the operating status indicates a level of source power to the transmitter and the receiver.

48. The apparatus of any of claims 43-47, wherein: the transmit signal has a first frequency; the output signal has a second frequency; and the operating status indicates a stability of at least one of the first frequency and the second frequency.

49. The apparatus of any of the foregoing claims, wherein: the transmitter and the receiver include a plurality of test points; and the processor includes an analog to digital converter to monitor the plurality of test points.

50. The apparatus of claim 49, wherein the analog to digital converter monitors a respective voltage at each test point.

51. The apparatus of any of the foregoing claims, further including a storage device, coupled to the processor, to store at least one of calibration data and configuration data associated with the transmitter and the receiver.

52. The apparatus of claim 51 , wherein the storage device is an EEPROM.

53. The apparatus of claim 51 or 52 , further including a programmable logic device coupled to the processor, the programmable logic device transmitting and receiving data signals to remotely download and monitor the calibration data and the configuration data to and from the storage device.

54. The apparatus of any of claims 51-53, wherein the configuration data includes a model number and a serial number of the apparatus.

55. The apparatus of any of claims 51-54, wherein the configuration data includes an indication mode of an operating status of at least one of the transmitter and the receiver.

56. The apparatus of any of claims 51-55, wherein the calibration data includes temperature compensation tables.

57. The apparatus of claim 56, wherein: the temperature compensation tables include at least one gain compensation table; and the processor includes a gain compensation circuit to adjust a gain of at least one of the transmitter and the receiver based on the at least one gain compensation table.

58. The apparatus of claim 57, wherein: the gain compensation circuit includes at least one analog attenuator; and the at least one gain compensation table includes an analog attenuator compensation table which includes data representing a temperature dependence of a gain of the at least one analog attenuator.

59. The apparatus of claim 57 or 58, wherein the at least one gain compensation tables includes at least one master gain compensation table which includes data representing a composite temperature dependence of a plurality of circuit components associated with the transmitter and the receiver.

60. The apparatus of any of claims 56-59, wherein: the temperature compensation tables include at least one frequency compensation table; and the processor includes a frequency compensation circuit to adjusting a frequency of at least one of the transmit signal and the output signal based on the at least one frequency compensation table.

61. A method of operating a transceiver, comprising steps of: monitoring at least some of a plurality of operating parameters associated with the transceiver; and making a comparison of a first operating parameter of the at least some monitored operating parameters and at least one of calibration data and configuration data associated with the transceiver.

62. The method of claim 61 , wherein the method further includes a step of remotely controlling at least one operating parameter of the plurality of operating parameters.

63. The method of claim 62, wherein: the plurality of operating parameters includes a frequency of at least one signal passing through the transceiver; and the method further includes a step of remotely controlling the frequency.

64. The method of claim 62 or 63, wherein: the plurality of operating parameters includes a gain of at least one signal passing through the transceiver; and the method further includes a step of remotely controlling the gain.

65. The method of any of claims 61-64, further including a step of stabilizing at least one of the first operating parameter and a second operating parameter of the plurality of operating parameters based on the comparison.

66. The method of claim 65, wherein: the at least one of the first operating parameter and the second operating parameter is a frequency of the transceiver; and the method further includes a step of disabling the transceiver if the step of stabilizing fails.

67. The method of any of claims 61-66, further including a step of remotely accessing the at least some monitored operating parameters.

68. The method of any of claims 61-67, further including a step of indicating an operating status of the transceiver.

69. The method of claim 68, further including a step of remotely accessing the operating status.

70. The method of claim 68 or 69, wherein: the method further includes a step of stabilizing at least one of the first operating parameter and a second operating parameter of the plurality of operating parameters based on the comparison; and the operating status includes an indication of a failure to stabilize the at least one of the first operating parameter and the second operating parameter.

71. The method of any of claims 68-70, wherein the operating status includes an indication of at least one power level associated with the transceiver.

72. The method of any of claims 61-71, further comprising steps of: measuring the plurality of operating parameters during a testing period; determining the calibration data from at least some of the measured operating parameters; and storing the calibration data in the transceiver.

73. The method of claim 72, wherein the step of storing the calibration data includes a step of remotely downloading the calibration data.

74. The method of claim 72 or 73, further including a step of remotely accessing the stored calibration data.

75. The method of any of claims 72-74, further including a step of storing the plurality of operating parameters measured during the testing period in the transceiver.

76. The method of claim 75, further including a step of remotely accessing the stored parameters measured during the testing period.

77. The method of any of claims 72-76, wherein: the step of determining the calibration data includes a step of constructing calibration data tables based on the calibration data; and the step of storing the calibration data includes a step of storing the calibration data tables in the transceiver.

78. The method of claim 77, wherein: the first operating parameter is a first signal that represents a strength of a receive signal received by the transceiver; and the calibration data tables include a received signal strength data table, wherein the received signal strength data table includes a plurality of signal strengths, each signal strength associated with a particular level of the first signal.

79. The method of claim 77, wherein: the method further includes a step of stabilizing a second operating parameter of the plurality of operating parameters based on the comparison; the first operating parameter is a temperature of the transceiver; the second operating parameter is a gain of the transceiver; and the calibration data tables include at least one gain compensation data table, wherein the at least one gain compensation data table includes a plurality of gain values, each gain value associated with a particular temperature.

80. The method of claim 77, wherein: the method further includes a step of stabilizing a second operating parameter of the plurality of operating parameters based on the comparison; the first operating parameter is a temperature of the transceiver; the second operating parameter is a frequency of the transceiver; and the calibration data tables include a frequency compensation data table, wherein the frequency compensation data table includes a plurality of frequency values, each frequency value associated with a particular temperature.

81. The method of any of claims 61-80, further comprising a step of storing the configuration data in the transceiver.

82. The method of claim 81 , wherein the step of storing the configuration data includes a step of remotely downloading the configuration data.

83. The method of claim 81 or 82, further including a step of remotely accessing the stored configuration data.

84. The method of any of claims 81-83, wherein the step of storing the configuration data includes steps of: constructing configuration data tables based on the configuration data; and storing the configuration data tables in the transceiver.

85. The method of any of claims 81-84, wherein the configuration data includes an indication mode of an operating status of the transceiver.

86. The method of any of claims 81-85, wherein : the first operating parameter is a temperature of the transceiver; the second operating parameter is a gain of the transceiver; and the configuration data includes an update rate for monitoring the temperature and stabilizing the gain.

87. The method of any of claims 81-86, wherein: the at least some monitored parameters include a plurality of test points on the transceiver; and for each test point of the plurality of test points, the configuration data includes a respective lower threshold value and a respective upper threshold value.

88. The method of claim 87, further including a step of indicating when at least one test point of the plurality of test points is not within a range between the respective lower threshold and the respective upper threshold.

89. The method of any of claims 81-88, wherein the configuration data includes a model number and a serial number of the transceiver.

90. The method of any of claims 81 -89, wherein: the plurality of parameters includes a transmit frequency and a receive frequency; and the configuration data includes a transmit frequency set-point and a receive frequency set-point.

91. The method of any of claims 81-90, wherein: the plurality of parameters includes a transmit gain and a receive gain; and the configuration data includes a transmit gain set-point and a receive gain set- point.

92. The method of any of claims 81-91, wherein the configuration data includes a textual message.