WO2000057557A1

WO2000057557A1 - Method and apparatus for boosting backplane drive circuits

Info

Publication number: WO2000057557A1
Application number: PCT/US2000/007821
Authority: WO
Inventors: Andrew R. Berding
Original assignee: Arizona Digital, Inc.
Priority date: 1999-03-24
Filing date: 2000-03-24
Publication date: 2000-09-28

Abstract

A boost circuit (200) is configured to supplement a drive current provided by the drivers on a computer backplane. When the driverdrives the signal to pass a lower threshold (224), the boost circuit engages to drive a current larger than the driver current provided by the driver to switch the signal above an upper threshold (226) more quickly. When the signal passes the upper threshold (226), the boost circuit disengages and the driver suitably maintains the signal at the higher level. As the driver then starts to drive the signal negative, once the signal again passes the upper threshold (226), the boost circuit engages to drive a current larger than the drive current provided by the driver to switch the signal below the lower threshold (224) more quickly.

Description

METHOD AND APPARATUS FOR BOOSTING BACKPLANE DRIVE CIRCUITS

BACKGROUND OF THE INVENTION

1 Field of the Invention The present invention relates generally to methods and apparatus for boosting drive circuits, and more particularly to a boost circuit for boosting drive circuits in computer backplanes

2 Description of the Related Art

In general, computer backplanes are used for interconnecting circuit boards in a high speed data processing system More particularly, computer backplanes are configured with a plurality of connectors for receiving the circuit boards The connectors are interconnected with pins and traces to form a bus for carrying signals between the connectors Here a bus is defined as a collection of similar signals such as 64-bιts of data Typically, a driver circuit on one connector sends a signal along the bus to be received by a receiver circuit on another connector The ever increasing demand for more computing power and speed, however, has placed a severe load on conventional driver circuits of backplanes In general, the desired drive current to send a signal can be represented by the formula

I = C x dV/dT Accordingly, the desired drive current is proportional to the total net capacitance ("C"), which is the sum of the capacitance of the backplane, the capacitance of all the connectors, the capacitance of all the stubs, and the capacitance of the drivers and receivers In a conventional VME ("Versa Module European ') backplane or a Compact PCI ("Peripheral Component Interface^") backplane, such capacitance can readily equal 450 pico-farads or 250 pico-farads, respectively Additionally, the drive current is proportional to the desired voltage change ("dV") Typically, in order to send and receive a valid signal, a voltage change of approximately 2 0 volts is desired The drive current, however, is inversely proportional to the desired rise-time or fall-time ("dT") In general, the faster the desired data transfer, the faster the desired transition times, and the greater the required drive current For example, in a 33 megahertz Compact PCI bus. a transition time of approximately 15 nano-seconds is desired, thus a minimum driver current of at least 33 milliamps is required For a 66 megahertz Compact PCI bus, a minimum driver current of at least 66 milliamps is required However, a conventional Compact PCI driver typically can provide a maximum of only 8 milliamps Consequently, conventional Compact PCI busses are limited to 8 slots at 33 MHZ and 4 slots at 66 megahertz, which presents a severe system design limitation SUMMARY OF THE INVENTION In accordance with one embodiment of the present invention, a boost circuit is configured to supplement the drive current provided by the drivers on a computer backplane. More particularly, as a driver begins to drive a signal positive (i.e., from a logic low state to a logic high state), when the signal passes a lower threshold, the boost circuit engages to drive a current larger than the drive current provided by the driver to switch the signal above an upper threshold more quickly. When the signal passes the upper threshold, the boost circuit disengages and the driver suitably maintains the signal at the higher level. As the driver then starts to drive the signal negative (i.e., from a logic high state to a logic low state), when the signal again passes the upper threshold, the boost circuit engages to drive a current larger than the drive current provided by the driver to switch the signal below a lower threshold more quickly. When the signal again passes the lower threshold, the boost circuit disengages and the driver suitably maintains the signal at the lower level. In accordance with another embodiment of the invention, a boost circuit is provided to supplement the drive current provided by the drivers on a computer backplane and the supplemental current is driven through a damping impedance.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention will hereinafter be described in conjunction with the appended drawings wherein:

Figure 1 illustrates a portion of a prior art VME320 backplane;

Figures 2 and 3 illustrate graphically the rise time and the fall time, respectively, of signals transmitted on backplanes; Figure 4 illustrates a portion of a VME 320 backplane configured with a boost circuit in accordance with one embodiment of the present invention;

Figure 5 illustrates a portion of a backplane in accordance with a further embodiment of the invention;

Figure 6 illustrates schematically a boost circuit in accordance with one embodiment of the present invention;

Figure 7 illustrates schematically an alternate boost circuit in accordance with another embodiment of the present invention; Figure 8 illustrates graphically the rise and fall times of a signal using a boost circuit configured to respond to current change of the signal in accordance with various aspects of the present invention ,

Figures 9 and 10 graphically compare the rise time and fall time of signals using a boost circuit in accordance with the invention to the rise time and fall time of signals that do not use such a boost circuit, and

Figures 1 1-15 illustrate results achieved with various configurations in accordance with the invention in contrast to results achieved with the prior art

DETAILED DESCRIPTION OF PREFERRED EXEMPLARY EMBODIMENTS

The subject matter of the present invention is particularly suited for use in connection with a backplane configured in accordance with the VME320 standard As a result, an exemplary embodiment of the present invention is described in that context It should be recognized, however, that such description is not intended as a limitation on the use or applicability of the present invention, but is instead provided to enable a full and complete description of the exemplary embodiment

Figure 1 illustrates a conventional backplane 102 including a plurality of connectors 103 and a plurality of pins arranged in an array of rows and columns, with each connector 103 configured with columns which are three pins wide Other implementations of the VME backplane use connectors that are five or more rows wide The location of the connectors is indicated schematically by a dot-dash line In accordance with the VME320 standard, each common pin is connected by a separate trace to a common point For example, in the bottom row of pins, the left-hand pin of each connector 103 is connected to a common point 106 by a separate trace emanating from common point 106 Specifically, a trace 107 connects pin 108 to common point 106, a trace 109 connects pin 1 10 to common point 106, a trace 11 1 connects pin 1 12 to common point 106, a trace 1 13 connects pin 1 14 to common point 106, a trace 1 15 connects pin 1 16 to common point 106, a trace 1 17 connects pin 1 18 to common point 106, and so on, for all commonly connected pins on all connectors In a similar manner, a common point 120 is connected to the left-hand pins in the second row, as are the remaining pins (not shown) on the backplane 102 that are to be connected together In this manner, common point 106, common point 120, and the other common points on the backplane 102 define a set of common points for the connectors 103 along a center ne 104 on backplane 102 For a more complete discussion of the VME320 backplane, refer to U S Pat No 5,696,667, issued December 9, 1997, the entire content of which is incorporated herein by reference It is not necessary that the common points be located along the centerhne, but that location is optimum for most applications Likewise, it is not necessary that the "common point" actually be a point Instead it can be a common region, for example, extending across slots 9-13 in a 21 -slot backplane Drivers and receivers typically are used to transmit signals between connectors 103 on backplane 102 For example, a signal can be transmitted from pin 1 12 to pin 1 10 by using a driver connected to pin 1 12 and a receiver connected to pin 1 10 The signal sent by the driver travels along traces 1 1 1 and 109 to the receiver It should be appreciated, however, that the specific path by which a signal is transmitted from one pin to another can vary depending on the particular application

In general, the signals transmitted between connectors 103 on backplane 102 are square wave pulses In the context of backplanes, a signal received with a voltage greater than a first specified value is typically defined as a logic "high" or "1" A signal received with a voltage less than a second specified value is typically defined as a logic "low" or "0" For the VME320 standard, the first and second specified values are 2 0 volts and 0 8 volts, respectively Any voltages between 2 0 and 0 8 volts are considered to be at an indeterminate logic level and logic circuits randomly interpret the voltage as either a logic high or a logic low with unpredictable results

In Figure 2 an idealized waveform 402 is depicted as having virtually no rise time (l e , the time required to switch from a logic low to a logic high state) However, waveform 404 having a rise time 406 to switch from a logic low state to a logic high state is more realistic for prior art backplanes and prior art drivers Similarly in Figure 3, an idealized waveform 502 is depicted as having virtually no fall time (l e , the time required to switch from a logic high to a logic low state) A more realistic waveform 504 is depicted as having a fall time 506 to switch from a logic high state to a logic low state In an idealized situation in which the drivers have a nearly infinite current drive capability and in which the circuitry has nearly zero parasitic capacitance, the idealized waveforms can be approached In the real world of limited drive capacity and substantial parasitic capacitance, such idealized waveforms cannot be achieved with prior art backplanes The rise time 406 of the waveform 404 and fall time 506 of the waveform 504 are due in part to the capacitance of the connectors, stubs, drivers, receivers, and traces of the backplane The limited current capacity of conventional drivers also contπbutes to longer rise and fall times

Figure 4 illustrates an improved backplane 202 in accordance with one embodiment of the invention Like backplane 102 of Figure 1, backplane 202 includes a plurality of connectors 103 and a plurality of pins arranged in an array of rows and columns Common pins are connected to a common point such as common point 106 or 120 by individual, separate traces For example, common pins 1 12 and 1 10 are connected to common point 106 by traces 1 1 1 and 109, respectively In accordance with the invention, however, a boost circuit 200 is coupled to common point 106 and a boost circuit 204 is coupled to common point 120 Preferably, each boost circuit is located in close proximity to but slightly removed from its associated common point and is coupled to that common point by a short metal trace Simulations have shown that circuit performance is slightly enhanced by having the boost circuit slightly removed from the common point rather than being located at the common point The small series inductance of the short trace causes a beneficial peaking that improves the resulting waveforms The boost circuit is configured to supplement the drive current provided by the drivers (not shown) on a backplane to reduce signal rise and fall times In one embodiment of the invention, as a driver _>taπs to drive a signal positive (I e , from a logic low state to a logic high state), when the signal passes a lower threshold voltage, the boost circuit engages to drive a current larger than the drive current provided by the driver to switch the signal above an upper threshold voltage more quickly When the signal passes the upper threshold voltage, the boost circuit disengages and the driver suitably maintains the signal at the higher level As the driver starts to drive the signal negative (I e , from a logic high state to a logic low state), when the signal again passes the upper threshold voltage, the boost circuit engages to drive a current larger than the drive current provided by the driver to switch the signal below the lower threshold voltage more quickly When the signal passes the lower threshold voltage, the boost circuit disengages and the driver suitably maintains the signal at the lower level In addition to enhanced switching speeds achieved with backplanes configured in accordance with the invention, because the bulk of the drive current is provided by the boost circuit, power dissipation by the drive circuit is minimized

Figure 5 illustrates a backplane 902 in accordance with a further embodiment of the invention Like backplane 202 of Figure 4, backplane 902 includes a plurality of connectors 103 and a plurality of pins arranged in an array of rows and columns Common pins are connected to a common point such as common point 106 or 120 by individual, separate traces For example common pins 1 12 and 1 10 are connected to common point 106 by traces 1 1 1 and 109, respectively Additionally, a boost circuit 200 is coupled to point 106 and a boost circuit 204 is coupled to common point 120 In accordance with this embodiment of the invention, however, the commonly connected pins are not connected directly to the common points 106, 120 but rather are coupled through a damping impedance 903 Each of the traces such as 1 1 1 coupling pin 1 12 and 109 coupling pin 1 10. respectively, to common point 106 includes such a damping impedance 903 Although coupling the common pins through individual traces to a common point such as common point 106 helps in making the circuit act like a simple lumped inductance and capacitance rather than as a complex transmission line as is explained in U S Patent 5,696,667, the traces still retain some aspects of transmission line characteristics, especially at high frequencies The use of damping impedance 903 in coupling each of the individual traces such as traces 1 1 1 and 109 to common point 106 acts as a parallel termination for signals transmitted to common point 106 and as a series termination for signals transmitted from common point 106 Damping resistors 903 used in this manner can totally eliminate all signal reflections on the associated traces and thus can remove the major performance limitations to backplanes Furthermore, on backplanes configured in accordance with this embodiment of the invention, much of the power dissipated in driving the traces will now be dissipated in the passive resistors instead of in the boost circuit, and this improves reliability In addition, the series resistor acts as a current miter on the driver (not shown), thus limiting over drive conditions

Ideally the value of each damping impedance 903 should be equal to the characteristic impedance of the individual trace (and associated loading) coupled to that damping impedance Exact matching of the impedance value is impractical for a number of reasons For example, backplanes are often manufactured for general application without an exact knowledge of the boards to be plugged into the connectors provided on the backplane In addition, boards may be inserted or removed from the backplane from time to time, and each change in configuration will change the characteristic impedance of the associated traces As a compromise, a value in the range of approximately 65 ohms resistive can be selected for the damping impedance 903 The damping impedance is illustrated in Figure 5 as being a resistor Damping impedance 903 can be a resistor, but preferably is a resistor in parallel with a small capacitance The presence of the capacitance helps to peak the driving waveform which compensates somewhat for the shunt capacitance of the load The damping resistors can be implemented as discrete resistors, surface mount resistors, SIPs, buried resistors, or other well known backplane or printed circuit board technology A boost circuit for use with either the embodiment illustrated in Figure 4 or the embodiment illustrated in Figure 5 preferably has the following characteristics A sensing circuit senses when the signal from a driver exceeds some minimum specified threshold value The threshold value can be a specified voltage value or a specified current value The sensing of a specified current value is particularly preferred when using the embodiment of the invention illustrated in Figure 5 Upon sensing that the signal from the driver has exceeded the minimum specified value, the boost circuit supplies an additional drive to cause a rapid transition from the low state to the high state When using voltage sensing, upon reaching a second specified threshold voltage value, the boost circuit is disabled and the driver maintains the signal at the high level Similarly, when the driver starts to dπve the signal from a high state to a low state, a sensing circuit senses when the signal from the driver falls below a specified voltage value or a specified current value Upon sensing that the signal from the driver has fallen below the specified threshold value, the boost circuit supplies an additional drive to cause a rapid transition from the high state to the low state When sensing voltage, upon reaching the minimum threshold voltage value the boost circuit is disabled and the driver maintains the signal at the low level During the transition, either from the low state to the high state or from the high state to the low state, a circuit such as a latch circuit is necessary to maintain the boost circuit in an engaged state

As stated above, in the context of backplanes, a signal with a voltage less than 0 8 volts is typically defined as being at a logic low state A signal with a voltage greater than 2 0 volts is typically defined as being at a logic high state Accordingly, when using specified voltages as the threshold values, boost circuit 200 is preferably configured with a lower threshold of 0 8 volts and an upper threshold of 2 0 volts Figure 6 illustrates one boost circuit 200 in accordance with the invention Boost circuit 200 includes a negative comparator 214 to which a reference voltage 224 of about 0 8 volts is coupled Similarly, a reference voltage 226 of about 2 0 volts is coupled to a positive comparator 212 It should be appreciated, however, that the boost circuit 200 can be configured with any suitable lower and upper thresholds depending on the particular application

Accordingly, when pin 210 is at a logic low state (I e , either not being driven by a signal or being driven by a signal with a voltage less than 0 8 volts), an input 228 of negative comparator 214 is at a logic low state (l e , below 0 8 volts), and an output 230 of negative comparator 214 is at a logic low state This results in an output 236 of a N AND 220 being high as input 232 of NAND 220 is low Thus, a tπ-state 222 is disabled and no additional current is added or subtracted at a junction 266 Additionally, an output 258 of a latch 218 is high which makes the output 254 of a latch 216 low As the output 254 of the latch 216 is connected to an input 262 of a latch 218, the output 258 of the latch 218 is held high regardless of the condition of input 260

When a driver (not shown) connected to pin 210 drives a signal with a voltage somewhat greater than 0 8 volts (that is, a voltage between threshold 224 and threshold 226) into pin 210, output 230 of negative comparator 214 goes high and output 250 of positive comparator 212 remains high Thus, output 236 of NAND 220 goes low which enables tπ-state 222 and the signal at pin 210 is driven more positive as input 240 of tπ-state 222 is high In accordance with one aspect of the present invention, the signal at pin 210 is driven with a current considerably higher than the drive current by the driver (not shown) connected to pin 210 In an exemplary embodiment, the signal at pin 210 is driven by circuit 222 with a current in the range of 30 to 100 milliamps, and more particularly 64 milliamps whereas the driver circuit (not shown) connected to pin 210 may only be able to drive 8 milliamps When the signal at pin 210 is driven past the upper threshold of 2 0 volts, output 250 of positive comparator 212 goes low This results in output 236 of NAND 220 going high, thus disabling tπ-state 222 Additionally, output 254 of latch 216 goes high which makes the output 258 of latch 218 go low The circuit will remain in this state until the driver (not shown) connected to pin 210 drives the signal low

When the driver (not shown) connected to pin 210 then drives the signal somewhat lower than 2 0 volts (that is, between the upper threshold 226 and the lower threshold 224), output 250 of positive comparator 212 goes high As output 230 of negative comparator 214 is high, output 236 of NAND 220 goes low, thus enabling tπ-state 222 As output 258 of latch 218 is low, the signal at pin 210 is driven lower by circuit 222 with a current considerably higher than the drive current by the driver (not shown) connected to pin 210 In an exemplary embodiment, the signal at pin 210 is driven by circuit 222 with a current in the range of 30 to 100 milliamps, and more particularly 64 milliamps, whereas the driver circuit (not shown) connected to pin 210 may only be able to drive 8 milliamps When the signal at pin 210 is driven past the lower threshold of 0 8 volts, output 230 of negative comparator 214 goes low This results in output 236 of NAND 220 going high, thus disabling tπ-state 222 The circuit will remain in this state until the driver (not shown) connected to pin 210 drives the signal high

It should be appreciated that boost circuit 200 is an exemplary embodiment of the present invention and that various changes can be made without departing from the spirit and scope of the present invention For example, with reference to Figure 7, a negative driver 302 and a positive driver 304 can be used to drive the signal negative and positive, respectively, rather than tπ-state 222 (Figure 6) Additionally, either embodiment of the boost circuit (Figure 6 or Figure 7) can be configured to include various other compatible circuits elements such as terminating resisters, overshoot diodes, and the like

Alternatively, rather than sensing voltage changes, a boost circuit according to various aspects of the present invention can be suitably configured to respond to current changes As noted above, sensing current changes is especially advantages with the embodiment illustrated in Figure 5 With reference to Figure 8, unlike boost circuit 200 (Figure 6), a boost circuit configured to respond to current changes remains enabled at all times As depicted by portion 804 of curve 802, when the current decreases to a lower threshold, such as negative 8 milliamps, then a driver (not shown) has engaged to dπve the signal positive Thus, the boost circuit engages to drive the current in the opposite direction with a current considerably higher than the drive current by the driver In an exemplary embodiment, the signal is driven with a current in the range of 30 to 100 milliamps, and more particularly with a current of 64 milliamps Similarly, as depicted by portion 812 of curve 802, when the current increases to an upper threshold, such as positive 8 milliamps, then a driver (not shown) has engaged to drive the signal negative Thus, the boost circuit engages to drive the current in the opposite direction with a current considerably higher than the current supplied by the driver (not shown) In an exemplary embodiment, the signal is driven by the boost circuit with a current in the range of 30 to 100 milliamps, and more particularly with a current of 64 milliamps It should be recognized that various upper and lower current values can be used depending on the particular application

Although not specifically illustrated in the Figures, the boost circuit can also be configured as a D-latch The boost circuit would then be inactive, regardless of driver current, until clocked by the appropriate clock signal Such an embodiment could completely remove all driver skew

Figures 9 and 10 illustrate the improvement in rise and fall time that can be experienced by using the boost circuit of Figure 6 in the embodiment of backplane illustrated in Figure 4 As illustrated in Figure 9, boost circuit 200 can significantly reduce the rise time of a signal from a lower threshold of about 0 8 volts up past an upper threshold of about 2 0 volts More particularly, line 602 depicts the rise time for a signal to be driven from a level of about 0 8 volts to past about 2 0 volts without boost circuit 200 Similarly, line 604 depicts the rise time for a signal to be driven from about 0 8 volts to past about 2 0 volts with boost circuit 200 A significant rise time differential 610 is noted between the two results Line 606 depicts the signal being driven bv the backplane driver after the boost circuit 200 is disengaged

In similar manner Figure 10 illustrates the significant reduction in fall time of a signal from an upper threshold of about 2 0 volts to a lower threshold of about 0 8 volts that can be achieved by the use of a boost circuit 200 in accordance with the invention More particularly, line 702 depicts the fall time required for a signal to be drive down from about 2 0 volts to past about 0 8 volts without boost circuit 200 In contrast, line 704 depicts the fall time required with boost circuit 200 The fall time differential 710 between the two results shows a substantial improvement Line 706 depicts the signal being driven by the backplane driver after the boost circuit 200 has been disengaged By reducing both rise and fall times, the boost circuit 200 (Figure 6 as applied to the backplane of Figure 4) facilitates increased operating speed of the backplane Additionally, the additional current capacity provided by the boost circuit 200 facilitates increasing the number of boards connected to the backplane

The improvement to be realized by implementing the invention is more generally illustrated by the results shown in Figures 1 1-15 Figure 1 1 depicts results obtained in computer simulations on a structure such as a conventional backplane on which the traces are stitched from slot 1 to 2 to 3 to to 21 as is illustrated in Figure 1 of U S Patent 5,696,667 Figures 12 and 13 depict results obtained in computer simulations on a structure such as the backplane illustrated in Figure 1 Figures 14 and 15 depict results obtained in computer simulations on a structure such as the backplane illustrated in Figure 5 The results illustrated in Figures 12-15 were obtained using a boost circuit as illustrated in Figure 8 In each computer simulation the drive signal was as illustrated by the line 650 The collection of lines 660 shown in Figure 1 1 indicate the signals detected at slots 2 4, 6, 8, 10, 14, 17, and 21 of a conventional prior art VME backplane under maximum loading conditions This is to be contrasted with the collection of lines 670 in Figure 12 which indicate the signals detected at slots 2, 9, 11, 13, 17, and 21 of a VME320 backplane in accordance with the embodiment of the invention illustrated in Figure 1 under similar maximum loading conditions Notice especially that the reduced amount of skew between the various slots The collection of lines 680 in Figure 15 indicate the signals detected at slots 1, 2, 4, 6, 8, 9, 1 1, 13, and 21 of a VME320 backplane in accordance with the embodiment of the invention illustrated in Figure 5 under similar maximum loading conditions These results demonstrate even less skew and, in addition, no ringing due to reflections of signals Figures 13 and 14 illustrate signals detected on slots in the same backplanes as in Figures 12 and 15 respectively, but with minimum loading

Although the exemplary embodiments thus far have been described in the context of a VME320 backplane, the present invention can be used with various backplane architectures, such as VME, Compact PCI (cPCI), PCI+, and other standard and/or custom backplanes A boost circuit in accordance with various aspects of the present invention is particularly well suited for use with a Compact PCI backplane as they typically have drivers with less current capacity in comparison to VME backplanes Thus, the operating speed of a Compact PCI backplane and the maximum number of boards which can be connected to the Compact PCI backplane can be increased by configuring the Compact PCI backplane with a boost circuit in accordance with various aspects of the present invention.

Although the present invention has been described in conjunction with particular embodiment illustrated in the appended drawing figures, various modifications may be made without departing from the spirit and scope of the invention. Therefore, the present invention should not be construed as limited to the specific form shown and described above.

Claims

1 A method for boosting a drive circuit for use in a computer backplane, said method comprising the steps of driving a current signal having an initial value with said drive circuit passed a first threshold voltage, engaging a boost circuit to provide a supplemental current to said current signal until said current signal passes a second threshold voltage to a second value, disengaging said boost circuit, and maintaining said current signal at said second value, wherein said drive circuit realizes increased switching speeds from said first value to said second value while minimizing any power dissipated

2 The method of claim 1 , wherein said step of driving a current signal having an initial value comprises driving said current signal positive passed a lower threshold voltage, and said step of engaging a boost circuit comprises providing said supplemental current to said current signal until said current signal passes a higher threshold voltage

3 The method of claim 1 , wherein said step of driving a current signal having an initial value comprises driving said current signal negative below a higher threshold voltage, and said step of engaging a boost circuit comprises providing said supplemental current to said current signal until said current signal passes below a lower threshold voltage

4 An apparatus for boosting a drive circuit for use in a computer backplane, said apparatus comprising a sensing circuit for sensing when a current signal having an initial value passes a first threshold value and a second threshold value, a boosting circuit for providing a supplemental current to said current signal to provide a more rapid transition from said first threshold value to a second threshold value, said boosting circuit operating when said sensing circuit senses said current signal passing said first threshold value, and disengaging when said current signal passes said second threshold value, and a latch circuit for maintaining said boosting circuit in an engaged state

5. The apparatus of claim 4, wherein said apparatus further comprises a plurality of damping impedances respectively coupled between a plurality traces of said backplane and a common point of said backplane such that power is dissipated in said damping impedances.

6. The apparatus of claim 5, wherein said damping impedances comprises passive resistors.

7. The apparatus of claim 6, wherein each of said damping impedances comprises a value substantially equal to each of said respectively coupled plurality of traces.

8. The apparatus of claim 7, wherein each of said damping impedances comprises a value of approximately 65 ohms.

9. The apparatus of claim 6, wherein said damping impedances further comprises a capacitive devices in coupled in parallel with said passive resistors to compensate for shunt capacitance of an output load.

10. A boosting circuit for boosting a signal for drive circuits used with a computer backplane, said boosting circuit comprising; a positive comparator device having an input coupled to a driver output signal; a negative comparator device having an input coupled to said driver output signal; a first latch device having a first input coupled to an output of said positive comparator; a second latch device having a first input coupled to an output of said negative comparator and a second input coupled to an output of said first latch device, and having an output coupled to a second input of said first latch device; and a means for driving said signal positive or negative to boost said signal during transition from a first logic state to a second logic state.

1 1. The boosting circuit of claim 10, wherein said means for driving comprises: a first NAND gate having a first input coupled to said output of said positive comparator and a second input coupled to said output of said negative comparator; and a tri-state device having a first input coupled to said output of said second latch device and an enabling input coupled to an output of said first NAND gate, and having an output coupled to said output driver signal to provide a supplemental current to said signal during boosting of said signal.

12. The boosting circuit of claim 10, wherein said means for driving comprises: a first NAND gate having a first input coupled to said output of said negative comparator and a second input coupled to said output of said second latch device; a second NAND gate having a first input coupled to said output of said positive comparator and a second input coupled to said output of said first latch device; a negative driver coupled between said output of said second NAND gate and said driver output signal; and a positive driver coupled between said output of said first NAND gate and said driver output signal, such that said negative and said positive driver provide a supplemental current to said signal during boosting of said signal.