WO2000046948A1 - Prime-arq flow control including cell discard - Google Patents
Prime-arq flow control including cell discard Download PDFInfo
- Publication number
- WO2000046948A1 WO2000046948A1 PCT/SE2000/000143 SE0000143W WO0046948A1 WO 2000046948 A1 WO2000046948 A1 WO 2000046948A1 SE 0000143 W SE0000143 W SE 0000143W WO 0046948 A1 WO0046948 A1 WO 0046948A1
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- sequence number
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1829—Arrangements specially adapted for the receiver end
- H04L1/1835—Buffer management
- H04L1/1841—Resequencing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1809—Selective-repeat protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1829—Arrangements specially adapted for the receiver end
- H04L1/1835—Buffer management
- H04L1/1838—Buffer management for semi-reliable protocols, e.g. for less sensitive applications such as streaming video
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/1874—Buffer management
- H04L1/1877—Buffer management for semi-reliable protocols, e.g. for less sensitive applications like streaming video
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/188—Time-out mechanisms
Definitions
- the present invention relates generally to information transfer in mobile wireless environments, and in particular to management of unacknowledged data frames in PRIME-ARQ.
- FIG. 1 shows the principle of the PRIME-ARQ, where the managed sequence number N MSN is 3, for example, and where T represents a transmitter which is sending cells and R represents a receiver that is receiving the cells sent from the transmitter T. Flow control at the receiver R is shown in FIG. 2.
- the receiver has a list of sequence numbers of the cells that the receiver expects to receive.
- FIG. 1 shows an example application of the PRIME-ARQ technique with a managed sequence number N MSN of 3. As shown in FIG.
- the receiver R compares the sequence number attached to the received cell with the numbers in its list, as shown in FIG. 2.
- the receiver R receives the cell 105 from the transmitter T, bearing the designation I(N+2) representing a sequence number SN of 2, as can be seen in FIG. 1.
- the transmitter T sends an erroneous cell 107 bearing the designation I(N+3) representing a sequence number of 3
- the receiver R does not change its listing to indicate that it has successfully received a cell having the sequence number 3, but maintains the listing. In other words, the receiver R fails to accept the erroneous cell 107.
- the receiver R successfully receives the next cell 109, bearing the designation I(N+4) representing a sequence number SN of 4.
- the receiver R updates its list accordingly.
- the transmitter T receives the ARQ control message from the receiver R indicating that the next cell sequence numbers the receiver R expects to receive are 3, 5 and 6.
- the transmitter T then sends the cells 115, 117 and 119, bearing the designations and corresponding sequence numbers that the receiver R expects.
- the receiver R can perform the step 210 of receiving a cell from the transmitter T.
- the receiver R reads a sequence number from the received cell, and then in steps 214, 218 and 222 proceeds to determine whether the sequence number of the received cell matches any of the sequence numbers the receiver R is expecting to receive. If the sequence number of the received cell does match an expected sequence number on the receiver's list, then that expected sequence number and subsequent expected sequence numbers in the list are updated so that the list reflects the next N MSN sequence numbers that the receiver R expects to receive.
- the receiver R can also discard a cell when the cell bears a sequence number that does not match any of the expected sequence numbers in the receiver's list. Allowing the receiver R to discard cells having sequence numbers that do not match any of the expected sequence numbers is a normal part of the PRIME-ARQ algorithm.
- PRIME-ARQ does not allow the transmitter T to discard packets, which can lead to an accumulation of obsolete packets in the ARQ buffers over time, and cause system deadlock.
- PRIME-ARQ if one or more cells are discarded at the transmitter, the PRIME-ARQ algorithm will go into deadlock.
- an algorithm complementary to the PRIME-ARQ technique that allows obsolete or otherwise superfluous packets to be safely discarded at the transmitter when using the PRIME-ARQ technique.
- clogging of ARQ buffers and potential system deadlock can be avoided, and data transfer in mobile wireless environments using PRIME-ARQ can be made more efficient.
- FIG. 1 shows PRIME-ARQ with a managed sequence number N MSN of 3.
- FIG. 2 shows a control flow of PRIME-ARQ on the receiver side.
- FIG. 3. shows principles of segmentation.
- FIG. 4 shows an example ARQ buffer.
- FIG. 5 shows an example IP segment discard.
- FIG. 6 shows control flow including cell discard on the receiver side in accordance with a first embodiment of the invention, where N MSN is 2.
- FIG. 7 shows a control flow including cell discard on the receiver side in accordance with a second embodiment of the invention, where N MSN is 3.
- FIG. 8 shows a control flow including cell discard on the receiver side in accordance with a third embodiment of the invention, where N MSN is 4.
- FIG. 9 shows a control flow including cell discard on the receiver side in accordance with a fourth embodiment of the invention, where N MSN is 5.
- FIG. 10 shows a control flow including cell discard on the receiver side in accordance with a fifth embodiment of the invention, where N MSN is 6.
- FIGS. 11A and 11B show a general control flow including cell discard on the receiver side in accordance with embodiments of the invention.
- the segmentation operation is the same as that described in AAL 5 Segmentation. Signaling that discarding has been done is described in copending U.S. Application Serial Number 09/179,952, entitled Method and Apparatus for Discarding Packets In a Data Network Having Automatic Repeat Request, which is hereby incorporated by reference.
- 09/179,952 application a bit on the first PDU of the next undiscarded packet is used to signal discarding.
- a bit on the last PDU of the packet being discarded can be used to signal discarding.
- the convergence layer the information will be segmented.
- the information being transferred in the mobile wireless environment includes Internet Protocol (IP) packets such as the IP packet 302 shown in FIG. 3, the IP packets will be segmented in N byte segments 304, 306, 308 and 310.
- Each of the segments includes a field, called a segmentation and reassembly (SAR) field, which identifies whether the segment is at the beginning, middle or central portion, or end of the IP packet.
- SAR segmentation and reassembly
- a binary value of 10 in the SAR field indicates that the segment 304 is at the beginning of the IP packet 302
- a binary value of 00 in the SAR fields of the segments 306 and 308 indicates that the segments 306 and 308 are between the beginning and ending segments of the IP packet 302.
- a binary value of 01 in the SAR field of the segment 310 indicates that the segment 310 is at the end of the IP packet 302. Where an IP packet contains only one segment, for example the segment 312, the SAR field will have the binary value 11 to indicate that the segment 312 is the only segment in the IP packet.
- the IP segments also contain an ARQ sequence number.
- FIG. 4 shows, for example, an ARQ buffer 402 in a transmitter that contains IP segments 404-420, each having an SAR field value and an ARQ sequence number. As can be seen by the sequence of the ARQ sequence numbers of the IP segments 404-420 stored in the ARQ buffer 402, the IP segments 404-420 are stored chronologically in the ARQ buffer 402.
- the IP segments also can have an enforcement bit, which is useful to signal that discarding has been performed.
- FIG. 5 shows a sequence 502 of IP segments 504-520, which correspond to the IP segments 404-420 but which also have an enforcement bit field within each IP segment.
- IP segments should be discarded from the ARQ buffer 502 in the transmitter.
- an IP segment with an SAR equal to the binary value 10 or 00 is discarded, as for example cell 520 which belongs to the IP packet 522
- all IP segments with an SAR equal to 00 and belonging to the same IP packet 522 will also be discarded from the ARQ buffer in the transmitter, as shown for example in FIG. 5.
- the enforcement bit field is set equal to 1 after the cells 512-520 are discarded.
- the IP segment 510 is retained in the buffer.
- the solitary IP segment in the IP packet would have its enforcement bit field set equal to 1, but the solitary IP segment would not be discarded from the buffer.
- the IP segments are appropriately discarded before the TCP protocol at the end point discards IP segments. These discard mechanisms conserve bandwidth.
- the receiver R when the receiver R receives IP packets and IP segments from the transmitter T, it checks the sequence number and the enforcement bit field for each received cell or IP segment. Based on the sequence numbers and the enforcement bit fields, the list of expected sequence numbers (whose length equals the value of the managed sequence number N MSN ) is updated in accordance with the flow control algorithms shown in FIGS. 6-10.
- FIG. 6 shows a flow control algorithm where the managed sequence number N MSN is 2.
- a cell or IP segment is received by the receiver R from the transmitter T, and then in step 604 the sequence number of the received cell is read by the receiver R. After step 604, control proceeds via step 606 where the value of the enforcement bit is evaluated.
- step 608 If the enforcement bit is 1, indicating that IP segments prior to the current cell have been discarded, then control proceeds to step 608. If the enforcement bit is 0, then control proceeds to step 614. At step 608, the sequence number of the received cell is tested to determine whether it is greater than or equal to the value of the first expected sequence number, SN #1 , in the receiver's listing. If yes, then control proceeds to step 610 where SN #1 is set equal to SN ⁇ , and SN ⁇ is incremented. From step 610, control proceeds to step 632, where the process ends.
- step 608 If at step 608 the sequence number of the received cell is not greater than or equal to the value of the first expected sequence number, SN #1 , then control proceeds to step 618 where the sequence number is tested to determine whether it is equal to the value of the second expected sequence number SN #2 . If yes, then control proceeds to step 620, where SN #1 is set equal to SN #2 + 1, and SN ⁇ is incremented by 2. from step 620 control proceeds to step 632, where the process ends.
- step 618 If at step 618 the sequence number is determined not to equal the value of the second expected sequence number SN ⁇ , then control proceeds to step 626 where the sequence number is tested to determine whether it is greater than the value of the second expected sequence number SN n . If yes, then control proceeds to step 628, where SN #! is set equal to one more than than the sequence number of the received IP segment, i.e. , SN + 1 , and SN ⁇ is set equal to two more than than the sequence number of the received IP segment, i.e. , SN + 2. From step 628, control proceeds to step 632, where the process ends.
- step 626 If at step 626 the sequence number is determined to be not greater than the value of the second expected sequence number SN #2 , then the received cell or IP segment is discarded.
- step 606 If at step 606 the enforcement bit was determined to be equal to 0, then control proceeds from step 606 to step 614 where the sequence number is tested to determine whether it is equal to the value of the first expected sequence number SN #1 . If yes, then control proceeds to step 616, where SN #1 is set equal to SN ⁇ . From step 616, control proceeds to step 624, where SN ffi is incremented, and from step 624 control proceeds to step 632 where the process ends.
- step 614 If at step 614 the sequence number was not equal to the value of the first expected sequence number SN #1 , then control proceeds from step 614 to step 622, where the sequence number SN is tested to deteraiine whether it is equal to the value of the second expected sequence number SN ⁇ . If yes, then control proceeds to step 624, and then from step 624 to step 632. If no, then control proceeds to step 630 where the cell or IP segment is discarded.
- the receiver updates its listing of expected sequence numbers to contain consecutive sequence numbers immediately following the sequence number of the received cell. However, if the sequence number of the received cell or IP segment is less than all of the expected sequence numbers in the receiver's listing, then the received cell or IP segment is discarded. In the situation where the enforcement bit is 0, if the sequence number of the received cell or IP segment is equal to one of the expected sequence numbers in the receiver's listing, then the expected sequence number that matched the sequence number of the received cell, and all subsequent expected sequence numbers in the receiver's listing, are updated to contain consecutive sequence numbers immediately following the sequence number of the received cell.
- the listing is updated all of the expected sequence numbers will be consecutive; but if a second or subsequent (in a situation, for example, where N MSN is greater than 2) expected sequence number matches the sequence number of the received cell, then after the listing is updated not all of the expected sequence numbers will be consecutive.
- FIGS. 7, 8, 9 and 10 show control algorithms where the managed sequence number N MSN is 3, 4, 5 and 6 respectively.
- the control algorithms shown in FIGS. 7, 8, 9 and 10 are in principle fundamentally the same as that shown in FIG. 6, with different managed sequence numbers N MSN .
- FIGS. 11A and 11B illustrate the general principles embodied in FIGS. 6- 10 as follows.
- control proceeds to step 1104, where the sequence number and enforcement bit field of the received cell are read.
- step 1108 the nature of the enforcement bit is determined. If the value of the enforcement bit is 1, indicating that all cells prior to the received cell have been discarded, then control proceeds to step 1112 where a counter variable X is initialized to a value of 0, and then incremented in step 1114. From step 1114 control proceeds to step 1116, where the value of X is compared with N MSN .
- step 1117 the sequence number SN of the received cell is compared with expected sequence numbers corresponding to the values of X and X + 1. For example, where the value of X is 1, SN is compared with the values of SN #1 and SN #2 in the receiver's list. If in step 1117 the value of SN is not between SN # ⁇ inclusive and
- step 1117 the value of SN is between SN ⁇ inclusive and SN ⁇
- control proceeds to step 1132, where a sequence of operations 1132-1142 takes place to update all values in the receiver's expected sequence number list.
- the list is updated so that it begins with the sequence number immediately after the received cell's sequence number NS, i.e. , beginning with NS + 1, and continues with sequence numbers subsequent to NS + 1 that were in the list prior to the update, up through the highest expected sequence number that was in the list prior to the update.
- the remainder of the list contains consecutive sequence numbers increasing sequentially from the formerly highest sequence number (the highest expected sequence number that was in the list prior to the update).
- step 1108 If in step 1108 the enforcement bit was determined to be 0, then control proceeds from step 1108 to step 1144 as shown in FIG. 11B. As shown in FIG. 11B.
- the counter variable X is initialized in step 1144 and then incremented in step 1146.
- the counter variable X is used to compare all of the expected sequence numbers in the receiver's list with the sequence number SN of the received cell, as in step 1148. If SN does not equal any of the expected sequence numbers as evidenced by control proceeding from step 1150 to step 1160, then at step 1160 the cell is discarded. If, on the other hand, SN is determined at step 1148 to equal one of the expected sequence numbers, then control proceeds from step 1148 to step 1152 and a sequence of operations 1152-1158 are performed to update the receiver's list of expected sequence numbers.
- the list is updated so that the expected sequence number that equals the sequence number SN of the received cell, and each subsequent expected sequence number in the receiver's list, takes on the value of the expected sequence number subsequent to it.
- FIG. 12 is a block diagram of a system 1200 in accordance with an embodiment of the invention, that is consistent with the methods described above with reference to, for example, FIG. 11A and 11B.
- the system 1200 includes a transmitter 1202 that sends information to a receiver 1204 via a wireless link 1208 in accordance with the methods described above with reference to, for example, FIGS. 11A and 11B.
- the system 1200 also includes a list 1206 of sequence numbers expected by the receiver 1204, which as shown in FIG. 12 can be implemented within the receiver 1204.
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- Computer Networks & Wireless Communication (AREA)
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU28370/00A AU2837000A (en) | 1999-02-08 | 2000-01-25 | Prime-arq flow control including cell discard |
JP2000597916A JP2002536910A (en) | 1999-02-08 | 2000-01-25 | PRIME-ARQ flow control including cell discard |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US24586699A | 1999-02-08 | 1999-02-08 | |
US09/245,866 | 1999-02-08 |
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WO2000046948A1 true WO2000046948A1 (en) | 2000-08-10 |
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PCT/SE2000/000143 WO2000046948A1 (en) | 1999-02-08 | 2000-01-25 | Prime-arq flow control including cell discard |
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JP (1) | JP2002536910A (en) |
AU (1) | AU2837000A (en) |
WO (1) | WO2000046948A1 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996033586A1 (en) * | 1995-04-17 | 1996-10-24 | Telefonaktiebolaget Lm Ericsson (Publ) | Temporary frame identification for arq in a reservation-slotted-aloha type of protocol |
US5684791A (en) * | 1995-11-07 | 1997-11-04 | Nec Usa, Inc. | Data link control protocols for wireless ATM access channels |
-
2000
- 2000-01-25 AU AU28370/00A patent/AU2837000A/en not_active Abandoned
- 2000-01-25 WO PCT/SE2000/000143 patent/WO2000046948A1/en active Application Filing
- 2000-01-25 JP JP2000597916A patent/JP2002536910A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1996033586A1 (en) * | 1995-04-17 | 1996-10-24 | Telefonaktiebolaget Lm Ericsson (Publ) | Temporary frame identification for arq in a reservation-slotted-aloha type of protocol |
US5684791A (en) * | 1995-11-07 | 1997-11-04 | Nec Usa, Inc. | Data link control protocols for wireless ATM access channels |
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AU2837000A (en) | 2000-08-25 |
JP2002536910A (en) | 2002-10-29 |
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