WO2000031809A1

WO2000031809A1 - Magnetoresistive element and utilisation thereof as a storage element in a storage cell array

Info

Publication number: WO2000031809A1
Application number: PCT/DE1999/003696
Authority: WO
Inventors: Siegfried Schwarzl
Original assignee: Infineon Technologies Ag
Priority date: 1998-11-19
Filing date: 1999-11-19
Publication date: 2000-06-02
Also published as: TW446941B

Abstract

According to the invention, a magnetoresistive element has a first ferromagnetic layer element (1), a non-magnetic layer element (2) and a second ferromagnetic layer element (3) and is connected between a first connection (5) and a second connection (7). A barrier layer (4, 6) is provided between the first ferromagnetic layer element (1) and the first connection (5) as well as between the second ferromagnetic layer element (2) and the second connection (7). Said barrier layers (4, 6) prevent diffusion between the connections and the ferromagnetic layer elements (1, 3). The magnetoresistive element can be used as a storage element and as well as a sensor element.

Description

description

Magnetoresistive element and its use as a memory element in a memory cell arrangement.

Magnetoresistive elements, also called magnetoresistive elements, are increasingly used as sensor elements or as memory elements for memory cell arrangements, so-called MRAMs (see S. Mengel, Technology Analysis Magnetism Volume 2, XMR Technologies, publisher VDI Technology Center Physical Technologies, August 1997). In the technical field, a magnetoresistive element is understood to be a structure which has at least two ferromagnetic layers and a non-magnetic layer arranged between them. Depending on the structure of the layer structure, a distinction is made between GMR element, TMR element and CMR element.

The term GMR element is used in the technical field for layer structures which have at least two ferromagnetic layers and a non-magnetic, conductive layer arranged between them and which show the so-called GMR (giant magnetoresistance) effect. The GMR effect is understood to mean the fact that the electrical resistance of the GMR element is dependent on whether the magnetizations in the two ferromagnetic layers are aligned parallel or antiparallel. The GMR effect is large compared to the so-called AMR (anisotropic magnetoresistance) effect. The AMR effect is understood to mean the fact that the resistance in magnetized conductors is different in parallel and perpendicular to the direction of magnetization. The AMR effect is a volume effect that occurs in ferromagnetic single layers.

The term TMR element is used in the technical field for tunneling magnetoresistance layer structures which have at least two ferromagnetic layers and an insulating, non-magnetic layer arranged between them. The The insulating layer is so thin that there is a tunnel current between the two ferromagnetic layers. These layer structures also show a magnetoresistive effect, which is brought about by a spin-polarized tunnel current through the insulating, non-magnetic layer arranged between the two ferromagnetic layers. In this case too, the electrical resistance of the TMR element depends on whether the magnetizations in the two ferromagnetic layers are aligned parallel or anti-parallel. The relative change in resistance is about 6 percent to about 40 percent.

Another magnetoresistance effect, due to its size (relative change in resistance from 100 to 400 percent at room temperature) Collosal Magnetoresistance Effect (CMR-

Effect) is called, because of its high coercive forces requires a high magnetic field to switch between the magnetization states.

It has been proposed (see, for example, S. Tehrani et al, IEDM 96-193 and D. D. Tang et al, IEDM 95-997) to use GMR elements as memory elements in a memory cell array. The memory elements are connected in series via read lines. Word lines run at right angles to this and are insulated both from the read lines and from the memory elements. Due to the current flowing in the word line, signals applied to the word lines cause a magnetic field which, with sufficient strength, influences the memory elements located thereunder. X / Y lines which cross at the memory cell to be written are used for writing in information. They are subjected to signals that cause a magnetic field sufficient for the magnetic reversal at the crossing point. The direction of magnetization in one of the two ferromagnetic layers is switched.

The direction of magnetization in the other of the two ferromagnetic layers, however, remains unchanged. The party- The direction of magnetization in the last-mentioned ferromagnetic layer is maintained by an adjacent anti-ferromagnetic layer, which holds the direction of magnetization, or by the switching threshold for this ferromagnetic layer being changed by another material or dimensioning, for example layer thickness in comparison to the first called ferromagnetic layer is enlarged.

In US 5 541 868 annular storage elements have been proposed which are based on the GMR effect. A storage element comprises a stack which has at least two ring-shaped ferromagnetic layer elements and a non-magnetic conductive layer element which is arranged between them and which is connected between two lines. The ferromagnetic layer elements differ in their material composition. One of the ferromagnetic layer elements is magnetically hard, the other magnetically softer. To write the information, the magnetization direction in the magnetically softer layer element is switched over, while the magnetization direction is retained in the magnetically harder layer element.

With regard to the large-scale use of magnetoresistive elements, for example as an integrated magnetoresistive memory cell arrangement (so-called MRAM) or as an integrated sensor arrangement, the integration of magnetoresistive elements in a semiconductor process technology is required. In semiconductor process technology, temperatures up to at least about 450 ° C. occur in particular in the completion of the semiconductor arrangements in the so-called back-end process at the wafer level, also called BEOL (back end of line) (see, for example, D. Widmann et al, Integrated Technology Schaltungen, Springer Verlag 1996, p. 58), to which the magnetoresistive elements and the associated lines are also exposed. In this temperature range, due to the diffusion mobility of the elements contained in magnetoresistive layer systems, in particular Fe, Co, Ni, Cu etc., to expect a diffusion between the ferromagnetic layers and the lines, which changes the properties of the ferromagnetic layer elements so that the magnetoresistive elements are no longer functional.

Diffusion lengths of 600 nm to 27 μm are expected for one hour at a temperature load of 450 ° C for the diffusion of Co, Fe and Ni into connections or conductor tracks that contain AI. For the diffusion of Co, Fe and Ni in connections or conductor tracks containing Cu, diffusion lengths of 10 to 50 nm are expected for one hour at a temperature load of 450 °. For the diffusion of Cu in Co, Fe or Ni, a thermal load of one hour at 450 ° diffusion lengths of about 1 nm is expected. The diffusion lengths can be increased and accelerated by grain boundaries, phase boundaries and crystal defects (vacancies and dislocations), by electrical fields and mechanical stress.

Due to the feared diffusion, there is a change in the material composition in the interface zones, which impairs the spin-dependent electron transport on which the magnetoresistance effects in these elements are based. It must therefore be expected that even slight diffusion-induced material migration with a range in the range of 1 to 5 nm across these interfaces leads to considerable changes in the magnetic and electrical properties. Diffusion lengths of just a few nanometers can cause completely changed interface properties, which lead to property drifts or even total failure of the magnetoresistive elements (see I. Kaur, W. Gust, ^λ Fundamentals of Grain an Interphase Boundary Diffusion ', Ziegler Press, Stuttgart (1989), Pages 16 to 26, 287, 316 to 318 and I. Kaur, W. Gust, L. Kozma, Handbook of Grain and Interphase Boundary Data, Volume 1 and 2, Ziegler Press, Stuttgart (1989), Pages 8 to 13,220 to 224 , 403, 515, 528, 530, 776, 952 to 953, 966 to 998). The problem of integrating magnetoresistive elements in a semiconductor process technology and the difficulties that may arise have not yet been dealt with in the literature.

The invention is based on the problem of specifying a magnetoresistive element which can be produced in the context of a semiconductor process technology.

According to the invention, this problem is solved by a magnetoresistive element according to claim 1. Further developments of the invention emerge from the remaining claims.

The magnetoresistive element has a first ferromagnetic layer element, a non-magnetic layer element and a second ferromagnetic layer element, the non-magnetic layer element being arranged between the first ferromagnetic layer element and the second ferromagnetic layer element. The first ferromagnetic layer element is electrically connected to a first connection and the second ferromagnetic layer element is electrically connected to a second connection. A first barrier layer is arranged between the first ferromagnetic layer element and the first connection, and a second barrier layer is arranged between the second ferromagnetic layer element and the second connection. The first barrier layer suppresses diffusion between the first connection and the first ferromagnetic layer element, the second barrier layer suppresses diffusion between the second connection and the second ferromagnetic layer element.

The provision of the first barrier layer and the second barrier layer ensures that the magnetoresistive element, even if it is produced as part of a semiconductor process technology, is functional and that, in particular, changes in the electrical and magnetic properties Shafts due to diffusion-induced material migration at the interfaces of the first ferromagnetic layer element and the second ferromagnetic layer element can be avoided.

The first connection and the second connection are suitable for contacting the first ferromagnetic layer element and the second ferromagnetic layer element, respectively. In particular, the first connection and the second connection are designed as contacts, lines or the like.

In order to enable the manufacture of the magnetoresistive element in conventional silicon process techniques, the first barrier layer and the second barrier layer are preferably formed from a material which acts as a diffusion barrier at least in the temperature range between 20 ° C. and 450 ° C.

For integration in the context of a planar silicon process technology, it is advantageous to provide the magnetoresistive element as a stack of flat layer elements. In this case, the first ferromagnetic layer element, the non-magnetic layer element and the second ferromagnetic layer element are designed as flat layer elements which are arranged one above the other as a stack. It is within the scope of the invention that the dimensions of the first ferromagnetic layer element and the second ferromagnetic layer element are between 50 nm x 80 nm and 250 nm x 400 nm and the thickness of the first ferromagnetic layer element and the second ferromagnetic layer element is between 2 nm and 20 nm. The thickness of the non-magnetic layer element is between 1 and 4 n. The cross section of the first ferromagnetic layer element and the second ferromagnetic layer element is preferably essentially rectangular. It can also be round, oval, polygonal or ring-shaped. The ferromagnetic layer elements preferably each contain at least one of the elements Fe, Ni, Co, Cr, Mn, Gd, or Dy. The non-magnetic layer element can be both conductive and non-conductive. If the non-magnetic layer element is made of a conductive material, for example Cu, Au or Al, it preferably has a dimension perpendicular to the interface with the ferromagnetic layer elements of 2 nm to 4 nm. In this case, the magnetoresistive element is a GMR element.

If the non-magnetic layer element is made of a non-conductive material, for example Al 2 O 3, NiO, HfO 2, iO 2, NbO and / or SiO 2, then it preferably has a thickness of between 1 and 4 nm. In this case, the magnetoresistive element is a TMR element which, compared to a GMR element, has a high electrical resistance perpendicular to the tunnel layer.

The first barrier layer and the second barrier layer preferably contain Ta, W, Mo, Nb, TaN, WN, MoN, NbN, Ti, TiN, TiW, Cr, WSiN and / or Pd2Si. In this case, the barrier layers are effective for ferromagnetic layer elements which contain Fe, Ni, Co, Cr, Mn, Gd and / or Dy and connections which are made of Al, Al / Cu, Cu, Al / Si or Cu with alloy additives consist of Ti, Hf, Zr, Mg and / or Al.

By introducing the first barrier layer and the second barrier layer, which act as a diffusion barrier between the first and second connection and the first and second ferromagnetic layer element, respectively, a diffusion of Co, Fe and Ni into the first connection and the second connection is thereby prevents the diffusion lengths of the barrier layer from being less than 1 nm at 450 ° C. when subjected to temperature loads of one hour. The thickness of the barrier layers is preferably 10 to 100 nm, so that this diffusion is effectively suppressed. The magnetoresistive element can, among other things, advantageously be used as a memory element in a memory cell arrangement. In this case, the first connection and the second connection are connected to lines or part of lines via which the magnetoresistive element is driven. In addition, the magnetoresistive element can be used as a sensor element.

The invention is explained in more detail below on the basis of exemplary embodiments which are illustrated in the figures.

FIG. 1 shows a magnetoresistive element which is connected between a first connection and a second connection.

FIG. 2 shows a section of a memory cell arrangement which has magnetoresistive elements as memory elements.

A first ferromagnetic layer element 1, a non-magnetic layer element 2 and a second ferromagnetic layer element 3 are arranged one above the other as a stack (see FIG. 1). They have an essentially rectangular cross section with dimensions of 130 nm x 250 nm. In

In the direction of the layer sequence, the first ferromagnetic layer element 1 and the second ferromagnetic layer element 2 have a thickness of 10 nm. The non-magnetic layer element 2 has a thickness of 2 nm. The first ferromagnetic layer element 1 contains Co. The non-magnetic layer element contains Al2O ₃ . The second ferromagnetic layer element 3 contains NiFe.

The first ferromagnetic layer element 1 is electrically connected to a first terminal 5 via a first barrier layer 4. The first barrier layer 4 likewise has a rectangular cross section corresponding to the dimensions of the most ferromagnetic layer element 1. The thickness of the first barrier layer 4 is 10 to 100 nm. The first barrier layer 4 consists of Ta, W, Mo, Nb, TaN, WN, MoN, NbN, Ti, TiN, TiW, Cr, WSiN and / or Pd2Si. The first connection 5 consists of AlSi, AlCu, Cu or Cu with alloy additions of Ti, Hf, Zr, Mg and / or Al.

The second ferromagnetic layer element 3 is connected to a second connection 7 via a second barrier layer 6. The second barrier layer 6 likewise has an essentially rectangular cross section with dimensions corresponding to the second ferromagnetic layer element 3 and a thickness of 10 to 100 nm. The second barrier layer 6 contains Ta, W, Mo, Nb, TaN, WN, MoN, NbN, Ti, TiN, TiW, Cr, WSiN and / or Pd2Si. The second connection 7 contains AlSi,

AlCu, Cu or Cu with alloy additives made of Ti, Hf, Zr, Mg or AI.

The first connection 5 and the second connection 7 can each be part of lines via which the magnetoresistive element 1, 2, 3 can be controlled.

In order to build up a memory cell arrangement which has magnetoresistive elements as memory cells S, which are designed as described with reference to FIG. 1, the memory elements S are arranged in a grid. Each storage element S is connected between a first line L1 and a second line L2. The first connection of each of the memory elements S is connected to the first line L 1 or is part of the first line L 1 and the second connection is connected to the second line L 2 or is part of the second line L 2. The first lines L1 run parallel to one another and cross the second lines L2, which also run parallel to one another (see FIG. 2). In order to write a memory element S, such a current flows via an associated line L1 and an associated second line L2 that the first at the crossing point Line L1 and the second line L2, on which the storage element is arranged, a sufficient magnetic field is created to switch the direction of magnetization of one of the ferromagnetic layer elements. The magnetic field effective at the respective crossing point is a superposition of the magnetic field induced by the current flow in the first line L1 and the magnetic field induced by the current flow in the second line L2.

In the memory cell arrangement, the resistance value of the magnetoresistive elements, which corresponds to the parallel orientation of the magnetization direction in the first ferromagnetic layer element to that in the second ferromagnetic layer element, becomes a first logical value, the resistance value, which corresponds to the antiparallel orientation of the magnetization direction in the first ferromagnetic layer element Layer element corresponds to that of the second ferromagnetic layer element, assigned a second logical value.

Claims

claims

1. magnetoresistive element,

- In which a first ferromagnetic layer element (1), a non-magnetic layer element (2) and a second ferromagnetic layer element (3) are provided, the non-magnetic layer element (2) between the first ferromagnetic layer element (1) and the second ferromagnetic layer element (3) is arranged

- in which the first ferromagnetic layer element (1) is connected to a first connection (5) and the second ferromagnetic layer element (3) is connected to a second connection (7),

- In which a first barrier layer (4) and between the second ferromagnetic layer element (3) and the second connection (7) a second barrier layer (6) is arranged between the first ferromagnetic layer element (1) and the first connection (5), wherein the first barrier layer (4) suppresses diffusion between the first connection (5) and the first ferromagnetic layer element (1) and the second barrier layer (6) prevents diffusion between the second connection (7) and the second ferromagnetic layer element (3).

2. Magnetoresistive element according to claim 1, in which the first barrier layer (4) and the second barrier layer (6) act as a diffusion barrier at least in the temperature range between 20 ° C and 450 ° C.

3. Magnetoresistive element according to claim 1 or 2, wherein the first ferromagnetic layer element (1), the non-magnetic layer element (2) and the second ferromagnetic layer element (3) are designed as flat layer elements and are arranged as a stack one above the other.

4. Magnetoresistive element according to one of claims 1 to 3,

in which the first connection (5) and / or the second connection (7) contains Al, Cu and / or Si with or without alloy additions of Ti, Hf, Zr, Mg, Al,

- in which the first barrier layer (4) and / or the second barrier layer (6) Ta, W, Mo, Nb, TaN, WN, MoN, NbN, Ti,

TiN, TiW, Cr, WSiN and / or Pd2Si included.

5. Magnetoresistive element according to claim 4, wherein the first barrier layer (4) and the second barrier layer (6) each have a thickness between 10 and 100 nm.

6. Magnetoresistive element according to one of claims 1 to 5,

in which the first ferromagnetic layer element and the second ferromagnetic layer element (3) contain Fe, Ni, Co, Cr, Mn, Gd and / or Dy,

- In which the non-magnetic element (2) contains Al2O3, NiO, HfC> 2, TiO2, NbO, SiO2, Cu, Au and / or Al.

7. Use of a magnetoresistive element according to one of claims 1 to 6 as a memory element in a memory array.