WO2000026746A2 - Data carrier with obscured power consumption - Google Patents

Data carrier with obscured power consumption Download PDF

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Publication number
WO2000026746A2
WO2000026746A2 PCT/EP1999/008331 EP9908331W WO0026746A2 WO 2000026746 A2 WO2000026746 A2 WO 2000026746A2 EP 9908331 W EP9908331 W EP 9908331W WO 0026746 A2 WO0026746 A2 WO 0026746A2
Authority
WO
WIPO (PCT)
Prior art keywords
processing device
data processing
power consumption
data carrier
complementary
Prior art date
Application number
PCT/EP1999/008331
Other languages
French (fr)
Other versions
WO2000026746A3 (en
Inventor
Peter THÜRINGER
Klaus Ully
Siegfried Arnold
Wolfgang Eber
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Priority to US09/582,802 priority Critical patent/US6498404B1/en
Priority to DE69929471T priority patent/DE69929471T2/en
Priority to JP2000580063A priority patent/JP2003526134A/en
Priority to EP99968334A priority patent/EP1057096B1/en
Priority to KR1020007007389A priority patent/KR100701713B1/en
Publication of WO2000026746A2 publication Critical patent/WO2000026746A2/en
Publication of WO2000026746A3 publication Critical patent/WO2000026746A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/08—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code using markings of different kinds or more than one marking of the same kind in the same record carrier, e.g. one marking being sensed by optical and the other by magnetic means
    • G06K19/10—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code using markings of different kinds or more than one marking of the same kind in the same record carrier, e.g. one marking being sensed by optical and the other by magnetic means at least one kind of marking being used for authentication, e.g. of credit or identity cards
    • G06K19/18—Constructional details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07363—Means for preventing undesired reading or writing from or onto record carriers by preventing analysis of the circuit, e.g. dynamic or static power analysis or current analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks

Definitions

  • the invention relates to a data carrier with a data processing device as well as to an electronic component with a data processing device, for example for such a data carrier.
  • security-relevant data could be determined by monitoring the power consumption of such data carriers. It is true that during all logic operations, so also during sensible operations or sub-operations (for example cryptographic calculations) current power is consumed by switching operations in the logic circuitry in dependence on the result or logic level. Measurement of the power consumed by the circuit, therefore, could be used for an attack so as to find out secret data (key) by means of mathematical methods (correlations, power analysis).
  • a load circuit is connected to the power supply of the data carrier and is intended to influence the power consumption of the data carrier at least during security-relevant operations of the data processing device.
  • the power consumption that can be measured externally thus no longer corresponds to the power consumption of the data processing device alone, but also contains a further component which preferably is not directly related to the internal operations of the data processing device.
  • the load circuit is constructed as a variable ballast resistor which in the simplest case may consist of a transistor or a network of series and parallel-connected transistors, connected to the same power supply lead in parallel with the data processing device.
  • Different load states can be adjusted by appropriate control of the load resistor or load resistors.
  • a more complex embodiment is provided with a circuit arrangement which is constructed so as to be complementary to at least parts of the data processing device and can be controlled in parallel with the data processing device. Changes in the switching state, initiated during security-relevant operations, are thus carried out in a complementary fashion at the same time. Even if the power consumption should be different for different logic levels, in the ideal case the power consumption is constant because of the complementary switching states. However, because it cannot be detected from the outside what power consumption relates to the logic states actually involved in the security-relevant operations and what power consumption is involved in the complementary switching states which occur in parallel merely for the purpose of masking, it is not even necessary to pursue a constant power consumption. Therefore, it is not even necessary to construct all switching circuit components required for the security-relevant operations in a complementary fashion, but it suffices to make only a part of the circuit components complementary.
  • the load circuit and the data processing device are integrated in a common circuit because the separation of the load circuit from the data processing data for the purpose of attempted discovery requires far more technical means than when these circuit components are arranged on the data carrier in a physically separated manner.
  • the analysis of circuit elements actually involved in security-relevant operations is rendered more complicated notably when the circuit elements required are physically mixed with complementary circuit elements in one chip. The invention will be described in detail hereinafter.
  • the invention is used, for example in so-called chip cards 1 or integrated circuits 3 (chip card chips) for such chip cards.
  • chip cards 1 or integrated circuits 3 chip card chips
  • Different constructions for example SIM card, secure access model for a terminal, contactless or dual interface transponders
  • the power supply being possible via contacts 2, in a contactless manner, for example by induction of alternating current, or also by means of internal power supply sources such as rechargeable batteries. Therefore, the invention is suitable for any type of power supply. If the invention is incorporated in the relevant chip, usable information cannot be extracted either by a deliberate attempt aimed at the power supply provided within a chip card.
  • Fig. 1 shows such a chip card 1 with an embedded chip 3 which is connected to a contact field 2 by internal wires 4.
  • Fig. 2 shows a first AND-gate 5.
  • the inputs of this AND-gate 5 are connected, via logic inverters 6, 7, to a second AND-gate 8 which forms the complementary gate and acts as a supplementary load.
  • delay elements are inserted in the input lines of the first AND-gate 5 in order to compensate the signal delay of the inverters 6, 7.
  • the number of low-high transitions and the number of high-low transitions are exactly equal and the number of nodes which are high at a given instant corresponds exactly to the number of nodes which are low.
  • the surface area required by the complementary logic corresponds exactly to the surface area required by the copied logic.
  • Fig. 3 shows a complementary machine 10 which is connected, via wires 10, to nodes of security-related circuit elements of parts 9 of the chip performing the calculation of the cryptogram.
  • the complementary machine 10 calculates an appropriate load and switches, via switching transistors 12, the calculated number of load resistors 13.
  • This step is aimed at the generating of a power consumption which is independent of the data or the key but not necessarily constant, in order to achieve resistance against attacks which utilize the power consumption as a starting point (simple or differential power analysis). In any case the object is not to achieve a constant power consumption of the circuit by complex control concepts.
  • This concept can be realized independently of the construction of the logic (synchronous or asynchronous circuit technique).

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Storage Device Security (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Cash Registers Or Receiving Machines (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Beverage Vending Machines With Cups, And Gas Or Electricity Vending Machines (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

In order to prevent the retrieval of data via the measurement of the power consumption in a data carrier provided with a data processing device, it is proposed to connect a load circuit to the power supply of the data carrier so as to influence the power consumption of the data carrier at least during security-relevant operations of the data processing device.

Description

Data carrier with obscured power consumption.
The invention relates to a data carrier with a data processing device as well as to an electronic component with a data processing device, for example for such a data carrier.
Recently doubts have been raised as regards the security of data carriers, it being stipulated that security-relevant data could be determined by monitoring the power consumption of such data carriers. It is true that during all logic operations, so also during sensible operations or sub-operations (for example cryptographic calculations) current power is consumed by switching operations in the logic circuitry in dependence on the result or logic level. Measurement of the power consumed by the circuit, therefore, could be used for an attack so as to find out secret data (key) by means of mathematical methods (correlations, power analysis).
It is an object of the invention to prevent such attempts from being successful. This object is achieved in that a load circuit is connected to the power supply of the data carrier and is intended to influence the power consumption of the data carrier at least during security-relevant operations of the data processing device. The power consumption that can be measured externally thus no longer corresponds to the power consumption of the data processing device alone, but also contains a further component which preferably is not directly related to the internal operations of the data processing device.
A particularly simple embodiment is obtained when the load circuit is constructed as a variable ballast resistor which in the simplest case may consist of a transistor or a network of series and parallel-connected transistors, connected to the same power supply lead in parallel with the data processing device. Different load states can be adjusted by appropriate control of the load resistor or load resistors.
A more complex embodiment is provided with a circuit arrangement which is constructed so as to be complementary to at least parts of the data processing device and can be controlled in parallel with the data processing device. Changes in the switching state, initiated during security-relevant operations, are thus carried out in a complementary fashion at the same time. Even if the power consumption should be different for different logic levels, in the ideal case the power consumption is constant because of the complementary switching states. However, because it cannot be detected from the outside what power consumption relates to the logic states actually involved in the security-relevant operations and what power consumption is involved in the complementary switching states which occur in parallel merely for the purpose of masking, it is not even necessary to pursue a constant power consumption. Therefore, it is not even necessary to construct all switching circuit components required for the security-relevant operations in a complementary fashion, but it suffices to make only a part of the circuit components complementary.
Preferably, the load circuit and the data processing device are integrated in a common circuit because the separation of the load circuit from the data processing data for the purpose of attempted discovery requires far more technical means than when these circuit components are arranged on the data carrier in a physically separated manner. The analysis of circuit elements actually involved in security-relevant operations is rendered more complicated notably when the circuit elements required are physically mixed with complementary circuit elements in one chip. The invention will be described in detail hereinafter.
The invention is used, for example in so-called chip cards 1 or integrated circuits 3 (chip card chips) for such chip cards. Different constructions (for example SIM card, secure access model for a terminal, contactless or dual interface transponders) are feasible, the power supply being possible via contacts 2, in a contactless manner, for example by induction of alternating current, or also by means of internal power supply sources such as rechargeable batteries. Therefore, the invention is suitable for any type of power supply. If the invention is incorporated in the relevant chip, usable information cannot be extracted either by a deliberate attempt aimed at the power supply provided within a chip card.
Fig. 1 shows such a chip card 1 with an embedded chip 3 which is connected to a contact field 2 by internal wires 4.
Generally speaking, it would also be possible to construct all logic elements of a chip as a complementary copy. As an example for all logical elements of a chip Fig. 2 shows a first AND-gate 5. The inputs of this AND-gate 5 are connected, via logic inverters 6, 7, to a second AND-gate 8 which forms the complementary gate and acts as a supplementary load. Preferably, delay elements are inserted in the input lines of the first AND-gate 5 in order to compensate the signal delay of the inverters 6, 7. As the output of the first AND-gate 5 switches to logic "1" when both of its inputs are logic "1" and the output of the second AND- gate 8 switches to "1" when the inputs of the first AND-gate are all of logic value "0", it cannnot be recognized from outside if switching occurs when all the inputs of the first AND- gate 5 are set to "0" or are set to "1" If a third and a fourth AND-gate were added parallel to the first and second AND-gate with a single inverter connected in-between one of the inputs, exactly one of those four AND-gates would switch every time when one of the logic values of the inputs changes. Because chips in a chip card are exposed to mechanical loads, however, they should not exceed a given size. Therefore, it is considered to be sufficient if only the logic elements which execute sensitive operations are constructed so as to be complementary. Two alternatives seem to be attractive for copying. On the one hand, security-relevant circuit elements, being of interest to a fraud because of the power consumption, can actually be provided on the chip in complementary logic so as to be controlled in parallel. For example, if during the calculation of a cryptogram, during which a secret in the form of a key which is unknown to the fraud is input, a logic level becomes high on a node at a given instant, be it random during the calculation (the previous state may have been low or high), in the complementary logic the state low is generated at the comparable node (the immediately previous state was high or low). Consequently, for sensitive operations the number of low-high transitions and the number of high-low transitions are exactly equal and the number of nodes which are high at a given instant corresponds exactly to the number of nodes which are low. The surface area required by the complementary logic corresponds exactly to the surface area required by the copied logic. On the other hand, it is also possible to realize a complementary machine which copies all logic combinations, be it not identical, by the switching of different load states.
Fig. 3 shows a complementary machine 10 which is connected, via wires 10, to nodes of security-related circuit elements of parts 9 of the chip performing the calculation of the cryptogram. In relation to the states of the sensored nodes, the complementary machine 10 calculates an appropriate load and switches, via switching transistors 12, the calculated number of load resistors 13.
This step is aimed at the generating of a power consumption which is independent of the data or the key but not necessarily constant, in order to achieve resistance against attacks which utilize the power consumption as a starting point (simple or differential power analysis). In any case the object is not to achieve a constant power consumption of the circuit by complex control concepts.
This concept can be realized independently of the construction of the logic (synchronous or asynchronous circuit technique).

Claims

CLAIMS:
1. A data carrier which includes a data processing device, characterized in that a load circuit which is connected to the power supply of the data carrier is provided so as to influence the power consumption of the data carrier at least during security-relevant operations of the data processing device.
2. A data carrier as claimed in claim 1, characterized in that the load circuit is formed by a variable load resistor.
3. A data carrier as claimed in claim 1, characterized in that a circuit arrangement which is constructed so as to be complementary to at least parts of the data processing device can be controlled in parallel with the data processing device.
4. A data carrier as claimed in claim 1, characterized in that the load circuit is constructed so as to be controllable by way of its own logic which is intended to generate a load state which is complementary to the power consumption of the data processing device.
5. An electronic component, notably an integrated component provided with a data processing device, characterized in that a load circuit which is internally connected to the power supply of the electronic component is arranged to influence the power consumption of the electronic component at least during security-relevant operations of the data processing device.
6. An electronic component as claimed in claim 5, characterized in that the load circuit consists of a variable load resistor.
7. An electronic component as claimed in claim 5, characterized in that the load circuit is formed by a circuit arrangement which is constructed so as to be complementary with at least parts of the data processing device and can be controlled in parallel with the data processing device.
8. An electronic components claimed in claim 5, characterized in that the load circuit can be controlled by means of its own logic which is arranged to produce a load state which is complementary to the power consumption of the data processing device.
PCT/EP1999/008331 1998-11-03 1999-10-28 Data carrier with obscured power consumption WO2000026746A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US09/582,802 US6498404B1 (en) 1998-11-03 1999-10-28 Data carrier with obscured power consumption
DE69929471T DE69929471T2 (en) 1998-11-03 1999-10-28 DATA CARRIER WITH HIDDEN POWER CONSUMPTION
JP2000580063A JP2003526134A (en) 1998-11-03 1999-10-28 Data carriers with unclear power consumption
EP99968334A EP1057096B1 (en) 1998-11-03 1999-10-28 Data carrier with obscured power consumption
KR1020007007389A KR100701713B1 (en) 1998-11-03 1999-10-28 Data carrier with obscured power consumption

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19850721A DE19850721A1 (en) 1998-11-03 1998-11-03 Disk with concealment of power consumption
DE19850721.6 1998-11-03

Publications (2)

Publication Number Publication Date
WO2000026746A2 true WO2000026746A2 (en) 2000-05-11
WO2000026746A3 WO2000026746A3 (en) 2000-10-12

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP1999/008331 WO2000026746A2 (en) 1998-11-03 1999-10-28 Data carrier with obscured power consumption

Country Status (9)

Country Link
US (1) US6498404B1 (en)
EP (1) EP1057096B1 (en)
JP (1) JP2003526134A (en)
KR (1) KR100701713B1 (en)
CN (1) CN1311313C (en)
AT (1) ATE315801T1 (en)
DE (2) DE19850721A1 (en)
TW (1) TW460774B (en)
WO (1) WO2000026746A2 (en)

Cited By (5)

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Publication number Priority date Publication date Assignee Title
EP1220077A2 (en) * 2000-12-28 2002-07-03 Kabushiki Kaisha Toshiba Data processing apparatus and memory card using the same
WO2004001971A1 (en) * 2002-06-20 2003-12-31 Infineon Technologies Ag Logic circuit
WO2006067665A1 (en) 2004-12-20 2006-06-29 Philips Intellectual Property & Standards Gmbh Data processing device and method for operating such data processing device
US8209765B2 (en) 2003-04-22 2012-06-26 Nxp B.V. Electronic circuit device for cryptographic applications
WO2012127135A1 (en) 2011-03-24 2012-09-27 Université Montpellier 2 Sciences Et Techniques Secure memory element

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FR2793904B1 (en) * 1999-05-21 2001-07-27 St Microelectronics Sa METHOD AND DEVICE FOR MANAGING AN ELECTRONIC CIRCUIT
US6955300B1 (en) * 1999-06-29 2005-10-18 Renesas Technology Corp. Dual interface IC card
US6766455B1 (en) * 1999-12-09 2004-07-20 Pitney Bowes Inc. System and method for preventing differential power analysis attacks (DPA) on a cryptographic device
ATE497221T1 (en) * 2000-04-04 2011-02-15 Nxp Bv DATA CARRIER WITH A CHIP AND MEANS FOR THE ADJUSTABLE VOLTAGE SUPPLY OF A FURTHER DATA CARRIER COMPONENT
FR2811790A1 (en) * 2000-07-11 2002-01-18 Schlumberger Systems & Service Smart card microcontroller secured against current attacks, uses module between processor and external supply which chaotically encrypts supply current fluctuations
FR2818847A1 (en) * 2000-12-26 2002-06-28 St Microelectronics Sa VARIABLE POLARITY LOGIC CIRCUIT
JP2003018143A (en) * 2001-06-28 2003-01-17 Mitsubishi Electric Corp Information processor
DE10217291B4 (en) * 2002-04-18 2005-09-29 Infineon Technologies Ag Data processing device and method for operating a data processing module
JPWO2005027403A1 (en) * 2003-09-11 2006-11-24 株式会社ルネサステクノロジ Information processing equipment
DE102004020576B4 (en) * 2004-04-27 2007-03-15 Infineon Technologies Ag Data processing device with switchable charge neutrality and method for operating a dual-rail circuit component
JP3933647B2 (en) * 2004-05-10 2007-06-20 シャープ株式会社 Semiconductor device with power consumption analysis prevention function
US8577942B2 (en) 2004-07-07 2013-11-05 Mitsubishi Electric Corporation Electronic device and data processing device for implementing cryptographic algorithms
JP4594665B2 (en) * 2004-07-09 2010-12-08 三菱電機株式会社 Tamper resistant circuit evaluation apparatus, tamper resistant circuit evaluation method, signal generation circuit, signal generation method, tamper resistance evaluation apparatus, and tamper resistance evaluation method
DE102009013158A1 (en) * 2009-03-16 2010-09-23 Giesecke & Devrient Gmbh Securing a data signal sent from a portable data carrier
KR101462742B1 (en) * 2009-10-14 2014-11-17 차오로직스, 아이엔씨. High utilization universal logic array with variable circuit topology and logistic map circuit to realize a variety of logic gates with constant power signatures
GB2487901B (en) * 2011-02-03 2019-12-04 Advanced Risc Mach Ltd Power signature obfuscation
US8958550B2 (en) * 2011-09-13 2015-02-17 Combined Conditional Access Development & Support. LLC (CCAD) Encryption operation with real data rounds, dummy data rounds, and delay periods
US8334705B1 (en) 2011-10-27 2012-12-18 Certicom Corp. Analog circuitry to conceal activity of logic circuitry
US8635467B2 (en) 2011-10-27 2014-01-21 Certicom Corp. Integrated circuit with logic circuitry and multiple concealing circuits
WO2013190782A1 (en) * 2012-06-22 2013-12-27 日本電気株式会社 Encryption processing circuit and decryption processing circuit
US11188682B2 (en) * 2016-06-17 2021-11-30 Arm Limited Apparatus and method for masking power consumption of a processor
DE102016009045A1 (en) * 2016-07-25 2018-01-25 Detlef Fischer Intermediate switching device and operating method for it

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US4932053A (en) * 1988-11-10 1990-06-05 Sgs-Thomson Microelectronics, S.A. Safety device against the unauthorized detection of protected data
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1220077A2 (en) * 2000-12-28 2002-07-03 Kabushiki Kaisha Toshiba Data processing apparatus and memory card using the same
EP1220077A3 (en) * 2000-12-28 2003-07-02 Kabushiki Kaisha Toshiba Data processing apparatus and memory card using the same
US7533275B2 (en) 2000-12-28 2009-05-12 Kabushiki Kaisha Toshiba Data processing apparatus and memory card using the same
WO2004001971A1 (en) * 2002-06-20 2003-12-31 Infineon Technologies Ag Logic circuit
US7132858B2 (en) 2002-06-20 2006-11-07 Infineon Technologies Ag Logic circuit
DE10227618B4 (en) * 2002-06-20 2007-02-01 Infineon Technologies Ag logic circuit
US8209765B2 (en) 2003-04-22 2012-06-26 Nxp B.V. Electronic circuit device for cryptographic applications
WO2006067665A1 (en) 2004-12-20 2006-06-29 Philips Intellectual Property & Standards Gmbh Data processing device and method for operating such data processing device
WO2012127135A1 (en) 2011-03-24 2012-09-27 Université Montpellier 2 Sciences Et Techniques Secure memory element
FR2973138A1 (en) * 2011-03-24 2012-09-28 Univ Montpellier Ii SECURE MEMORY ELEMENT

Also Published As

Publication number Publication date
KR20010033832A (en) 2001-04-25
WO2000026746A3 (en) 2000-10-12
TW460774B (en) 2001-10-21
DE69929471D1 (en) 2006-04-06
DE19850721A1 (en) 2000-05-18
ATE315801T1 (en) 2006-02-15
KR100701713B1 (en) 2007-03-29
JP2003526134A (en) 2003-09-02
DE69929471T2 (en) 2006-09-14
EP1057096B1 (en) 2006-01-11
US6498404B1 (en) 2002-12-24
EP1057096A2 (en) 2000-12-06
CN1292111A (en) 2001-04-18
CN1311313C (en) 2007-04-18

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