WO1999061970A2 - Systemes, procedes, et produits de programme informatique de registres generaux - Google Patents
Systemes, procedes, et produits de programme informatique de registres generaux Download PDFInfo
- Publication number
- WO1999061970A2 WO1999061970A2 PCT/US1999/012063 US9912063W WO9961970A2 WO 1999061970 A2 WO1999061970 A2 WO 1999061970A2 US 9912063 W US9912063 W US 9912063W WO 9961970 A2 WO9961970 A2 WO 9961970A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- symbol
- file
- object file
- relocation
- linker
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/54—Link editing before load time
Definitions
- the field of this invention relates to global register usage and conflict detection systems, methods, and computer program products, and more particularly to the indication of global register usage and the detection of usage conflicts in global registers.
- registers are used to temporarily hold copies of the contents of variables required by an executing computer program. Persistent values for variables are stored in memory. It is known to be useful, moreover, to designate one or more of the registers in a computer program system as global in scope (that is, used by the entire computer program and not just by particular modules or subroutines) and to dedicate for the use of the global registers certain variables which are also of global scope. Since particular programs are linked from individual object modules that are each compiled separately, different symbols may refer to the same global register, causing incorrect referencing and scoping of variables. Particular programs furthermore incorporate code from one or more libraries, which is also compiled separately, compounding the misreferencing.
- a symbol table type STT_SPARC_REGISTER
- STT_SPARC_REGISTER is established to expressly indicate particular symbol table entries which associate a global symbol with a particular global register.
- the "name" portion of a symbol table entry points to a string that contains the name of the symbol, or else contains a NULL value to indicate that the register is used for scratch space.
- the "value” portion of the symbol table entry indicates the particular register to which this entry applies. Another portion of the symbol table entry indicates whether there is an initializer for the particular register.
- a relocation type indicates an initial value for a global register.
- a compiler generates symbol table entries to indicate how a containing object file uses the application-reserved global registers.
- a static linker checks the generated symbol table entries for all object files being combined into a particular target object file to ensure that the global registers referenced by the different source elements are used compatibly.
- the resulting object file produced includes these symbol table entries to indicate the resulting object global register usage.
- the static linker warns if any shared object file that was referenced during the linking used the global registers in a fashion incompatible with the object file being built.
- the static linker generates a warning, if a shared object file is being built that uses application-reserved global registers.
- a similar warning is issued according to the present invention by an archiver, if an archive library is built using application-reserved global registers.
- a dynamic linker according to the present invention checks to ensure that all object files being bound into a selected process have compatible uses of application-reserved global registers.
- a system and method for compiling and linking a source file includes a compiler for generating a symbol table which associates particular global symbols with corresponding global registers for holding variable class information pertaining to global symbols referenced or defined in the source file.
- the symbol table information is sufficient to enable a linker to resolve class definitions and to perform class relocation operations.
- the symbol table information is included in the object file generated by the compiler.
- the compiler particularly generates object files such that identification of usage conflicts and performance of relocation operations are delayed until operation of the linker.
- a linker links the object file with other object files and shared libraries to thereby generate either an executable file or a shared library.
- the list of other object files and shared libraries may be empty, in which case the linker generates the executable file or shared library from the single object file.
- the linker uses the class information contained in the object file to identify usage conflicts and to perform relocation operations.
- Figure 1 is a compilation data flow diagram according to a preferred embodiment of the present invention.
- Figure 2 is a block diagram of a computer system according to a preferred embodiment of the present invention.
- Figure 3 A is a flowchart of a linker process which can be used in connection with the present invention
- Figure 3B is a flow chart of a linker process according to one embodiment of the present invention
- Figure 4 is a block diagram of an object file produced by a compiler according to a preferred embodiment of the present invention.
- Figure 5 is a flowchart of a compilation/linking process according to a preferred embodiment of the present invention
- Figure 6 is a detailed flowchart of link processing according to a preferred embodiment of the present invention
- Figure 7 is an example of an information table generated by a compiler according to a preferred embodiment of the present invention
- Figure 8 is an example of a relocation table according to one embodiment of the present invention.
- Figure 1 is a compilation data flow diagram according to a preferred embodiment of the present invention.
- Figure 1 illustrates a compiler 104, a static linker 114, and a run-time linker 118, according to one implementation of the present invention.
- the compiler 104 generates an object file 106 from a source file 102.
- the source file 102 is written according to different embodiments of the present invention in the well-known C, C++, or the Fortran computer programming languages. It is important to note that the present invention does not impose restrictions on how developers may use the particular language selected to produce the source file 102.
- the static linker 114 includes a relocation code section which is used to initialize register symbols.
- the relocation code section has a name, .rela; a type, SHT_RELA; and no attributes, Accordingly, the following table is valid:
- sh_link contains the section header index of the associated symbol table; and sh_info is 0, indicating that this section only contains register relocations.
- the object file 106, as well as zero or more other object files 108, and/or zero or more shared libraries 110 are transferred to a static linker 114, according to the present invention.
- the other object files 108 were previously compiled by the compiler 104 of the present invention and the shared libraries 110 were previously created by the static linker 114.
- the static linker 114 generates an executable file 116.
- the static linker 114 generates another shared library.
- a shared library is a form of an object file. Accordingly, the terms "object file” and "shared library” will be used interchangeably herein.
- the executable file 116 includes code, data, and other information from the object files 106, 108, and also contains references to shared libraries 110 (i.e., code, data, etc. from the shared libraries 110 are not actually embedded in the executable file 116.
- the executable file 116 and the shared libraries 1 10 are transferred to a run- time linker 118.
- the run-time linker 118 resolves references contained in the executable file 116 to the shared libraries 110, and produces an execution image 120.
- the execution image 120 is stored in main memory 208 and is executed by a central processing unit 204 (Fig. 2).
- FIG. 2 is a block diagram of a computer system 202 according to a preferred embodiment of the present invention.
- the computer system 202 includes one or more processors, such as central processing unit (CPU) 204, connected to a communication medium, such as a bus 206.
- a main memory e.g., without limitation) random access memory (RAM)
- RAM random access memory
- the compiler 104 and linker 112 are stored in the main memory 208.
- Linker 112 includes according to the present invention a static linker 114, a run-time or dynamic linker, or both.
- Computer system 202 further includes registers 210.
- a computer program product (such as floppy disk 214), comprising a computer readable media having computer program logic recorded thereon, wherein the computer logic when executed in the computer system 202 enables the computer system 202 to perform the functions of the present invention, may be read by an additional storage device, such as floppy disk drive 212.
- the computer program logic which represents the compiler 104 and the linker 112, may then be loaded into the main memory 208 (as shown), and executed by the CPU 204.
- a suitable form for the computer system 202 is a Sun Microsystems workstation made by Sun Microsystems, Inc., of Mountain View, California. Any other suitable computer system could alternatively be used.
- FIG. 3 A is a flowchart of a linker process which can be used in connection with the present invention.
- Flowchart 302 particularly shows performance 306 of a read phase in which the static linker 114 and run-time linker 118 operate to perform read operations after a begin phase 304, a layout phase 308, a relocation phase 310, and a write phase 312.
- These linker phases 306, 308, 310, and 312 are well-known to persons skilled in the art.
- Flowchart 302 is completed with performance of an end phase 314.
- Figure 3B is a flowchart 352 of a linker process according to one embodiment of the present invention.
- a read phase is performed 356 in which the static linker 114 and the run-time linker 118 operate to perform read operations.
- a layout phase 358 is performed, which is followed by a relocation phase 360 and a write to memory phase 362.
- the global registers are initialized and control is turned over 366 to the executable image, followed by completion in an end phase 394.
- Figure 4 is a block diagram of an object file produced by a compiler according to a preferred embodiment of the present invention.
- the object file 106 includes code and data 402 and a symbol information 406.
- object file 106 additionally includes one or the other or both of symbol table 404 and symbol table 408.
- the symbol information 406 according to one embodiment of the present invention includes a symbol table 408. Further according to one embodiment of the present invention, the symbol information 406 includes a relocation table 412.
- the compiler 104 generates code and data 402 and information for the symbol table 408 including global symbol and global register information and embeds such information 406 in the object file 106.
- Such global symbol and global register information includes data about global symbols and global registers which are defined and/or referenced in the source file 102, and further includes additional information on how such global symbols and global registers are used by the source file 102.
- the global symbol and global register information 406 generated by the compiler 104 particularly enables the linker 112 whether static, dynamic or run-time, to identify global symbol conflicts and global register conflicts and to perform relocations according to the present invention. As discussed above, it is not the compiler 104 that identifies global symbol conflicts or perform relocations according to the present invention. Instead, identification of global symbol conflicts is delayed from compile time to link time according to the present invention.
- Figure 5 is a flowchart of a compilation/linking process according to a preferred embodiment of the present invention.
- Figure 5 depicts a flowchart 502 according to the present invention which represents the high-level operation of the compiler 104 and the applicable one of linkers 114, 118.
- the compiler 104 performs step 506 when compiling the source file 104, and the applicable one of linkers 114, 118 performs step 508 when processing the object files 106 and 108, and the shared libraries 110.
- Flowchart 502 begins with step 504 and control passes to step 506 after completion of the begin phase.
- the compiler generates information regarding global symbol table entries to indicate how the containing object file uses particular application-reserved global registers.
- the programmer accordingly indicates to the compiler by flags, for example, according to one embodiment of the present invention, or to the assembler by flags or directives according to another embodiment of the present invention, what the particular register usage is for a selected global register.
- the compiler 104 generates an object file 106 from the source file 102.
- step 508 the applicable one of linkers 114, 118 generates an executable file 116, and then an execution image 120 is produced from the object files 106 and 108, and the shared libraries 110.
- the static linker 114 and the run-time linker 118 perform a read phase 306, a layout phase 308, a relocation phase 310, and a write phase 312.
- these linker phases 306, 308, 310, and 312 are modified such that the static linker 114 and the run-time linker 118 identify global symbol conflicts and perform relocations.
- the operation of the static linker 114 and the run-time linker 118 is further discussed below.
- step 508 the operation of flowchart 502 is complete, as indicated by step 510.
- the static linker checks the symbol table entries in the object files being combined into an executable file or a shared library to ensure that the global registers are used compatibly.
- the resulting object includes, according to the present invention, entries in its symbol table to indicate the resulting object's global register usage.
- the static linker warns if any shared library that was referenced during the linking uses global registers incompatibly with the object being built. Further according to one embodiment of the present invention, the static linker generates a warning if a shared object is being built that uses application-reserved global registers.
- a similar warning is issued by an archiver, if an archive library is built containing objects that use application-reserved global registers.
- the dynamic linker (ld.so) according to the present invention checks that all object files being bound into a target process have compatible uses of the application-reserved global registers.
- the scratch symbol according to the present invention is treated as a symbol since a null name only matches a null name and scratch registers according to the present invention have global scope.
- a matrix of permissible combinations of st_shndx for the same register symbol follows: TABLE C Matrix of Permissible Combinations of Initialization of a Given Register
- the symbol information 406 includes (1) a symbol table 408 containing a list of global symbols; and (2) a relocation table 412 containing a list of global symbols.
- the linker 114 or l l8 as applicable, in step 508 determines the exact layout of global symbol used by an application and then satisfies the relocations required.
- the symbol table 408 comprises a plurality of entries, where each entry corresponds to a symbol. These entries are used by the linkers 114 and 118 during the relocation process.
- FIG. 6 is a detailed flowchart of linker operation according to one embodiment of the present invention.
- a linker generally operates according to four phases: a read phase 306, a layout phase 308, a relocation phase 310, and a write phase 312 ( Figure 3).
- these linker phases 306, 308, 310, and 312 have been modified such that the applicable linker identifies global symbol conflicts.
- Such modification is shown in a flowchart 602 in Figure 6.
- step 606 is preferably performed in the read phase 306.
- Step 608 is preferably performed between the read phase 306 and the layout phase 308.
- global symbol conflicts are identified Steps 612 and 614 are preferably performed between the layout phase 308 and the relocation phase 310.
- Step 616 is preferably performed during the relocation phase 310.
- Flowchart 602 begins with step 604, where control immediately passes to step 606.
- the applicable linker reads in the object files 106, 108 and the shared libraries 110 and merges together the global symbol information 406 contained in these files.
- the applicable linker merges together the global symbol tables 408 contained in these files to generate a merged symbol table.
- the applicable linker merges together the relocation tables 412 to generate a merged relocation table.
- the applicable linker identifies global symbol conflicts.
- the applicable linker processes the merged tables and determines the layout of each symbol (for example, the size and alignment of each symbol, the number of fields, the data types of the fields, the number of bytes from the top of the symbol to each of the fields, etc.)
- the applicable linker creates a separate data structure for each symbol, and stores this symbol specific information in such data structures. These data structures are called "layout data structures" for reference purposes.
- the applicable linker is aware of all symbol- related information that are conventionally known by conventional compilers.
- the applicable linker evaluates the symbols in the merged symbol table. In particular, the applicable linker determines the value of the symbol in each entry of the merged symbol table, and stores this value in the value field of this entry.
- the applicable linker determines the values of entries 714 and 718 by referencing the appropriate layout data structure for a particular class.
- the applicable linker stores these values in the value fields of these entries 714, 718.
- the manner in which the linker 112 calculates the values of other symbol types is described above.
- the applicable linker initializes global register structures.
- the applicable linker generates tables and table pointer information tables, and stores these tables in the appropriate data structures that have been allocated.
- the applicable linker performs the relocations specified in the entries of the merged relocation table. The manner in which the applicable linker performs this function is described above.
- step 616 the operation of flowchart 602 is complete, as indicated by step 618.
- the operation of the applicable linker described above is, in practice, collectively performed by the static linker 114 and the run-time linker 118. Whether the operations described above are performed by the static linker 114 or the run-time linker 118 is not important in the present invention. Preferably, however, the static linker 114 attempts to prelink executables and shared objects so that if the executable and shared objects are in the same state as when they were created, then the run-time linker 118 needs to only load the files and start running. In practice, the run-time linker 118 may have to redo many of the relocations that were done by the static linker 114.
- Figure 7 is an example of a symbol table generated by a compiler according to a preferred embodiment of the present invention.
- Figure 7 particularly shows first and second symbol table entries, 714 and 718, in an example symbol table 408.
- Each entry in the symbol table 408 includes information that identifies the symbol type, and information that indicates the value of the symbol for this class.
- Entries for particular symbols may additionally include further fields including for example symbol name, symbol size, symbol binding, and a symbol section index.
- the symbol name when appropriate contains the name of a member.
- the list of symbol types is implementation specific, and depends on a number of factors, such as the computer programming language and the target machine. Example symbol types will be apparent to persons skilled in the relevant art.
- the applicable linker calculates the values of the symbols in the symbol table 408 according to the present invention before processing the relocation entries in the relocation table 412.
- the value is extracted from the symbol table and is stored at the given address according to the type of the relocation entry.
- the applicable linker Prior to processing the relocation entries in the relocation table 412, the applicable linker evaluates the symbol entries 714, 718 in the symbol table 408 and reads the value associated with each symbol entry. The applicable linker then inserts the value read into the value field of the symbol entry 714. According to one embodiment of the present invention, the applicable linker inserts this value (8 bytes) into the value field of the symbol entry 718.
- the applicable linker While processing a particular relocation entry, the applicable linker according to the present invention replaces a placeholder in the instruction at a particular address with the value in symbol entry 714. This may be a case pointer in a relocation entry which points to symbol entry 714. Similarly, while processing a particular relocation entry for relocation table 412, the applicable linker replaces the placeholder, such as a zero (i.e., "o" for example) in the instruction at a particular address with the value provided in symbol entry 714.
- a register symbol in a symbol table according to one embodiment of the present invention is indicated by a specific additional Symbol Type and Value as set forth below:
- a symbol table entry for a register symbol particularly includes the following elements: st name Index into the string table of the name of the symbol. An index value of 0, which points to the null name in the string table, indicates that the register is used for scratch. A scratch register must have binding STB_GLOBAL. st value Register number. Register numbers correspond to the assignments in the SPARC Architecture Manual for integer registers. st_s ⁇ ze unused (0) st info ELF64_ST_INFO (bind.type) bind is typically STB_GLOBAL, but does reflect the actual declared scope of the name (that is, it could be STB W ⁇ AK or STB_LOCAL). type must be STT_REGISTER (13) st_other unused (0) st shndx SHN_ABS if this object initializes this register symbol;
- SHN JNDEF otherwise.
- An initializer for a SHN_ABS register symbol is specified with a special register relocation type.
- Absence of an entry for a particular global register indicates that that particular global register is not used by the object.
- An object according to the present invention uses one or more of the application-reserved global registers and indicates this usage with an appropriate symbol-table entry.
- the following dynamic array tag is moreover added to the symbol table according to one embodiment of the present invention:
- the compiler 104 accordingly generates code that is relocated at link-time.
- the compiler 104 if a variable is referenced in a source file, the compiler 104 generates both a symbol table 408 and a relocation table 412.
- the generation of symbol and relocation tables is accomplished with a specialized global register relocation type which is used to identify global register conflicts and to initialize the global registers prior to execution of the execution image which is produced.
- FIG 8 is an example of a relocation table according to one embodiment of the present invention.
- the relocation table 412 contains a list of the relocations which must be performed by the applicable linker during link-time.
- Each entry in the relocation table 412 includes a relocation type, an address of either an instruction or a data element that needs to be relocated, and, in all but one case, a pointer to an entry in the symbol table 408.
- the following relocation type is added to the relocation table according to the present invention: TABLE F Additional Relocation Type
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU43238/99A AU4323899A (en) | 1998-05-29 | 1999-05-28 | Global register systems, methods, and computer program products |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/087,352 | 1998-05-29 | ||
US09/087,352 US6298479B1 (en) | 1998-05-29 | 1998-05-29 | Method and system for compiling and linking source files |
JP11/146389 | 1999-05-26 | ||
JP11146389A JP2000010792A (ja) | 1998-05-29 | 1999-05-26 | グロ―バルレジスタシステム、方法及びコンピュ―タプログラム製品 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999061970A2 true WO1999061970A2 (fr) | 1999-12-02 |
Family
ID=26477255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1999/012063 WO1999061970A2 (fr) | 1998-05-29 | 1999-05-28 | Systemes, procedes, et produits de programme informatique de registres generaux |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU4323899A (fr) |
WO (1) | WO1999061970A2 (fr) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009138381A1 (fr) * | 2008-05-12 | 2009-11-19 | Xmos Limited | Attribution de ressources liens-temps pour une architecture à processeur multifil |
CN110688320A (zh) * | 2019-09-30 | 2020-01-14 | 潍柴动力股份有限公司 | 全局变量的检测方法、装置及终端设备 |
-
1999
- 1999-05-28 WO PCT/US1999/012063 patent/WO1999061970A2/fr active Application Filing
- 1999-05-28 AU AU43238/99A patent/AU4323899A/en not_active Abandoned
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009138381A1 (fr) * | 2008-05-12 | 2009-11-19 | Xmos Limited | Attribution de ressources liens-temps pour une architecture à processeur multifil |
US8578354B2 (en) | 2008-05-12 | 2013-11-05 | Xmos Limited | Link-time resource allocation for a multi-threaded processor architecture |
CN110688320A (zh) * | 2019-09-30 | 2020-01-14 | 潍柴动力股份有限公司 | 全局变量的检测方法、装置及终端设备 |
CN110688320B (zh) * | 2019-09-30 | 2023-05-23 | 潍柴动力股份有限公司 | 全局变量的检测方法、装置及终端设备 |
Also Published As
Publication number | Publication date |
---|---|
AU4323899A (en) | 1999-12-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6298479B1 (en) | Method and system for compiling and linking source files | |
US5999732A (en) | Techniques for reducing the cost of dynamic class initialization checks in compiled code | |
EP0752647B1 (fr) | Procédé et dispositif pour fournir des informations de version interne des objets utilisant un fichier | |
US6973646B1 (en) | Method for compiling program components in a mixed static and dynamic environment | |
US6964039B2 (en) | Method to create optimized machine code through combined verification and translation of JAVA™ bytecode | |
CN1119756C (zh) | 用于进行静态初始化的方法和系统 | |
JP5039031B2 (ja) | ネイティブコード及び目的コードをプログラムコード変換中に組み合わせて実行する方法及び装置 | |
EP1280056B1 (fr) | Génération d'information de débogage | |
EP0718764A2 (fr) | Appareil et méthode interprétateur de programme en code octet avec prévérification de restrictions de type de données | |
KR100404785B1 (ko) | 변형된 상수 풀을 가진 자바 런타임 시스템 및 새로운코드의 자바 런타임 시스템내로의 도입 방법 | |
US6934943B2 (en) | Optimization of control transfers to dynamically loaded modules | |
US5367683A (en) | Smart recompilation of performing matchup/difference after code generation | |
WO1994027219A1 (fr) | Procede et appareil pour la correction de codes residant dans un dispositif a memoire rom | |
US6351848B1 (en) | Unitary data structure systems, methods, and computer program products, for global conflict determination | |
WO1994027220A1 (fr) | Procede et appareil pour vectoriser le contenu d'un dispositif a memoire rom sans modifier le code source sous-jacent | |
WO1993000633A1 (fr) | Procede et appareil de modification de fichiers de codes resultant translatables et de controle de programmes | |
US6810519B1 (en) | Achieving tight binding for dynamically loaded software modules via intermodule copying | |
EP1672488A2 (fr) | Liaison pendant la compilation par une technique de hachage | |
US5625822A (en) | Using sorting to do matchup in smart recompilation | |
KR101875225B1 (ko) | 가상 머신에 의한 실행을 위한 프로그래밍의 중간 코드의 보안 프로세스, 컴퓨터 프로그램 및 장치 | |
US6026242A (en) | Methods, computer program products, and apparatus for initializing global registers | |
US20110113409A1 (en) | Symbol capabilities support within elf | |
US20020087956A1 (en) | System and method for linear processing of software modules | |
US6978451B2 (en) | Method for fast compilation of preverified JAVA bytecode to high quality native machine code | |
US5535392A (en) | Using hint generation to cause portions of object files to remain the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AL AM AT AU AZ BA BB BG BR BY CA CH CN CU CZ DE DK EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT UA UG UZ VN YU ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): GH GM KE LS MW SD SL SZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
NENP | Non-entry into the national phase in: |
Ref country code: KR |
|
REG | Reference to national code |
Ref country code: DE Ref legal event code: 8642 |
|
122 | Ep: pct application non-entry in european phase |