WO1999037125A1

WO1999037125A1 - A power factor correction circuit

Info

Publication number: WO1999037125A1
Application number: PCT/SG1998/000109
Authority: WO
Inventors: Chang Guo Yang; Choon Chin Liew
Original assignee: Ideas Electronics (S) Pte Ltd.
Priority date: 1998-01-19
Filing date: 1998-12-28
Publication date: 1999-07-22
Also published as: AU2084399A

Abstract

A power factor correction circuit (1) includes transformer (T3) which includes a primary winding (5, 7) and a secondary winding ( 4). The primary winding (5, 7) is coupled to a load line (3) which is adapted to be coupled to a load. The secondary winding (4) is coupled to a source line (2) which is adapted to be coupled to a rectified AC voltage source. A rectifying device (D16) is coupled between the primary winding (5, 7) and the secondary winding (4) to permit current flow from the secondary winding (4) to the primary winding (5, 7) and to substantially prevent current flow from the primary winding (5, 7) to the secondary winding (4).

Description

A POWER FACTOR CORRECTION CIRCUIT

The invention relates to a power factor correction circuit and in particular, but not solely, a power factor correction circuit for use with electric vapour discharge lamps.

One of the uses of power factor correction circuits, is in electronic ballasts for vapour discharge lamps, such as fluorescent lamps. The power factor correction circuit is used to reduce harmonic current content and to reduce the current - voltage phase lag which would otherwise appear in the output from the electronic ballast if the power factor correction circuit was not present. One of the problems with an electronic ballast which produces a high harmonic current content is that it can provide line interference on nearby electronic equipment, especially sensitive electronic equipment. Therefore, it is desirable to filter out as much of the harmonic current content as possible from the output .

Existing power factor correction circuits for reducing the harmonic current content are located between the AC to DC bridge rectifier in the electronic ballast and the passive power factor correction circuit and the invertor circuit.

Existing power factor correction circuits typically use an integrated circuit which includes a large number of devices (approximately 20 different components) all of which produce heat. Hence, the large number of components in existing power factor correction circuits results in a relatively expensive power factor correction circuit which also has the disadvantage of producing heat which can affect other components within the electronic ballast.

In accordance with an aspect of the present invention, a power factor correction circuit comprises a transformer comprising a primary winding and a secondary winding, the primary winding being coupled to a load line which is adapted to be coupled to a load and the secondary winding being coupled to a source line which is adapted to be coupled to a rectified AC voltage source, and a first rectifying device coupled between the primary winding and the secondary winding to permit current flow from the secondary winding to the primary winding and to substantially prevent current flow from the primary winding to the secondary winding .

An advantage of the invention is that by using a transformer and a rectifying device coupled between the primary and secondary windings of the transformer, the use of active elements may be minimised and the cost and complexity of the power factor correction circuit may also be reduced. An advantage of having less components is that the power factor correction circuit of the invention is easier to assemble and more reliable.

In accordance with a second aspect of the present invention, an electronic ballast comprises a power factor correction circuit in accordance with the first aspect of the invention. Preferably, the power factor correction circuit may further comprise an energy storing circuit in parallel with the primary winding .

Preferably, the transformer comprises two primary windings, the first primary winding being coupled to the second primary winding and to the load line and the second primary winding being coupled to the first primary winding and to the energy storing circuit .

Typically, both the first and the second primary windings are coupled to the first rectifying device.

Preferably, the energy storing circuit comprises a first capacitor having its negative terminal coupled to the cathode of a second rectifying device, a second capacitor having its positive terminal coupled to the anode of a third rectifying device, the secondary winding being coupled across the positive terminal of the first capacitor and the cathode of the third rectifying device, and a fourth rectifying device having its anode coupled to the cathode of the second diode and its cathode coupled to the anode of the third rectifying device.

Typically, the cathode of the third rectifying device is coupled to the same terminal of the second primary winding as the first rectifying device, and the positive terminal of the first capacitor is coupled to the other terminal of the second primary winding . Preferably, the anode of the second rectifying device and the negative terminal of the second capacitor are coupled to a reference voltage, such as an earth ground voltage.

Preferably, the first and second capacitors are hold-up or energy storing capacitors, such as electrolytic capacitors.

Typically, a third capacitor is connected in parallel with the third rectifying device and the second capacitor between the cathode of the third rectifying device and the negative terminal of the second capacitor.

Preferably, the first, second, third and fourth rectifying devices are diodes. Typically, the second, third and fourth diodes are fast recovery diodes.

Preferably, a fourth capacitor is coupled between the load line and the reference voltage.

An advantage of the third and fourth capacitors is that they act as filters.

Where the load line is to be coupled to a high frequency load, typically of the order of a few kHz or greater, a fast recovery diode may also be coupled between the load line and the reference voltage, and in parallel with the fourth capacitor.

Typically, the source line is adapted to be coupled to a full- wave rectified AC source. However, in certain applications, the source line may be adapted to be coupled to a half-wave rectified AC source .

Typically, the electronic ballast also includes a bridge rectifier and an inverter circuit. Preferably, the load line is coupled to the input to the inverter circuit and the source line is coupled to the output from the bridge rectifier.

An example of a power factor correction circuit in accordance with the invention will now be described with reference to the accompanying drawings, in which: -

Figure 1 is a circuit diagram of a power factor correction circuit; and

Figure 2 is a circuit diagram of an electronic ballast including the power factor correction circuit of Figure 1.

Figure 1 shows a power factor correction circuit 1 which has a source line 2 adapted to be coupled to a source which is typically a full-wave rectified AC source. A load line 3 of the power factor correction circuit 1 is adapted to be coupled to a load.

The primary components of the power factor correction circuit 1 are a transformer T3 , a first diode D16, two electrolytic capacitors El, E2 , and second, third and fourth diodes D14, D13 and D6. The circuit also includes a resistor Rl , two capacitors C6, C7 and a fifth diode D5. The electrolytic capacitors El, E2 and the diodes D14, D13, Dβ form an energy storing circuit which can be referred to as a passive power factor correction circuit.

It should be noted that the fifth diode D5 is optional and is incorporated into the power factor correction circuit 1 primarily if the load to which the load line 3 is to be attached is a high frequency load, such as of the order of a few kHz or greater.

The transformer T3 comprises two primary windings 5, 7 and a secondary winding 4. The diode D16 is coupled across the transformer T3 with the anode coupled to the secondary winding 4 and the cathode coupled to the primary windings 5, 7. Resistance Rl is coupled between the primary winding 5 and the load line 3. The load line 3 is also coupled to an earth ground 6 via the capacitor C7 and the diode D5 which has its anode coupled to the earth ground 6 and its cathode coupled to the load line 3. The opposite end of the primary winding 5 is coupled to the other primary winding 7 and to the cathode of the first diode D16 via a common contact point 20. The common contact point 20 is also coupled to the cathode of the third diode D13 and the anode of the third diode D13 is coupled to the positive terminal of the second electrolytic capacitor E2. The capacitor C6 is coupled in parallel with the third diode D13 and the second electrolytic capacitor E2 , between the point 20 and the earth ground 6.

The other end of the second primary winding 7 is coupled to the positive terminal of the first electrolytic capacitor E2. The negative terminal of the first capacitor E2 is coupled to the cathode of the second diode D14. The anode of the second diode D14 is coupled to the earth ground 6. The fourth diode D6 has its anode coupled to the negative terminal of E2 and the cathode of diode D14. The cathode of the fourth diode D6 is coupled to the anode of the third diode D13 and the positive terminal of the second capacitor E2.

Figure 2 shows the power factor correction circuit 1 of Figure 1 used in an electronic ballast for fluorescent lamps. The power factor correction circuit 1 has the source line 2 connected to the output from a full-wave bridge rectifier 11 and the load line 3 is connected to an inverter circuit 12.

Typically, in the application shown in Figure 2, the transformer T3 typically has 47 turns in the primary windings 5, 7 and the primary windings 5, 7 have an inductance of 5mH. The secondary winding 4 also has 47 turns and an inductance of 5mH. Typically, the core of the transformer may be, for example, an EF25 Siemens Inc. 27 ferrite core.

The diodes D5, D6 , D13 and D14 may be, for example, 1N4937 fast recovery rectifiers manufactured by Liteon Power Semiconductors. The diode D16 may be a 1N4007 plastic silicon rectifier manufactured by Liteon Power Semiconductors. The capacitors C6, C7 may be polypropylene capacitors with 682μF at 630 volts DC. The capacitors El, E2 are electrolytic capacitors of lOμF at 380 volts, such as those in the MKR series supplied by Maxcap Electronics. The resistor Rl is typically a type S236/25/M NTC resistor manufactured by Siemens which has a nominal resistance of 25Ω.

In use, the power factor correction circuit 1 receives a full- wave rectified AC voltage from the bridge rectifier 11 and the voltage is transferred via the transformer T3 from the secondary winding 4 to the primary windings 5 , 7 of the transformer T3. In addition, current from the bridge rectifier 11 is fed through the diode D16 to point 20, through the first primary winding 5 and the resistor 1 to the load line 3 and the inverter circuit 12. As the voltage from the bridge rectifier applied to the secondary winding 4 increases, the corresponding increasing voltage on the primary winding 7 charges the capacitors El, E2. After reaching the peak voltage, the voltage in the secondary winding 4 starts to decrease. The capacitors El, E2 have been charged and are storing energy during the decrease in voltage on the secondary winding 4. Hence, when the voltage in the secondary winding 4 has decreased to less than the voltage stored on the capacitors El, E2 , the voltage of point 20 will be equal to or greater than the voltage in the secondary winding 4. Therefore, the current from the secondary winding 4 through the diode D16 to the point 20 will cease. When this happens capacitors El, E2 will start to discharge causing a current to flow through the primary winding 7 and the diode D13, respectively through the primary winding 5 and the load line 3 to the inverter circuit 12. Note that current will not flow from the point 20 to the secondary winding 4 due to the presence of the first diode D16.

Hence, the passive power factor correction circuit which comprises the capacitors El, E2 and the diodes D6, D13 and D14, stores charge in the capacitors El, E2 when the voltage in the secondary winding 4 is in the upper half of the cycle and when the voltage in the secondary winding 4 is in the lower half of the cycle, the capacitors El, E2 supply current to the load line 3 to maintain current flow to the inverter 12.

Hence, the use of the second primary winding 7, the capacitors El, E2 and the diodes D6, D13 and D14 has the effect of reducing the harmonic current content and the use of the transformer T3 and the coupling of the secondary winding 4 to the primary windings 5, 7 reduces the phase lag of the current in the load line 3 so that the current in the load line 3 is approximately in phase with the voltage.

An advantage of the invention is that the power factor correction circuit filters out harmonic current content in the power supply without requiring an expensive integrated circuit with a high number of active components. In addition, the power factor correction circuit 1 has the advantage of isolating resistive components coupled to the source line 2 from reactive components coupled to the load line 3 of the power factor correction circuit 1.

Claims

1. A power factor correction circuit comprising a transformer comprising a primary winding and a secondary winding, the primary winding being coupled to a load line which is adapted to be coupled to a load and the secondary winding being coupled to a source line which is adapted to be coupled to a rectified AC voltage source; and a first rectifying device coupled between the primary winding and the secondary winding to permit current flow from the secondary winding to the primary winding and to subsequently prevent current flow from the primary winding to the secondary winding .

2. A power factor correction circuit according to Claim 1, further comprising an energy storing circuit coupled to the primary winding .

3. A power factor correction circuit according to Claim 2, wherein the energy storing circuit is adapted to store energy when the voltage in the secondary winding is in the upper half of the cycle and to discharge energy when the voltage in the secondary winding is in the lower half of the cycle, to supply current to the load line during the lower half of the voltage cycle in the secondary winding .

4. A power factor correction circuit according to Claim 2 or Claim 3, wherein the energy storing circuit is coupled between the primary winding and a reference voltage .

5. A power factor correction circuit according to any of Claims 2 to 4 , wherein the transformer comprises first and second primary windings, the first primary winding being coupled to the second primary winding and to the load line, and the second primary winding being coupled to first primary winding and to the energy storing circuit.

6. A power factor correction circuit according to Claim 5, wherein both the first and the second primary windings are coupled to the first rectifying device.

7. A power factor correction circuit according to any of Claims 2 to 6, wherein the energy storing circuit comprises first and second capacitors and second, third and fourth rectifying devices .

8. A power factor correction circuit according to any of Claims 2 to 7, further comprising a third capacitor connected in parallel with the energy storing circuit.

9. A power factor correction circuit according to any of the preceding claims, further comprising a capacitor coupled between the load line and a reference voltage.

10. A power factor correction circuit according to any of the preceding claims, further comprising a rectifying device coupled between the load line and a reference voltage.

11. An electronic ballast comprising a power factor correction circuit according to any of the preceding claims.

12. An electronic ballast according to Claim 11, wherein the source line of the power factor correction circuit is coupled to the output of a bridge rectifier and the load line is coupled to the input of an inverter circuit .