WO1999033182A3 - Circuit including a discrete time oscillator - Google Patents
Circuit including a discrete time oscillator Download PDFInfo
- Publication number
- WO1999033182A3 WO1999033182A3 PCT/IB1998/002020 IB9802020W WO9933182A3 WO 1999033182 A3 WO1999033182 A3 WO 1999033182A3 IB 9802020 W IB9802020 W IB 9802020W WO 9933182 A3 WO9933182 A3 WO 9933182A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- discrete time
- time oscillator
- circuit including
- oscillator
- dto
- Prior art date
Links
- 238000007493 shaping process Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/025—Digital function generators for functions having two-valued amplitude, e.g. Walsh functions
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
- H03L7/0994—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising an accumulator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
- H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53352799A JP2001513974A (en) | 1997-12-22 | 1998-12-14 | Circuit including discrete time oscillator |
EP98957079A EP0962056A1 (en) | 1997-12-22 | 1998-12-14 | Circuit including a discrete time oscillator |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97204068.7 | 1997-12-22 | ||
EP97204068 | 1997-12-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1999033182A2 WO1999033182A2 (en) | 1999-07-01 |
WO1999033182A3 true WO1999033182A3 (en) | 1999-09-10 |
Family
ID=8229112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB1998/002020 WO1999033182A2 (en) | 1997-12-22 | 1998-12-14 | Circuit including a discrete time oscillator |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0962056A1 (en) |
JP (1) | JP2001513974A (en) |
KR (1) | KR20000075597A (en) |
WO (1) | WO1999033182A2 (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10033109C2 (en) | 2000-07-07 | 2002-06-20 | Infineon Technologies Ag | Clock signal generator |
AU2003217053A1 (en) | 2003-04-02 | 2004-10-25 | Christopher Julian Travis | Method of establishing an oscillator clock signal |
US7558358B1 (en) | 2004-10-13 | 2009-07-07 | Cirrus Logic, Inc. | Method and apparatus for generating a clock signal according to an ideal frequency ratio |
US7599462B2 (en) | 2006-09-25 | 2009-10-06 | Cirrus Logic, Inc. | Hybrid analog/digital phase-lock loop with high-level event synchronization |
US7680236B1 (en) | 2006-09-25 | 2010-03-16 | Cirrus Logic, Inc. | Hybrid analog/digital phase-lock loop for low-jitter synchronization |
US7746972B1 (en) | 2007-03-22 | 2010-06-29 | Cirrus Logic, Inc. | Numerically-controlled phase-lock loop with input timing reference-dependent ratio adjustment |
US7848266B2 (en) * | 2008-07-25 | 2010-12-07 | Analog Devices, Inc. | Frequency synthesizers for wireless communication systems |
JP5783098B2 (en) | 2012-03-19 | 2015-09-24 | 富士通株式会社 | PLL circuit, control method of PLL circuit, and digital circuit |
CN114489233B (en) * | 2022-01-24 | 2024-06-11 | 上海华力集成电路制造有限公司 | Phase-adjustable arbitrary waveform generator |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0619653A1 (en) * | 1993-04-05 | 1994-10-12 | Koninklijke Philips Electronics N.V. | Digital phase-locked loop |
WO1997013325A1 (en) * | 1995-10-05 | 1997-04-10 | Analog Devices, Inc. | Variable sample-rate dac/adc/converter system |
-
1998
- 1998-12-14 WO PCT/IB1998/002020 patent/WO1999033182A2/en not_active Application Discontinuation
- 1998-12-14 KR KR1019997007658A patent/KR20000075597A/en not_active Application Discontinuation
- 1998-12-14 EP EP98957079A patent/EP0962056A1/en not_active Withdrawn
- 1998-12-14 JP JP53352799A patent/JP2001513974A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0619653A1 (en) * | 1993-04-05 | 1994-10-12 | Koninklijke Philips Electronics N.V. | Digital phase-locked loop |
WO1997013325A1 (en) * | 1995-10-05 | 1997-04-10 | Analog Devices, Inc. | Variable sample-rate dac/adc/converter system |
Also Published As
Publication number | Publication date |
---|---|
JP2001513974A (en) | 2001-09-04 |
WO1999033182A2 (en) | 1999-07-01 |
EP0962056A1 (en) | 1999-12-08 |
KR20000075597A (en) | 2000-12-26 |
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