WO1998031156A3 - Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems - Google Patents

Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems Download PDF

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Publication number
WO1998031156A3
WO1998031156A3 PCT/US1998/000781 US9800781W WO9831156A3 WO 1998031156 A3 WO1998031156 A3 WO 1998031156A3 US 9800781 W US9800781 W US 9800781W WO 9831156 A3 WO9831156 A3 WO 9831156A3
Authority
WO
WIPO (PCT)
Prior art keywords
switching system
bandwidth
abr
virtual circuits
atm
Prior art date
Application number
PCT/US1998/000781
Other languages
French (fr)
Other versions
WO1998031156A2 (en
Inventor
Teunis J Ott
Original Assignee
Bell Communications Res
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bell Communications Res filed Critical Bell Communications Res
Priority to AU59193/98A priority Critical patent/AU5919398A/en
Priority to JP10531275A priority patent/JP2000508500A/en
Priority to EP98902565A priority patent/EP0960513A2/en
Priority to CA002278317A priority patent/CA2278317A1/en
Publication of WO1998031156A2 publication Critical patent/WO1998031156A2/en
Publication of WO1998031156A3 publication Critical patent/WO1998031156A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5632—Bandwidth allocation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5632—Bandwidth allocation
    • H04L2012/5635—Backpressure, e.g. for ABR

Abstract

The present invention is directed to a method and system for dynamically adjusting the total bandwidth that an asynchronous transfer mode (ATM) switching system (105) can make available to Available Bit Rate (ABR) virtual circuits by determining the total bandwidth allocated to the inactive ABR virtual circuits in the switching system (105), and making available the bandwidth allocated to the inactive ABR virtual circuits to the active ABR virtual circuits in the switching system (105). When transmission of cells resumes for an inactive ABR virtual circuit, the switching system allocates new bandwidth to the virtual circuit. Furthermore, the switching system (105) dynamically adjusts the total bandwidth that the switching system (105) can make available to ABR virtual circuits by recomputing, at fixed time intervals, the total bandwidth that is available to the active ABR virtual circuits that are bottlenecked at the switching system (105).
PCT/US1998/000781 1997-01-14 1998-01-14 Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems WO1998031156A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
AU59193/98A AU5919398A (en) 1997-01-14 1998-01-14 Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems
JP10531275A JP2000508500A (en) 1997-01-14 1998-01-14 Dynamic bandwidth allocation method and system in ATM switching system
EP98902565A EP0960513A2 (en) 1997-01-14 1998-01-14 Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems
CA002278317A CA2278317A1 (en) 1997-01-14 1998-01-14 Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3533497P 1997-01-14 1997-01-14
US60/035,334 1997-01-14

Publications (2)

Publication Number Publication Date
WO1998031156A2 WO1998031156A2 (en) 1998-07-16
WO1998031156A3 true WO1998031156A3 (en) 1998-11-12

Family

ID=21882013

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1998/000781 WO1998031156A2 (en) 1997-01-14 1998-01-14 Method and system for dynamic allocation of bandwidth in asynchronous transfer mode (atm) switching systems

Country Status (6)

Country Link
EP (1) EP0960513A2 (en)
JP (1) JP2000508500A (en)
KR (1) KR20000070154A (en)
AU (1) AU5919398A (en)
CA (1) CA2278317A1 (en)
WO (1) WO1998031156A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101622900B (en) 2007-08-28 2012-12-26 松下电器产业株式会社 Network control device, method, and program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396494A (en) * 1991-07-01 1995-03-07 At&T Corp. Method for operating an asynchronous packet bus for transmission of asynchronous and isochronous information
US5448567A (en) * 1993-07-27 1995-09-05 Nec Research Institute, Inc. Control architecture for ATM networks

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2104753C (en) * 1992-10-29 1999-02-16 Kotikalapudi Sriram Bandwidth allocation, transmission scheduling, and congestion avoidance in broadband atm networks
US5541912A (en) * 1994-10-04 1996-07-30 At&T Corp. Dynamic queue length thresholds in a shared memory ATM switch
US5559798A (en) * 1995-04-19 1996-09-24 Lucent Technologies Inc. Data segmentation within a renegotiated bit-rate service transmission system
GB2337895B (en) * 1995-06-05 2000-01-19 Fujitsu Ltd Detecting congestion in ATM networks
KR0146764B1 (en) * 1995-07-29 1998-08-17 양승택 Equipment and method for control of abr service by managing buffer using multi stage critical value

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5396494A (en) * 1991-07-01 1995-03-07 At&T Corp. Method for operating an asynchronous packet bus for transmission of asynchronous and isochronous information
US5448567A (en) * 1993-07-27 1995-09-05 Nec Research Institute, Inc. Control architecture for ATM networks

Also Published As

Publication number Publication date
JP2000508500A (en) 2000-07-04
CA2278317A1 (en) 1998-07-16
WO1998031156A2 (en) 1998-07-16
KR20000070154A (en) 2000-11-25
AU5919398A (en) 1998-08-03
EP0960513A2 (en) 1999-12-01

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