WO1998029813A1

WO1998029813A1 - Method for ensuring the safety of a security module, and related security module

Info

Publication number: WO1998029813A1
Application number: PCT/FR1997/002389
Authority: WO
Inventors: Michel Hazard
Original assignee: Bull Cp8
Priority date: 1996-12-31
Filing date: 1997-12-23
Publication date: 1998-07-09
Also published as: CA2247475A1; BR9707881A; KR19990087418A; AU5668398A; TW405098B; AR009852A1; EP0891587A1; CN1212770A; FR2757972A1; JPH11505055A; NO983960D0; FR2757972B1; NO983960L

Abstract

The invention concerns a method for ensuring the safety of a security module (8) designed for co-operating with a data processing device (1), said module being arranged for executing a set of operations including at least a sensitive operation (23). The invention is characterised in that the method comprises the following steps consisting in: executing, for each execution of the sensitive operation and upstream of it, a first sequence of supplementary operations (22) for activating signalling means and, downstream of said sensitive operation, a second set of supplementary operations (24) for deactivating said signalling means; verifying, for each execution of the sensitive operation and upstream of the first sequence of supplementary operations (22), whether the signalling means are deactivated; if the signalling means are activated, inhibiting the execution of the sensitive operation.

Description

Method for securing a security module, and associated security module

The invention relates to a method for securing a security module arranged to cooperate with an information processing device, the module comprising information processing means and information storage means and being arranged to execute a set of operations including at least one sensitive operation. The term “sensitive operation” is understood to mean any operation the execution of which has significant repercussions on: - security in general: with regard in particular to any operation aimed at verifying the clearance of a person vis-à-vis regarding access to certain information, services or functions;

- the application concerned in particular: with regard in particular to any operation aimed at defining or modifying certain parameters characterizing the fundamental rights and obligations of a user vis-à-vis this application (for example, for a banking application, a operation to update an account balance).

The term "security module" must be taken, either in its classic sense in which it designates a device intended, in a communication or information network, to be owned by an organization supervising the network and to be stored in a protected manner secret and fundamental parameters of the network such as cryptographic keys, that is to say more simply designating a device assigned to various users of the network and allowing each of them to have access to it, this latter device also being capable of hold secret parameters. The security module may take the form of a portable object of the smart card type.

The problem which the invention aims to solve is to prevent an interruption of the sensitive operation in progress from occurring, or at least to control the number of interruptions likely to occur. The invention relates in particular to fraudulent interruptions, without however excluding accidental interruptions. The risk is that operations aimed at securing the execution of said set of operations, do not execute. With regard, for example, to a program for testing a confidential code presented by a user, it is the operation of writing the result of the comparison, which aims to limit the number of authorized tests. If the fraudster manages to stop the program after comparison but before writing his result, he can repeat a large number of times the operation of presentation of a new confidential code, and possibly take advantage of the observation of electrical signals present at the terminals of the safety module, signals which are in practice always influenced by the nature of the calculation or result. By means of the fraudster's storage of a large number of such observations and a statistical analysis, the latter may possibly be able to identify the correct confidential code of the user.

This problem is solved according to the invention by providing measures allowing the security module to check whether the sensitive operation or the sensitive operations previously triggered have been executed in full or not and, if not, to prohibit the execution of the sensitive operation to come.

More specifically, the method according to the invention comprises the steps consisting in: executing, on the occasion of each execution of the sensitive operation and upstream of it, a first additional sequence of operations intended to activate means signaling and, downstream of said sensitive operation, a second additional sequence of operations intended to deactivate said signaling means; -accounting for each interrupted test for which the sensitive operation was triggered but not executed, so that the signaling means were first activated but were not subsequently deactivated, so as to define a number of tests interrupted found N _RS ;

-define an authorized number of interrupted tests N _RSA ; -comparing, on the occasion of each execution of the sensitive operation and upstream thereof, said number of interrupted tests found N _{RS to} said number of interrupted tests authorized N _RSA ; and prohibit, in the event that said number of interrupted tests found N _RS is greater than said number of interrupted tests authorized N _RSA , the execution of the sensitive operation.

The invention also relates to a security module designed to implement this method.

Other details and advantages of the present invention will appear during the following description of a preferred but non-limiting embodiment, with regard to the appended drawings in which: FIG. 1 is the diagram of a security module to which is intended for the invention, cooperating with an information processing device;

FIG. 2 is a flowchart of execution of a sensitive operation; and FIGS. 3a to 3c and 4a, 4b represent the state of a counter for breaks in the C _RS sequence at different times, during the execution of one or more sensitive operations.

The information processing device 1 shown in FIG. 1 comprises in a manner known per se a microprocessor 2 to which are connected a ROM memory 3, and a RAM memory 4, means 5 for cooperating with a security module 8, and a transmission interface 7 allowing the information processing device to communicate with another similar device, either directly or through a communication network.

The device 1 can also be equipped with storage means such as floppy disks or removable or non-removable discs, input means (such as a keyboard and / or a pointing device of the mouse type) and display means, these different means not being shown in FIG. 1.

The information processing device can be constituted by any computer device installed on a private or public site and capable of providing means of information management or delivery of various goods or services, this device being permanently installed or portable. It can in particular also be a telecommunications device. Furthermore, the security module 8 includes information processing means 9, an associated non-volatile memory 10, and means 13 for cooperating with the information processing device. This module is arranged to define, in the memory 10, a secret zone 11 in which information once recorded, is inaccessible from outside the module but only accessible to the processing means 9, and a free zone 12 which is accessible from outside the module for reading and / or writing information. Each memory zone can include a non-erasable part ROM and an erasable part EPROM, EEPROM, or made up of RAM memory of the "flash" type, that is to say having the characteristics of an EEPROM memory with further times identical to those of a conventional RAM. A volatile memory RAM, not shown, is also provided.

As a security module 8, it is possible in particular to use a microprocessor with self-programmable non-volatile memory, as described in American patent n ° 4,382,279 in the name of the Applicant. As indicated on page 1, line 5 to 17 of this patent, the self-programmable nature of the memory corresponds to the possibility for a program fi located in this memory, to modify another program fj also located in this memory into a program gj. Although the means to be used to carry out this self-programming can vary according to the technique used to design the information processing means 9, it is recalled that, in the case where these processing means are constituted by a microprocessor associated with a non-volatile memory and according to the aforementioned patent, these means can include:

- data and address buffers, associated with the memory

a program for writing into the memory, loaded into the latter and containing in particular the instructions allowing the maintenance on the one hand of the programming voltage of the memory, and on the other hand of the data to be written and their addresses, for a sufficient time, this writing program can however be replaced by a writing automaton with logic circuits. In a variant, the microprocessor of the security module 8 is replaced - or at least supplemented - by logic circuits implanted in a semiconductor chip. Indeed, such circuits are capable of carrying out calculations, in particular of authentication and signature, thanks to wired, and not microprogrammed, electronics. They can in particular be of the ASIC type (from the English “Application Specifies Integrated Circuit”). By way of example, mention may be made of the component of the company SIEMENS marketed under the reference SLE

4436 and that of the company SGS-THOMSON marketed under the reference ST

1335.

Advantageously, the security module 8 will be designed in monolithic form on a single chip.

As an alternative to the self-programming non-volatile memory microprocessor described above, the security nature of the security module may result from its location in a tamper-proof enclosure.

The aforementioned signaling means comprise at least one C _RS sequence break counter arranged to count sequence breaks occurring during the execution of the sensitive operation, that is to say interruptions occurring in the execution, step by step, of this operation. This counter is incorporated into the information processing means 9 of the security module 8. According to the method of FIG. 2, there are two reference numbers, namely a number of observed sequence breaks N _RS and a number of breaks authorized sequence N _RS A, the first corresponding to the number of sequence breaks which have occurred in the execution of a sensitive operation determined since a determined time, and the second corresponding to the maximum number of sequence breaks which can occur without causing a blockage of the security module. Typically, the instant from which the number of N _RS sequence breaks is calculated corresponds to a first commissioning of the security module by a user for whom it is intended, the number N _RS counting any break of sequence intervened from this moment until a determined day. As for the number of authorized sequence breaks N _RSA , it is determined by an authority so as to take into account sequence breaks resulting, not from a fraudulent act, but from operating anomalies of the security module likely to intervene spontaneously over its entire lifetime. Naturally, N _RS A should be chosen small, otherwise a fraudster would benefit from a comfortable number of attempts to try to violate the security module. For example, N _RSA will be less than twenty, in particular less than ten.

At an entry in the flow diagram for executing the sensitive operation, a first step 21 consists in checking whether the number of sequence breaks N _RS is much less than or equal to the number of sequence breaks authorized N _RSA - If not , a sequence break is brought about to prohibit the execution of the sensitive operation: this interruption may be either final in that it will prevent any subsequent execution of this sensitive operation, or even in that it will block any subsequent operation of the security module, whatever the operation envisaged, is provisional if it is foreseen that the sensitive operation may be executed again in the future after a reset of the number of N _RS sequence breaks by an authorized authority. On the other hand, if the number of sequence breaks N _RS is much less than or equal to the number of sequence breaks authorized N _RSA -, a second step 22 consists in incrementing the sequence break counter C _RS by one unit. The next step is to perform the sensitive operation itself. If this operation has taken place in full, that is to say without an accidental or fraudulent break in the sequence having occurred, the sequence break counter C _RS is then decremented by one unit in step 24 , so as to recover the value it had before the start of the sensitive operation.

As a variant, the operation 21 for testing the value of the number of sequence breaks N _RS may be performed after that 22 of incrementing the sequence break counter C _RS by one unit. FIGS. 3a to 3c show successive states taken by the C _RS sequence break counter, prior to the execution of a sensitive operation to be protected. This counter consists of a cyclic file with several positions

(at least three), each position being materialized by at least one memory cell. In this example, the number of positions is equal to eight, numbered from 1 to 8. In each position, a value of the number of breaks in sequence N _RS is stored, except in one position (here position 5) which is blank because containing no value. Any blank position is marked with the symbol 0.

FIG. 3a represents the state of the counter upstream of step 22 of the flow diagram of FIG. 2. The position located above the blank position (here position 4) stores a current value N _RS corresponding to a current value of the counter, while the six positions 3 to 1 then 8 to 6 respectively store different values, taken successively by going back in time, namely N _RS +1 for position 3, N _RS for position 2 .. etc..up to N _RS -2 for the oldest position 6, these positions corresponding to a certain number of successive sensitive operations.

We can see that positions 2 to 4 correspond to the following events:

position 2: state of the counter before step 22 of FIG. 2;

-position 3: state of the counter just after step 22 (addition of a unit);

-position 4: state of the counter just after step 24 (removal of a unit), which shows that no sequence interruption, voluntary or accidental, occurred during this execution of the sensitive operation.

On the other hand, it can be seen that positions 7 and 8 correspond to the following events, relating to a previous execution of sensitive operation: -position 7: state of the counter before step 22 of FIG. 2;

-position 8: state of the counter just after step 22 (addition of a unit);

- knowing that the following position 1 does not correspond to a withdrawal of a unit with respect to position 8 (that is to say N _RS -1), it must be concluded from this that a rupture of Sequence, voluntary or accidental, actually intervened during this execution of the sensitive operation, so that the normally scheduled step 24 was not executed. In conclusion, a new recording of a counter value was not carried out since this value has not changed.

As for position 6, it corresponds to the state of the counter just before step 24, during an execution of an even older sensitive operation. Indeed, the value it contains corresponds to that of position 7, increased by one.

Returning to the sensitive operation in progress, FIG. 3b shows the state of the sequence break counter in a preliminary execution phase of step 22 of the flow diagram of FIG. 2. The processing means information 9 from the security module erased the position 6 located below the blank position 5, thus defining a new blank position. In FIG. 3c, the information processing means 9 have executed step 22 of FIG. 2 by adding a unit to the current value N _RS of position 4 and by storing the result N _RS +1 in the position next 5.

FIGS. 4a and 4b show successive states taken by the sequence break counter C _RS , downstream of the execution of the sensitive operation 23 of FIG. 2. FIG. 4a shows the state of the sequence break counter in a preliminary phase of execution of step 24 of FIG. 2. The information processing means 9 of the security module have erased the position 7 located below the new blank position 6. In FIG. 4b, the information processing means 9 executed step 24 of FIG. 2 by subtracting a unit from the current value N _RS +1 from position 5 and by storing the result N _RS in position next 6.

It will be noted, in the example of FIGS. 2 to 4b, that the signaling function is advantageously nested with that of counting the sequence breaks using a single device: the C _RS sequence break counter.

Advantageously, the steps 21, 22 and 24 of incrementation and decrementation of the counter can be conceived as subroutines of a main program constituted by the sensitive operation itself. In this case, a reference or address of the counter is entered as a parameter when the subroutine is called. This mode of operation adds flexibility in the implementation of sequences of operations.

In the case where one wishes to secure several distinct sensitive operations and intended to be executed independently of one another, one can define as many C _RS sequence break counters as there are operations, each one verifying the correct execution of an operation sensitive determined. However, according to a preferred mode, only one common counter is defined, which will be incremented, and in principle decremented, during the execution of any of these sensitive operations. This observation also applies to the case where the counter is replaced by a flag.

An important concern of the invention is that the security procedure described does not result in slowing down, or even blocking the operation of the security module, due to the inevitable accidental interruptions which are observed throughout the operating period of this, relating not only to sensitive operations but also to ordinary operations, such as those relating to the application concerned (financial application, service provision, etc.), the non-execution of which does not affect security in general, nor the fundamental rights and obligations of the user in the application concerned. Indeed, the large number of operations thus secured would risk increasing consequently the number of accidental interruptions noted: the number of authorized sequence breaks N _RSA would then be reached more quickly, so that a partial or total blocking of the security module would also intervene more quickly. This remarkable result is obtained according to the invention by applying the security procedure described only to operations which actually correspond to sensitive operations.

An improvement of the invention consists in that the authorized number of interrupted tests N _RSA includes a random number varying each time that a determined number of sensitive operations have been triggered. Thus, the number N _RSA varies at a determined frequency, but it takes successive values which are not foreseeable, which contributes to disturb any fraudulent observation of the behavior of the security module. This random number can advantageously be generated in the security module according to one of the software methods described in American patents N ° 5,177,790 or 5,365,466. According to a variant, the authorized number of interrupted trials N _RSA is composed of a fixed number to which is added a random number.

Claims

claims

1. Method for securing a security module (8) arranged to cooperate with an information processing device (1), the module comprising information processing means (9,2) and means for memorizing information (10; 3,4), and being arranged to execute a set of operations including at least one sensitive operation (23), characterized in that it comprises the steps consisting in:

-execute, on the occasion of each execution of the sensitive operation and upstream thereof, a first additional sequence of operations (22) intended to activate signaling means and, downstream of said sensitive operation, a second additional sequence of operations (24) for deactivating said signaling means;

-accounting for each interrupted test for which the sensitive operation was triggered but not executed, so that the signaling means were first activated but were not subsequently deactivated, so as to define a number of tests interrupted found N _RS ;

-define an authorized number of interrupted tests N _RSA ; -comparing, on the occasion of each execution of the sensitive operation and upstream thereof, said number of interrupted tests found N _{RS to} said number of interrupted tests authorized N _RSA ; and

prohibit, in the event that said number of interrupted tests found N _RS is greater than said number of interrupted tests authorized N _RSA , the execution of the sensitive operation.

2. Method according to claim 1, in which, to account for each interrupted test, a counter is incremented by one unit at the time of each execution of the sensitive operation and upstream thereof and, in the case where the sensitive operation has been executed, the counter is decremented by one unit downstream of the sensitive operation.

3. Method according to claim 1, in which said authorized number of interrupted tests N _RSA includes a random number varying each time that the sensitive operation (33) has been triggered a predetermined number of times.

4. Method according to claim 1, in which the security module (8) is arranged to execute several distinct sensitive operations (33) and one counts, by means of the same number of interrupted tests found N _RS , each interrupted test relating to any of these sensitive operations.

5. Security module (8) arranged to cooperate with an information processing device (1) and comprising information processing means (9,2) and information storage means (10; 3,4), and being arranged to execute a set of operations including at least one sensitive operation (23), characterized in that it comprises: - signaling means arranged to assume a state in which they are activated upstream of a sensitive operation to be protected, and another state in which they are deactivated after the sensitive operation if it has been executed

counting means for counting each interrupted test for which the sensitive operation was triggered but not executed, so that the signaling means were first activated but were not then deactivated, so as to define a number of interrupted tests noted N _RS , said information storage means (10; 3,4) storing an authorized number of interrupted tests N _RSA ; comparison means for comparing, on the occasion of each execution of the sensitive operation and upstream thereof, said number of interrupted tests found N _{RS to} said number of interrupted tests authorized N _RSA ; and

means of prohibition to prohibit, in the event that said number of interrupted tests found N _RS is greater than said number of interrupted tests authorized N _RSA , the execution of the sensitive operation.

6. Security module according to claim 5, in which said signaling and counting means comprise a counter arranged to be incremented by one on the occasion of each execution of the sensitive operation and upstream of it and, in the case where the sensitive operation has been executed, to be decremented by one unit downstream of the sensitive operation.