WO1998027685B1 - Optimized security functionality in an electronic system - Google Patents
Optimized security functionality in an electronic systemInfo
- Publication number
- WO1998027685B1 WO1998027685B1 PCT/US1997/021900 US9721900W WO9827685B1 WO 1998027685 B1 WO1998027685 B1 WO 1998027685B1 US 9721900 W US9721900 W US 9721900W WO 9827685 B1 WO9827685 B1 WO 9827685B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- chipset
- cryptographic
- bus
- information
- bulk
- Prior art date
Links
- 230000002093 peripheral Effects 0.000 claims 6
Abstract
The electronic system (300) includes a host processor (305), a chipset (315), a main memory (310), and a cryptographic unit (335). The electronic system (300) also includes a host bus (320), a memory bus (325), and a bus (330). The cryptographic unit (335) includes circuitry to control and to manage bulk cryptographic operations that are performed by the chipset (315) using secret keys and/or session keys.
Claims
1. A system comprising: a bus; a cryptographic unit coupled to the bus, the cryptographic unit to provide information in an encrypted format; and a chipset coupled to the bus, the chipset including dedicated circuitry to decrypt the information provided by the cryptographic unit and to perform a bulk cryptographic operation on incoming data using at least a portion of the information provided by the cryptographic unit.
2. The system according to claim 1, wherein the cryptographic unit includes an internal bus; a processing unit coupled to the internal bus; and a non-volatile memory element coupled to the internal bus, the non-volatile memory element to contain at least a secret key.
3. The system according to claim 2, wherein the cryptographic unit further includes a random number generator.
4. The system according to claim 1, wherein the dedicated circuitry includes (i) a cryptographic engine and (ii) a storage element to contain a secret key identical to a secret key contained in the cryptographic unit.
5. A system comprising: memory means for storing information; bus means for transferring the information; circuit means for performing a bulk cryptographic operation on the information, said circuit means being connected to the memory means and the bus means; and cryptographic means for providing key information in an encrypted format to said circuit means to enable said circuit means to perform the bulk cryptographic operation, said cryptographic means being connected to the bus means.
-22-
6. A system comprising: a bus; a chipset coupled to the bus, the chipset including dedicated circuitry to perform a bulk cryptographic operation and to contain a secret key; and a cryptographic unit coupled to the bus, the cryptographic unit establishes a cryptographically secure communication link with the chipset and provides information to the chipset so that the chipset is able to perform the bulk cryptographic operation, the cryptographic unit includes a processing unit and a non-volatile memory element to contain at least the secret key.
7. The system according to claim 6, wherein the dedicated circuitry of the chipset includes a cryptographic engine coupled to the bus; and a first storage element coupled to the cryptographic engine, the first storage element to contain the secret key.
8. The system according to claim 7, wherein the dedicated circuitry of the chipset further includes a second storage element coupled to the cryptographic engine, the second storage element to contain at least one session key produced by the cryptographic unit for use by the chipset during the bulk cryptographic operation.
9. The system according to claim 8, wherein the second storage element operates as cache memory including a plurality of storage entries, each storage entry to contain a session key, addressing information, and priority information pertaining to the session key.
10. An electronic system comprising: means for storing data in a non-encrypted format; peripheral means for storing the data in an encrypted format; chipset means for interconnecting the memory means to the peripheral means and for performing a bulk cryptographic operation on incoming data transmitted through the chipset means by one of the means for storing and peripheral means; and processor means for establishing a cryptographically secure communication link with the chipset means and for providing information to the chipset means to enable the chipset means to perform the bulk cryptographic operation.
11. An electronic system comprising: a memory element; a bus; at least one peripheral device coupled to the bus, the at least one peripheral device including a transceiver to transmit information and to receive information; a cryptographic unit coupled to the bus, the cryptographic unit to output control information in an encrypted format; and a chipset coupled to the bus and the memory element, the chipset including dedicated circuitry to decrypt the control information and to perform a bulk cryptographic operation on the information using at least a portion of the control information.
12. A method of decrypting data stored in an encrypted format within an electronic system, possessing partitioned cryptographic functionality, including a chipset having dedicated circuitry to perform a bulk cryptographic operation and circuitry to control the chipset, comprising the steps of: transferring a header of a message to the circuitry, the header including a session key; decrypting the header within the circuitry to obtain the session key; encrypting the session key with a shared secret key, loaded in both the chipset and the circuitry, to produce a control message; transferring the control message from the circuitry to the chipset; decrypting the control message within the chipset using the shared secret key previously loaded in the chipset; and storing the session key within the chipset for use in performing the bulk cryptographic operation.
13. A method of encrypting data before storage in a mass storage device of an electronic system, possessing partitioned cryptographic functionality, including a chipset having dedicated circuitry to perform a bulk cryptographic operation and circuitry to control the chipset, comprising the steps of: transferring a request to the circuitry requesting preparation for transfer of data contained in main memory to the mass storage device;
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AMENDED SHEET (ARTICLE 18) generating a session key internally within the circuitry; encrypting the session key with a shared secret key previously loaded in both the chipset and the circuitry to produce a control message; transferring the control message to the chipset; decrypting the control message with the shared secret key loaded in the chipset; storing the session key within the chipset; and encrypting data transferred from the main memory to the mass storage device as the data propagates through the chipset.
14. A system comprising: a bus; a host processor coupled to the bus, the host processor to output information in an encrypted format; and a chipset coupled to the bus, the chipset including dedicated circuitry to decrypt the information provided by the host processor and to perform a bulk cryptographic operation on incoming data using the information provided to the host processor.
15. The system according to claim 14, wherein the host processor includes circuitry implemented for controlling the chipset in performing the bulk cryptographic operation.
16. The system according to claim 14, wherein the host processor is executing software to control the chipset in performing the bulk cryptographic operation.
17. The electronic system of claim 11, wherein the at least one peripheral device includes one of a compact disk read only memory (CD ROM) player, a compact disk (CD) recordable player, a digital tape drive, a hard disk drive, a digital video disk (DVD) player, a modem and a network interface circuit (NIC) card.
18. A chipset comprising: a first storage element for containing at least one key; and a cryptographic engine for performing bulk cryptographic operations on incoming information using the key.
-25-
AMΓé¼NDED SHEET (ARTICLE 19)
19. The chipset of claim 18, wherein the bulk cryptographic operations performed by the cryptographic engine are hashing operations producing a hash result being lesser in bit size than the incoming information.
20. The chipset of claim 18 further comprising a cryptographic unit for providing control information to the chipset to perform the bulk cryptographic operations.
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Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9913962A GB2336080B (en) | 1996-12-18 | 1997-11-25 | Optimized security functionality in an electronic system |
| AU59565/98A AU5956598A (en) | 1996-12-18 | 1997-11-25 | Optimized security functionality in an electronic system |
| DE19782199T DE19782199T1 (en) | 1996-12-18 | 1997-11-25 | Optimized security functionality in an electronic system |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/768,674 | 1996-12-18 | ||
| US08/768,674 US5818939A (en) | 1996-12-18 | 1996-12-18 | Optimized security functionality in an electronic system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO1998027685A1 WO1998027685A1 (en) | 1998-06-25 |
| WO1998027685B1 true WO1998027685B1 (en) | 1998-07-23 |
Family
ID=25083169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1997/021900 WO1998027685A1 (en) | 1996-12-18 | 1997-11-25 | Optimized security functionality in an electronic system |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US5818939A (en) |
| AU (1) | AU5956598A (en) |
| DE (1) | DE19782199T1 (en) |
| GB (1) | GB2336080B (en) |
| TW (1) | TW344051B (en) |
| WO (1) | WO1998027685A1 (en) |
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| CA1004362A (en) * | 1972-04-11 | 1977-01-25 | Gretag Aktiengesellschaft | System for the individual identification of a plurality of individuals |
| FR2311360A1 (en) * | 1975-05-13 | 1976-12-10 | Innovation Ste Int | SYSTEM FOR STORING DATA CONFIDENTIALLY BY MEANS OF PORTABLE ELECTRONIC OBJECTS INCLUDING A CONFIDENTIAL CODE ERROR MEMORIZATION CIRCUIT |
| FR2392447A1 (en) * | 1977-05-26 | 1978-12-22 | Cii Honeywell Bull | INFORMATION PROCESSING SYSTEM PROTECTING THE SECRET OF CONFIDENTIAL INFORMATION |
| FR2394131A1 (en) * | 1977-06-07 | 1979-01-05 | Cii Honeywell Bull | INFORMATION PROCESSING SYSTEM PROTECTING THE SECRET OF CONFIDENTIAL INFORMATION |
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| FR2477344B1 (en) * | 1980-03-03 | 1986-09-19 | Bull Sa | METHOD AND SYSTEM FOR TRANSMITTING CONFIDENTIAL INFORMATION |
| FR2480539B1 (en) * | 1980-04-09 | 1985-09-13 | Cii Honeywell Bull | METHOD AND SYSTEM FOR TRANSMITTING SIGNED MESSAGES |
| FR2514593B1 (en) * | 1981-10-09 | 1986-12-26 | Bull Sa | METHOD AND DEVICE FOR AUTHENTICATING THE SIGNATURE OF A SIGNED MESSAGE |
| FR2526977B1 (en) * | 1982-05-14 | 1988-06-10 | Cii Honeywell Bull | METHOD AND DEVICE FOR AUTHENTICATING OR CERTIFYING AT LEAST INFORMATION CONTAINED IN A MEMORY OF AN ELECTRONIC MEDIUM IN PARTICULAR REMOVABLE AND PORTABLE SUCH AS A CARD |
| US4578531A (en) * | 1982-06-09 | 1986-03-25 | At&T Bell Laboratories | Encryption system key distribution method and apparatus |
| FR2530053B1 (en) * | 1982-07-08 | 1986-04-25 | Bull Sa | METHOD FOR CERTIFYING THE SOURCE OF AT LEAST ONE INFORMATION RECORDED IN A MEMORY OF A FIRST ELECTRONIC DEVICE AND TRANSMITTED TO A SECOND ELECTRONIC DEVICE, AND SYSTEM FOR IMPLEMENTING SUCH A METHOD |
| US4558176A (en) * | 1982-09-20 | 1985-12-10 | Arnold Mark G | Computer systems to inhibit unauthorized copying, unauthorized usage, and automated cracking of protected software |
| US4658093A (en) * | 1983-07-11 | 1987-04-14 | Hellman Martin E | Software distribution system |
| FR2592510B1 (en) * | 1985-12-31 | 1988-02-12 | Bull Cp8 | METHOD AND APPARATUS FOR CERTIFYING SERVICES OBTAINED USING A PORTABLE MEDIUM SUCH AS A MEMORY CARD |
| US5020105A (en) * | 1986-06-16 | 1991-05-28 | Applied Information Technologies Corporation | Field initialized authentication system for protective security of electronic information networks |
| FR2600189B1 (en) * | 1986-06-16 | 1991-02-01 | Bull Cp8 | PROCESS FOR AUTHENTICATING BY AN EXTERNAL ENVIRONMENT A PORTABLE OBJECT SUCH AS A MEMORY CARD COUPLED TO THIS ENVIRONMENT |
| FR2601535B1 (en) * | 1986-07-11 | 1988-10-21 | Bull Cp8 | METHOD FOR CERTIFYING THE AUTHENTICITY OF DATA EXCHANGED BETWEEN TWO DEVICES CONNECTED LOCALLY OR REMOTELY THROUGH A TRANSMISSION LINE |
| FR2601795B1 (en) * | 1986-07-17 | 1988-10-07 | Bull Cp8 | METHOD FOR DIVERSIFYING A BASE KEY AND FOR AUTHENTICATING A KEY THUS DIVERSIFIED AS HAVING BEEN PREPARED FROM A PREDETERMINED BASE KEY, AND SYSTEM FOR IMPLEMENTING IT |
| FR2618002B1 (en) * | 1987-07-10 | 1991-07-05 | Schlumberger Ind Sa | METHOD AND SYSTEM FOR AUTHENTICATING ELECTRONIC MEMORY CARDS |
| US5218637A (en) * | 1987-09-07 | 1993-06-08 | L'etat Francais Represente Par Le Ministre Des Postes, Des Telecommunications Et De L'espace | Method of transferring a secret, by the exchange of two certificates between two microcomputers which establish reciprocal authorization |
| US5214702A (en) * | 1988-02-12 | 1993-05-25 | Fischer Addison M | Public key/signature cryptosystem with enhanced digital signature certification |
| US4962532A (en) * | 1988-12-22 | 1990-10-09 | Ibm Corporation | Method for providing notification of classified electronic message delivery restriction |
| US5191611A (en) * | 1989-04-03 | 1993-03-02 | Lang Gerald S | Method and apparatus for protecting material on storage media and for transferring material on storage media to various recipients |
| US5144667A (en) * | 1990-12-20 | 1992-09-01 | Delco Electronics Corporation | Method of secure remote access |
| US5142579A (en) * | 1991-01-29 | 1992-08-25 | Anderson Walter M | Public key cryptographic system and method |
| US5231666A (en) * | 1992-04-20 | 1993-07-27 | International Business Machines Corporation | Cryptographic method for updating financial records |
| US5499295A (en) * | 1993-08-31 | 1996-03-12 | Ericsson Inc. | Method and apparatus for feature authorization and software copy protection in RF communications devices |
| US5371794A (en) * | 1993-11-02 | 1994-12-06 | Sun Microsystems, Inc. | Method and apparatus for privacy and authentication in wireless networks |
| US5483596A (en) * | 1994-01-24 | 1996-01-09 | Paralon Technologies, Inc. | Apparatus and method for controlling access to and interconnection of computer system resources |
| US5495533A (en) * | 1994-04-29 | 1996-02-27 | International Business Machines Corporation | Personal key archive |
| US5805706A (en) * | 1996-04-17 | 1998-09-08 | Intel Corporation | Apparatus and method for re-encrypting data without unsecured exposure of its non-encrypted format |
| US5473692A (en) * | 1994-09-07 | 1995-12-05 | Intel Corporation | Roving software license for a hardware agent |
| US5539828A (en) * | 1994-05-31 | 1996-07-23 | Intel Corporation | Apparatus and method for providing secured communications |
| US5615264A (en) * | 1995-06-08 | 1997-03-25 | Wave Systems Corp. | Encrypted data package record for use in remote transaction metered data system |
| US5799091A (en) * | 1996-05-24 | 1998-08-25 | Lsi Logic Corporation | Single chip solution for multimedia GSM mobile station systems |
| US5796830A (en) * | 1996-07-29 | 1998-08-18 | International Business Machines Corporation | Interoperable cryptographic key recovery system |
-
1996
- 1996-12-18 US US08/768,674 patent/US5818939A/en not_active Expired - Lifetime
-
1997
- 1997-11-25 AU AU59565/98A patent/AU5956598A/en not_active Abandoned
- 1997-11-25 GB GB9913962A patent/GB2336080B/en not_active Expired - Fee Related
- 1997-11-25 DE DE19782199T patent/DE19782199T1/en not_active Ceased
- 1997-11-25 WO PCT/US1997/021900 patent/WO1998027685A1/en active Application Filing
- 1997-12-18 TW TW086119214A patent/TW344051B/en not_active IP Right Cessation
-
1998
- 1998-05-18 US US09/080,742 patent/US6115816A/en not_active Expired - Lifetime
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