WO1998016883B1 - Electronic data processing circuit - Google Patents
Electronic data processing circuitInfo
- Publication number
- WO1998016883B1 WO1998016883B1 PCT/DE1997/002070 DE9702070W WO9816883B1 WO 1998016883 B1 WO1998016883 B1 WO 1998016883B1 DE 9702070 W DE9702070 W DE 9702070W WO 9816883 B1 WO9816883 B1 WO 9816883B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- processing circuit
- data processing
- electronic data
- circuit according
- encryption
- Prior art date
Links
- 230000003993 interaction Effects 0.000 claims 1
- 230000004075 alteration Effects 0.000 abstract 1
Abstract
The invention concerns an electronic data processing circuit having an operating module (1, 101), such as for example a microprocessor, with at least one data memory (2, 3, 4, 5, 102, 103, 104, 105) and with a data bus (106) extending between a data memory (2, 3, 4, 5, 102, 103, 104, 105) and the operating module (1, 101). With electronic data processing circuits of the type in question the memory frequently contains information to which access should be limited as far as possible. Therefore it is necessary to take security measures to guard against manipulation of the electronic data processing circuit. Consequently the object of the invention is to produce an electronic data processing circuit of the type in question which affords better protection against undesired alterations. According to the invention, this object is achieved by an electronic data processing circuit of the type in question in which at least one coding module (20, 21, 22, 35, 107) is provided in the region between the data memory (2, 3, 4, 5, 102, 103, 104, 105) and the data bus and/or in the region between the operating module (1, 101) and the data bus. The coding module (20, 21, 22, 35, 107) is designed such that data traffic between the operating module (1, 101) and the data bus or between the data memory (2, 3, 4, 5, 102, 103, 104, 105) and the data bus (106) can be coded and/or decoded.
Claims
23 23
GEÄNDERTE ANSPRÜCHECHANGED CLAIMS
[beim Internationalen Büro am 17. April 1998 (17.04.98) eingegangen; ursprüngliche Ansprüche 1-17 durch neue Ansprüche 1-16 ersetzt (4 Seiten)][received at the International Bureau on April 17, 1998 (April 17, 1998); original claims 1-17 replaced by new claims 1-16 (4 pages)]
1. Elektronische Datenverarbeitungsschaltung mit einer Betriebsbaugruppe wie einem Mikroprozessor, mit wenigstens einem Datenspeicher und mit einem sich zwischen Datenspeicher und Betriebsbaugruppe erstreckendem Datenbus, dadurch gekennzeichnet, daß im Bereich mindestens einer die Betriebsbaugruppe (1) und wenigstens einen Datenspeicher (2, 3, 4, 5) verbindenden Datenleitung (7, 8, 34, 11) des Datenbus wenigstens zwei Verschlüsselungsbaugruppen (18, 19, 20, 21, 35) vorgesehen sind, wobei die Verschlüsselungsbaugruppen (18, 19, 20, 21, 35) so ausgebildet sind, daß eine vollständige Verschlüsselung bzw. Entschlüsselung durch das Zusammen- wirken der Verschlüsselungsbaugruppen (18, 19, 20, 21, 35) ausführbar ist.1. An electronic data processing circuit comprising an operating assembly such as a microprocessor, having at least one data memory and a data bus extending between data memory and operating assembly, characterized in that at least one of the operating assembly (1) and at least one data memory (2, 3, 4, 5) connecting data line (7, 8, 34, 11) of the data bus at least two encryption modules (18, 19, 20, 21, 35) are provided, wherein the encryption modules (18, 19, 20, 21, 35) are formed so that a complete encryption or decryption by the interaction of the encryption modules (18, 19, 20, 21, 35) is executable.
2. Elektronische Datenverarbeitungsschaltung nach Anspruch2. Electronic data processing circuit according to claim
1, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppen (18, 19, 20, 21, 35) an verschiedenen Orten der elektronischen Datenverarbeitungsschaltung angeordnet sind.1, characterized in that the encryption modules (18, 19, 20, 21, 35) are arranged at different locations of the electronic data processing circuit.
3. Elektronische Datenverarbeitungsschaltung nach Anspruch 1 oder Anspruch 2, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) so ausgebildet ist, daß der Datenverkehr mittels eines Ver- schlüsselungs-Algorithmus verschlüsselbar ist.3. An electronic data processing circuit according to claim 1 or claim 2, characterized in that the encryption module (20, 21, 22, 35, 107) is formed so that the data traffic by means of an encryption algorithm is encrypted.
4. Elektronische Datenverarbeitungsschaltung nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) so ausgebildet ist, daß der Datenverkehr mittels Hardware- Verschlüsselung verschlüsselbar ist.4. An electronic data processing circuit according to any one of claims 1 to 3, characterized in that the encryption module (20, 21, 22, 35, 107) is formed so that the data traffic by means of hardware encryption is encrypted.
GEÄNDERTESB TT ARTIKEL19
CHANGEDB TT ARTICLE19
. Elektronische Datenverarbeitungsschaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) so ausgebildet ist, daß die Wertigkeit einzelner Bits des Datenverkehrs selektiv änderbar ist., Electronic data processing circuit according to one of the preceding claims, characterized in that the encryption module (20, 21, 22, 35, 107) is designed such that the significance of individual bits of the data traffic is selectively changeable.
6. Elektronische Datenverarbeitungsschaltung nach Anspruch 5, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe wenigstens ein EXOR-Glied aufweist.6. An electronic data processing circuit according to claim 5, characterized in that the encryption module comprises at least one EXOR element.
7. Elektronische Datenverarbeitungsschaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) so ausgebildet ist, daß die Anschlußreihenfolge von Daten- leitungen des Datenbus selektiv änderbar ist.7. An electronic data processing circuit according to any one of the preceding claims, characterized in that the encryption module (20, 21, 22, 35, 107) is formed so that the connection order of data lines of the data bus is selectively changeable.
8. Elektronische Datenverarbeitungsschaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) so ausgebildet ist, daß der Datenverkehr wenigstens teilweise selektiv verzögerbar ist.8. An electronic data processing circuit according to any one of the preceding claims, characterized in that the encryption module (20, 21, 22, 35, 107) is formed so that the data traffic is at least partially selectively delayable.
9. Elektronische Datenverarbeitungsschaltung nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) wenigstens einen Eingang zur Eingabe wenigstens eines Schlüssels aufweist.9. An electronic data processing circuit according to any one of the preceding claims, characterized in that the encryption module (20, 21, 22, 35, 107) has at least one input for inputting at least one key.
10 . Elektronische Datenverarbeitungsschaltung nach Anspruch 9 ,
2510. An electronic data processing circuit according to claim 9, 25
dadurch gekennzeichnet, daß der bzw. die Schlüssel in einer Flash-Zelle der Datenver¬ arbeitungsschaltung abgelegt ist bzw. sind.characterized in that the or each key is stored in a flash cell of the movement of such data ¬ processing circuit or are.
11. Elektronische Datenverarbeitungsschaltung nach Anspruch 9 oder 10, dadurch gekennzeichnet, daß der Schlüssel in einer vergrabenen Struktur eines integrierten Bausteins zur Aufnahme der Datenverarbeitungs- schaltung abgelegt ist.11. An electronic data processing circuit according to claim 9 or 10, characterized in that the key is stored in a buried structure of an integrated module for receiving the data processing circuit.
12. Elektronische Datenverarbeitungsschaltung nach Anspruch 9 oder 10, dadurch gekennzeichnet, daß eine Sensorik zum Abtasten von Manipulationen des Orts, an dem der Schlüssel abgelegt ist, aufweist.12. An electronic data processing circuit according to claim 9 or 10, characterized in that a sensor for scanning manipulations of the location where the key is stored has.
13. Elektronische Datenverarbeitungsschaltung nach einem der Ansprüche 9 bis 12, dadurch gekennzeichnet, daß die Datenverarbeitungsschaltung so ausgebildet ist, daß bei Ausführung vorbestimmter Operationen durch die Betriebsbaugruppe ein Schlüssel in die Verschlüsselungsbaugruppe (20, 21, 22, 35, 107) eingebbar ist.13. An electronic data processing circuit according to any one of claims 9 to 12, characterized in that the data processing circuit is designed so that when executing predetermined operations by the operating assembly, a key in the encryption module (20, 21, 22, 35, 107) can be entered.
14. Elektronische Datenverarbeitungsschaltung nach einem der Ansprüche 9 bis 13, dadurch gekennzeichnet, daß ein Zufallsgenerator (28) vorgesehen ist, mit dem ein Schlüssel zufällig auswählbar ist.14. An electronic data processing circuit according to any one of claims 9 to 13, characterized in that a random number generator (28) is provided, with which a key is randomly selectable.
15. Elektronische Datenverarbeitungsschaltung nach einem der Ansprüche 9 bis 14, dadurch gekennzeichnet, daß eine Einrichtung (120) zum Ableiten eines Schlüssels aus einer in der Betriebsbaugruppe (101) verwendeten Adresse vorgesehen ist.
2615. An electronic data processing circuit according to any one of claims 9 to 14, characterized in that means (120) for deriving a key from an address used in the operating assembly (101) is provided. 26
16. Elektronische Datenverarbeitungsschaltung nach einem der Ansprüche 9 bis 14, dadurch gekennzeichnet, daß eine Zeitmessvorrichtung (26) vorgesehen ist, durch die ein Wechsel des Schlüssels einleitbar ist.
16. An electronic data processing circuit according to any one of claims 9 to 14, characterized in that a timing device (26) is provided, through which a change of the key can be introduced.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
UA99031798A UA52690C2 (en) | 1996-10-15 | 1997-09-15 | Electronic data processing circuit |
AT97944712T ATE486320T1 (en) | 1996-10-15 | 1997-09-15 | ELECTRONIC DATA PROCESSING CIRCUIT |
EP97944712A EP0932867B1 (en) | 1996-10-15 | 1997-09-15 | Electronic data processing circuit |
JP10517883A JP2000504137A (en) | 1996-10-15 | 1997-09-15 | Electronic data processing circuit |
BR9712529-6A BR9712529A (en) | 1996-10-15 | 1997-09-15 | Electronic data processing circuit |
DE59713047T DE59713047D1 (en) | 1996-10-15 | 1997-09-15 | ELECTRONIC DATA PROCESSING CIRCUIT |
US09/292,268 US6195752B1 (en) | 1996-10-15 | 1999-04-15 | Electronic data processing circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19642560.3 | 1996-10-15 | ||
DE19642560A DE19642560A1 (en) | 1996-10-15 | 1996-10-15 | Electronic data processing circuit |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/292,268 Continuation US6195752B1 (en) | 1996-10-15 | 1999-04-15 | Electronic data processing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1998016883A1 WO1998016883A1 (en) | 1998-04-23 |
WO1998016883B1 true WO1998016883B1 (en) | 1998-06-04 |
Family
ID=7808837
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE1997/002070 WO1998016883A1 (en) | 1996-10-15 | 1997-09-15 | Electronic data processing circuit |
Country Status (10)
Country | Link |
---|---|
US (1) | US6195752B1 (en) |
EP (1) | EP0932867B1 (en) |
JP (1) | JP2000504137A (en) |
KR (1) | KR100421629B1 (en) |
CN (1) | CN1127692C (en) |
AT (1) | ATE486320T1 (en) |
BR (1) | BR9712529A (en) |
DE (2) | DE19642560A1 (en) |
UA (1) | UA52690C2 (en) |
WO (1) | WO1998016883A1 (en) |
Families Citing this family (28)
Publication number | Priority date | Publication date | Assignee | Title |
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DE19828936A1 (en) * | 1998-05-29 | 1999-12-02 | Siemens Ag | Method and device for processing data |
JP4083925B2 (en) | 1999-06-24 | 2008-04-30 | 株式会社日立製作所 | Information processing apparatus, card member, and information processing system |
FR2801751B1 (en) * | 1999-11-30 | 2002-01-18 | St Microelectronics Sa | ELECTRONIC SAFETY COMPONENT |
JP3866105B2 (en) | 1999-12-02 | 2007-01-10 | インフィネオン テクノロジーズ アクチエンゲゼルシャフト | Microprocessor device with encryption function |
FR2802669B1 (en) * | 1999-12-15 | 2002-02-08 | St Microelectronics Sa | NON-DETERMINED METHOD FOR SECURE DATA TRANSFER |
FR2802668B1 (en) * | 1999-12-15 | 2002-02-08 | St Microelectronics Sa | SECURE DATA TRANSFER PROCESS |
JP3848573B2 (en) | 2000-01-18 | 2006-11-22 | インフィネオン テクノロジーズ アクチエンゲゼルシャフト | Microprocessor system |
FR2808360B1 (en) * | 2000-04-28 | 2002-06-28 | Gemplus Card Int | COUNTER MEASUREMENT METHOD IN A MICROCIRCUIT IMPLEMENTING THE METHOD AND CHIP CARD COMPRISING SAID MICROCIRCUIT |
DE10036372A1 (en) * | 2000-07-18 | 2002-01-31 | Univ Berlin Tech | Transmitter for transmitter/receiver arrangement has encoding arrangement between data converter and data output for converting data of first type into coded data of same data type |
JP3977592B2 (en) | 2000-12-28 | 2007-09-19 | 株式会社東芝 | Data processing device |
JP4787434B2 (en) * | 2001-08-24 | 2011-10-05 | 富士通コンポーネント株式会社 | ENCRYPTION METHOD, COMMUNICATION SYSTEM, DATA INPUT DEVICE |
DE10164174A1 (en) * | 2001-12-27 | 2003-07-17 | Infineon Technologies Ag | Datenverarbeidungsvorrichtung |
FR2836735A1 (en) * | 2002-03-01 | 2003-09-05 | Canal Plus Technologies | Pay TV integrated circuit chip card/memory programme management having memory programme with executable code section and cyphered part with configurable component second cyphered part real time decoding. |
JP4173768B2 (en) | 2002-05-21 | 2008-10-29 | 松下電器産業株式会社 | Circuit device and operation method thereof |
FR2853097B1 (en) * | 2003-03-24 | 2005-07-15 | Innova Card | PROGRAMMABLE CIRCUIT PROVIDED WITH SECURE MEMORY |
US7653802B2 (en) * | 2004-08-27 | 2010-01-26 | Microsoft Corporation | System and method for using address lines to control memory usage |
US7734926B2 (en) * | 2004-08-27 | 2010-06-08 | Microsoft Corporation | System and method for applying security to memory reads and writes |
US7822993B2 (en) * | 2004-08-27 | 2010-10-26 | Microsoft Corporation | System and method for using address bits to affect encryption |
US7444523B2 (en) | 2004-08-27 | 2008-10-28 | Microsoft Corporation | System and method for using address bits to signal security attributes of data in the address space |
US20060117122A1 (en) * | 2004-11-04 | 2006-06-01 | Intel Corporation | Method and apparatus for conditionally obfuscating bus communications |
US20070239605A1 (en) * | 2006-04-06 | 2007-10-11 | Peter Munguia | Supporting multiple key ladders using a common private key set |
CN100395733C (en) * | 2006-08-01 | 2008-06-18 | 浪潮齐鲁软件产业有限公司 | Method for improving SOC chip security dedicated for financial tax control |
DE102006055830A1 (en) * | 2006-11-27 | 2008-05-29 | Robert Bosch Gmbh | Digital circuit/micro-controller protection method for internal combustion engine of motor vehicle, involves decoding data by key sets using cryptographic functions, and accessing functions on assigned key sets over key switch |
US8588421B2 (en) * | 2007-01-26 | 2013-11-19 | Microsoft Corporation | Cryptographic key containers on a USB token |
DE102007007699A1 (en) * | 2007-02-09 | 2008-08-14 | IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik | Reduction of page channel information by interacting crypto blocks |
CN101839928B (en) * | 2009-03-19 | 2013-04-24 | 北京普源精电科技有限公司 | Digital oscilloscope and data access method |
US20150317255A1 (en) * | 2011-02-15 | 2015-11-05 | Chengdu Haicun Ip Technology Llc | Secure Printed Memory |
US9870462B2 (en) * | 2014-09-22 | 2018-01-16 | Intel Corporation | Prevention of cable-swap security attack on storage devices |
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GB2099616A (en) * | 1981-06-03 | 1982-12-08 | Jpm Automatic Machines Ltd | Improvements relating to microprocessor units |
US4598170A (en) * | 1984-05-17 | 1986-07-01 | Motorola, Inc. | Secure microprocessor |
CH694306A5 (en) | 1988-04-11 | 2004-11-15 | Syspatronic Ag Spa | Chip card. |
JPH03276345A (en) * | 1990-03-27 | 1991-12-06 | Toshiba Corp | Microcontroller |
JPH04149652A (en) * | 1990-10-09 | 1992-05-22 | Mitsubishi Electric Corp | Microcomputer |
DE4120398A1 (en) * | 1991-06-20 | 1993-01-07 | Standard Elektrik Lorenz Ag | DATA PROCESSING SYSTEM |
US5386469A (en) * | 1993-08-05 | 1995-01-31 | Zilog, Inc. | Firmware encryption for microprocessor/microcomputer |
AU1265195A (en) * | 1993-12-06 | 1995-06-27 | Telequip Corporation | Secure computer memory card |
-
1996
- 1996-10-15 DE DE19642560A patent/DE19642560A1/en not_active Ceased
-
1997
- 1997-09-15 JP JP10517883A patent/JP2000504137A/en active Pending
- 1997-09-15 BR BR9712529-6A patent/BR9712529A/en not_active Application Discontinuation
- 1997-09-15 EP EP97944712A patent/EP0932867B1/en not_active Expired - Lifetime
- 1997-09-15 AT AT97944712T patent/ATE486320T1/en active
- 1997-09-15 DE DE59713047T patent/DE59713047D1/en not_active Expired - Lifetime
- 1997-09-15 UA UA99031798A patent/UA52690C2/en unknown
- 1997-09-15 WO PCT/DE1997/002070 patent/WO1998016883A1/en active IP Right Grant
- 1997-09-15 CN CN97198843A patent/CN1127692C/en not_active Expired - Lifetime
- 1997-09-15 KR KR10-1999-7003195A patent/KR100421629B1/en not_active IP Right Cessation
-
1999
- 1999-04-15 US US09/292,268 patent/US6195752B1/en not_active Expired - Lifetime
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