WO1997040566A1

WO1997040566A1 - Improved charger circuit

Info

Publication number: WO1997040566A1
Application number: PCT/CA1997/000254
Authority: WO
Inventors: Troy Schultz
Original assignee: Hibar Systems Limited
Priority date: 1996-04-11
Filing date: 1997-04-18
Publication date: 1997-10-30

Abstract

Battery charger circuit preferably for rechargeable alkaline batteries for simultaneously charging a predetermined number of batteries, comprising: a direct current source for passing energy at unstabilized level to the batteries to be charged; an adjustable voltage reference providing a stabilized DC level that corresponds to a predetermined maximum battery voltage, said DC level is provided at an output of low loadability; respective semiconductor switch means (QB1, QB2) connected between said unstabilized DC source and respective ones of said batteries, each of said switching means having respective control inputs; respective logical means connecting said control inputs to said stabilized DC source and turning on the associated switching means if the voltage of the associated battery is below said predetermined maximum level.

Description

Improved Charger Circuit

The invention relates to a battery charger circuit for rechargeable batteries, preferably of alkaline batteries, having both overcharge prevention and visual charge status indication. Cost of this circuit is greatly reduced as compared with other more sophisticated designs. The charger is intended to be used primarily to charge rechargeable alkaline manganese dioxide batteries, also known as RAM batteries or cells.

It is well known that the RAM batteries have outstanding performance, however, they are sensitive to overcharging and the voltage must not be permitted to exceed about 1.7 V DC. Charger circuits with limited charging voltage generally have a voltage sensing circuit, a stabilized reference voltage source and a comparator, wherein the comparator turns on if the actual sensed battery voltage reaches the predetermined maximum value and disrupts the charging process. In more sophisticated circuits the charging current is decreased when the battery voltage gets close to the permitted maximum value, and in such charger designs the comparator controls a charge current regulating circuit. Different versions of such charger circuits are described in US patent 5,291, 1 16 issued to R.S. Fedelstein and their use as RAM chargers has also been suggested. These charger circuits have quite complex design which results in higher costs. Most common RAM chargers either utilize such sophisticated circuits as described above and/or charge batteries in a paiallel configuration to help reduce cost. This parallel charging presents another problem in that if batteries of significantly differing capacities are placed together in the charger problems can arise. For example if a defective or deeply discharged cell were to be placed in paiallel with a cell having a good degree of capacity remaining, excess current flow could result in heat build up or even the cell venting electrolyte. _ 9 _

It is the primary object of this invention to provide an improved battery charger circuit with overcharge protection which has a minimum number of components, thus low cost, that prevents the battery from being charged with a voltage higher than permitted, which provides the required accuracy of voltage regulation, and independently controlled battery channels allowing simultaneous but not parallel charging of several battery cells.

A further object of the invention is to provide a battery charger which can give a visual indication of the charging process.

The invention will now be described in connection with preferable embodiments thereof, wherein reference will be made to the accompanying drawings. In the drawing:

Fig. 1 shows a first embodiment of the battery charger circuit according to the invention;

Fig. 2 is a circuit diagram by which the accuracy of the voltage stabilization can be increased;

Fig. 3 shows an alternative embodiment of the charger circuit;

Fig. 4 shows the circuit diagram of the unit UNT of Fig. 3; and

Fig. 5 is an alternative embodiment ofthe unit UNT of Fig. 3.

In the charger circuit shown in Fig. 1 rectified DC voltages can be measured at points B and C relative to a common or ground terminal G. The circuit enables the simultaneous charging of two batteries. The positive terminal of the first battery is connected to point VB 1+ and the positive terminal of the second battery is connected to point VB2+. The negative battery terminals VB- are coupled to the common point G.

The secondary winding of mains transformer Tr is connected to the charger circuitry. A first terminal of the secondary winding is connected to the common side of a rectifier circuit at point E, while the other teπninal is connected to two independent rectifier diodes Dl and D2, the outputs of which provide two isolated DC levels at points A and B, respectively.

At point A the first DC level is provided by diode Dl and it is smoothed by capacitor C 1 to provide a relatively stable DC voltage, since only a small load will be coupled to point A. This DC voltage, however, is not stabilized and it can be subject to fluctuations. Regulation of this voltage is provided by an adjustable voltage regulator VR1, which provides at output point C a stable DC regulated voltage, and the regulated voltage is further smoothed by capacitor C2. The voltage regulator VR1 is an integrated circuit which can be realized i.e. by the adjustable voltage regulator part number LM317LZ or the like. It is available from Motorola, National Semiconductor and numerous other suppliers. The voltage level at point C is determined by the ratio of the resistance values of the resistors Rl and R2. This stabilized output voltage is used in the embodiment of Fig. 1 on the first hand to provide the required bias voltage for a current sensing circuitry, and on the other hand to determine the cut-off voltage for the batteries to be charged by turning the transistors QB l and QB2 off through respective series resistor RB I and RB2.

The second DC level at point B, is provided by the second diode D2, and owing to the high load this DC voltage is not smoothed at all, therefore its value varies from 0 to the peak voltage of the rectified voltage. It is used to provide the charge excitation to the batteries being charged and point B is coupled directly to the collectors of the series pass transistors QB l and QB2.

The charging of the first battery connected to points VB+ and VB- goes on as long as the internal battery voltage is smaller than the level determined at point C minus the series voltage drop across the resistor RB I and across the base-emitter junction of the transistor QB l. The charging cuπent will be limited by the value of the series resistor RB I and the gain characteristics of the transistor QBl . The value of the charging cuπent will depend also on the actual charge level of the battery and will be decreased as the battery becomes charged to a trickle charge level of approx. 10 mA. At this point the battery will not be charged any longer, because the transistor will be turned off by the regulator VR1.

Additional battery channels can be provided by multiplicating the series resistor RB I and the series transistor QB l . Fig. 1 shows to parallel charging channels. Each battery is charged independently with no leakage from one battery to another.

Current sensing is provided by two series diodes D3 and D4 between points G and E. The forward voltage drop across these diodes D3 and D4 is proportional to the current flow. This voltage is then divided by resistors R3 and R4 to control the base-emitter junction of transistor Q 1. Once the cuπent flow into the base-emitter junction of the transistor QI is sufficient to control the transistor QI in on-state, the cuπent normally flowing through resistor R5 into the base-emitter junction of transistor Q2 will be shunted by the collector-emitter junction of the transistor Q 1 , and the transistor Q2 will be turned off. The value of the current flowing through the charge indicator LED D5 is determined by series limiting resistor R6. The cuπent flow is controlled by the collector-emitter junction of the transistor Q2. A separate "power on" indication is provided by the LED D6 and the series limiting resistor R7.

The cuπent level at which the charge complete LED D5 is turned on, is selected by the voltage divider resistors R3 and R4. This level is normally selected by the number of batteries being charged multiplied by 20 mA. This LED D5 indicates that all the batteries have been charged and does not indicate individual battery status.

The voltage cutoff level is determined by the adjustable voltage regulator VR1 and resistors Rl and R2. Additional factors determining the cutoff voltage are the voltage drops across the series resistor RB and the base-emitter voltage of the series pass transistor QB. By using standard 1 % resistors and carefully selecting the transistor QB, a voltage tolerance of ±2.5 % (0.042V) can be reached. ln an alternative embodiment full wave rectification can be used to improve the charge time by utilizing both halves of the AC voltage for charging. This can be done by using a center tapped transformer connected to additional diodes arranged in reverse direction compared to the diodes Dl and D2 or by using a full-wave rectifier bridge. If more accurate voltage control is required, the regulator circuitry can be changed by using a more accurate voltage reference circuit such as an LM385BZ type one instead ofthe LM317LZ integrated circuit.

The charger circuit designed according to the invention has outstanding price/performance efficiency. The battery is charged with an ideal rectified pulse train as long as its voltage is below the cut-off voltage of 1.65 ±0.042 V DC, the leakage cuπent that loads the battery when left in an unpowered charger is negligible, it has visual line voltage and charge status indicators and very few components with low total cost.

Fig. 2 shows an embodiment by which the accuracy of the voltage regulation can be increased at least by a decimal order of magnitude. Here an operational amplifier OP is inserted between the common terminal of the voltage divider resistors Rl and R2 and the control input of the voltage regulator VR1. The resistor R8 is the feedback element of the operational amplifier OP. The accuracy of such a voltage regulation is so high that the voltage fluctuation at point C will be well below 1 mV in the operational temperature range and if the mains voltage has a fluctuation of at most about 15%.

In the battery charger circuit shown in Fig. 3 the stabilized voltage is generated just as shown in Fig. 1, identical elements have been designated by identical reference symbols. The difference lies primarily in how the battery channels are driven. The output of the stabilized voltage at point C drives four identical units UNT1 ... UNT4 each associated with a respective battery to be charged, each are connected between respective terminals VB 1+ ... VB4+ and the common terminal G. The circuit diagram of the first embodiment of the unit UNT is shown in Fig. 4. Here the unit UNT comprises a series switching transistor Q driven by an operational amplifier OP2. The positive input of the operational amplifier OP2 is connected to the stabilized voltage line C, and the negative input is connected through resistor RIO to the emitter of the transistor Q and to the positive battery terminal VB+ associated with the unit UNT. Capacitor C4 is used to shunt the coupling resistor RIO to filter out transient fluctuations. The operational amplifier OP turns off the transistor Q if the associated battery voltage is higher than the stabilized voltage at point C. If this is not the case, i.e. the battery voltage is lower than the voltage at point C, the switching transistor Q is open, and the battery is charged from the rectified DC power line B. By using the operational amplifier OP2 the base cuπent of the switching transistor Q will not load the stabilized output voltage of the voltage regulator VR1 and this increases accuracy. The circuit of Fig. 4 uses a different visual indication for the charging process as in case of Fig. 1. The LED diode D7 in the basis circuit of the switching transistor Q lights only if the associated operational amplifier OP2 is passing current to the base of the switching transistor Q and the charging process goes on. In a cheaper embodiment instead of the individual light emitting diodes in each unit a common single light emitting diode can be used, driven by a logical OR gate (not shown) from the respective outputs of the operational amplifiers. The use of a single LED is cheaper, however, it cannot indicate the individual charging state of the simultaneously charged batteries.

Fig. 5 shows an alternative embodiment of the unit UNT of Fig. 4 by which a low cost pulse charger circuit can be realized. The charge voltage at point B is a full or half wave rectified AC line voltage.

A simple low cost comparator CP is used to compare the battery voltage VB+ measured via resistor R13 with the stabilized reference voltage at point C as measured by means of resistor R3. If the battery voltage VB+ is below the reference voltage, the output of the comparator CP will be open which allows cuπent to flow from resistor R14 through LED diodes D8 in the base of the transistor Q, which is turned on thereby. This permits charge cuπent to flow through the transistor Q into the battery. The voltage at point B is a pulsating rectified voltage, and the peak region is much higher than the voltage at point C. Immediately after the charge voltage is turned on, the higher voltage which is coupled through the transistor Q to the battery, the battery voltage will be forced to exceed the reference voltage. This changes the state of the comparator CP and prevents cuπent from flowing into the transistor Q. This would normally cause significant problems with high frequency oscillations resulting from the constant on/off transitions of the transistor Q. Capacitor C5 is connected between the base and emitter of the transistor Q, and the value is calculated such that the bias on the transistor Q is maintained for the entire duration of the charge pulse. The voltage of the battery will follow therefore the pulsation of the rectified DC voltage.

It should be noted that the battery is sensitive against overcharging, however, it is not sensitive if overcharging takes place only for short periods of time, i.e. during the peaks of the charging pulses. The average of the charging voltage is determined by the voltage at point C, therefore the battery is prevented from being overcharged (since the whole process goes on only if the effective battery voltage is lower than the reference voltage at point C). The charging with pulses shortens the effective charging time.

The LED diode D8 in the base circuit of the transistor Q gives visual indication when the charging process goes on.

This charging method is simple and more economic than the use of latching circuitry by which similar effects can be achieved.

In all embodiments of the present invention the simultaneous but not parallel charging of several batteries is possible, and all charging channels use a common single voltage reference circuit VR1 which is not loaded by the respective channels.

The visual indication of the ongoing charging process can be solved in any of the ways shown, either individually or common for all channels.

Claims

Claims:

1. Battery charger circuit preferably for rechargeable alkaline batteries for simultaneously charging a predetermined number of batteries, comprising: a direct current source for passing energy at unstabilized level to the batteries to be charged; an adjustable voltage reference providing a stabilized DC level relative to a ground terminal common with a terminal of said direct current sources, said stabilized level coπesponds to a predetermined maximum battery voltage, said DC level is provided at an output of low loadability; respective semiconductor switch means connected between said unstabilized DC source and respective ones of said batteries, each of said switching means having respective control inputs; and respective logical means connecting said control inputs to said stabilized DC source and turning on the associated switching means if the voltage of the associated battery is below said predetermined maximum level.

2. The battery charger circuit as claimed in claim 1, wherein said adjustable voltage reference is of the type, wherein the regulated output voltage is defined substantially by resistance values of a voltage divider connected between the output of said adjustable voltage reference and said ground terminal, wherein said voltage divider has a junction point connected to a control terminal of the adjustable voltage reference.

3. The battery charger circuit as claimed in claim 2, further comprising an operational amplifier between said junction point of the voltage divider and the control input of the adjustable voltage reference with a feedback to increase accuracy of voltage regulation.

4. The battery charger circuit as claimed in claim 1, wherein said switching means being a transistor and the logical means being constituted by the base emitter junction of the transistor and a resistor between the base of the transistor and the stabilized DC source.

5. The battery charger circuit as claimed in claim 1, wherein said logical means being respective operational amplifiers with a first input coupled to said stabilized voltage level and a second input coupled to the associated battery terminal, having an output coupled to the control input of the associated semiconductor switch.

6. The battery charger circuit as claimed in claim 1, wherein said logical means being respective comparators with a first input coupled to said stabilized voltage level and a second input coupled to the associated battery terminal, having an output coupled to the control input of the associated semiconductor switch, wherein said unstabilized DC source being a pulsating rectified DC voltage higher than said predetermined maximum battery voltage, and a capacitor is connected between the control input of the semiconductor switch and the associated battery terminal to prevent high frequency oscillations within the duration of said DC pulses.

7. The battery charger as claimed in claim 1, further comprising light emitting diode means connected to the output of said logical means to provide visual indication if said logical means in a state permitting charging cuπent to flow to the associated battery.

8. The battery charger as claimed in claim 7, wherein a single light emitting means is provided giving visual indication if any one of said batteries being charged.

9. The battery charger as claimed in claim 1, wherein said adjustable voltage regulator being fed from a filtered DC source separated from said unstabilized source.