WO1997039481A1 - Dispositif integre a base de complexe d'oxydes de metaux de transition, et procede de fabrication associe - Google Patents

Dispositif integre a base de complexe d'oxydes de metaux de transition, et procede de fabrication associe Download PDF

Info

Publication number
WO1997039481A1
WO1997039481A1 PCT/US1997/005961 US9705961W WO9739481A1 WO 1997039481 A1 WO1997039481 A1 WO 1997039481A1 US 9705961 W US9705961 W US 9705961W WO 9739481 A1 WO9739481 A1 WO 9739481A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
film
complex
transition metal
metal oxide
Prior art date
Application number
PCT/US1997/005961
Other languages
English (en)
Inventor
Steven A. Oliver
Paul Zavracky
Nicol E. Mcgruer
Carmine Vittoria
Original Assignee
Northeastern University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/818,106 external-priority patent/US6114188A/en
Application filed by Northeastern University filed Critical Northeastern University
Publication of WO1997039481A1 publication Critical patent/WO1997039481A1/fr

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • C03C17/3602Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
    • C03C17/3642Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the multilayer coating containing a metal layer
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/34Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions
    • C03C17/36Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal
    • C03C17/3602Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer
    • C03C17/3652Surface treatment of glass, not in the form of fibres or filaments, by coating with at least two coatings having different compositions at least one coating being a metal the metal being present as a layer the coating stack containing at least one sacrificial layer to protect the metal from oxidation
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B35/00Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/622Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
    • C04B35/62222Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products obtaining ceramic coatings
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/009After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone characterised by the material treated
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/45Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements
    • C04B41/4505Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements characterised by the method of application
    • C04B41/4511Coating or impregnating, e.g. injection in masonry, partial coating of green or fired ceramics, organic coating compositions for adhering together two concrete elements characterised by the method of application using temporarily supports, e.g. decalcomania transfers or mould surfaces
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/80After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone of only ceramics
    • C04B41/81Coating or impregnation
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2111/00Mortars, concrete or artificial stone or mixtures to prepare them, characterised by specific function, property or use
    • C04B2111/00474Uses not provided for elsewhere in C04B2111/00
    • C04B2111/00844Uses not provided for elsewhere in C04B2111/00 for electronic applications

Definitions

  • Complex-transition metal oxides comprise a large group of materials that show an extremely diverse and useful range of characteristics.
  • Examples of but a few technologically useful complex-transition metal oxide materials include fer ⁇ magnetic materials having the spinel, garnet, or hexaferrite crystallographic structures, ferroelectric materials having the perovskite crystallographic structure, and perovskites that display superconducting behavior at liquid nitrogen temperatures. All of these examples are of note because they are both of great technological interest as well as manifestations for the presence of long range cooperative order in the materials.
  • MEMS microelectromechanical systems
  • the complex-transition metal oxides described in this document do not incorporate the simple oxide mate ⁇ als, such as SiO,, A1 2 0 3 or the many glasses that are commonly used in semiconductor processing for insulating or passivatmg layers Nor does it refer to simple transition metal oxide mate ⁇ als, such as the conductors ZnO and RuO, which can be deposited on wafers using temperatures and processes compatible with standard semiconductor fabrication techniques
  • the complex-transition metal oxides refer to materials having large chemical formula units and complex unit cells, and are possessed of long-ranged cooperative phenomenon such as fer ⁇ magnetic.
  • ferroelectric, or superconducting properties are of value for integrated devices because of the unique properties that arise from the long- ranged cooperative phenomenon, for example nonreciprocal wave propagation in fer ⁇ magnets, very high controllable pola ⁇ zabihties in ferroelect ⁇ cs, and very high conductivities in superconductors
  • the presence of long-range cooperative phenomenon, and the quality of the resulting effects requires the oxide film to have high structural and chemical ordering at the atomic level
  • the process requuements needed for growing high quality complex-transition metal oxide films typically conflicts with the requirements used for producing integrated devices
  • the resulting complex-transition metal oxide films do not necessarily possess optimal matenal properties since they are polyciystalline, and not structurally highly-oriented or single-crystal
  • devices made with polycrystalline films have reduced performance or increased losses compared to single-crystal films.
  • devices made from polycrystalline fer ⁇ magnetic films will have higher magnetic loss compared to the same device made from a single-crystal film, while any imperfections in a high-temperature superconducting film will reduce its current carrying capacity
  • the highest performance integrated complex-transition metal oxide devices will be produced using single-crystal oxide films.
  • the method developed for the present invention intrinsically avoids the difficulties encountered by direct film deposition technique by separating the complex- transition metal oxide (CTMO) film growth process from the CTMO-film/substrate integration process.
  • CTMO complex- transition metal oxide
  • the basis of this process is the recognition that the CTMO-film can be transferred from the o ⁇ ginal, or native, growth substrate to a final, or transfer, substrate for fabrication into devices
  • this final substrate is formed of a semiconductor, dielectric, ceramic or plastic material, and may already have metallization, oxide layers, passivating layers, devices, bonding layers, or combinations of these already in place.
  • the CTMO-film is grown onto a native substrate under growth conditions that are chosen to provide a CTMO-film having optimal properties and thickness No restrictions are placed upon the native substrate used, the growth method used, or on the growth conditions that are required, as long as the resulting CTMO-film has optimal parameters for the resulting device.
  • the CTMO-film having optimal parameters it is then removed from the native substrate and is bonded, or joined, to the final substrate to provide the basis for an integrated electronics, photonics, or MEMS device
  • CTMO/semiconductor or CTMO/dielect ⁇ c device A number of specific metnods are available for the bonding process that produces an integrated CTMO/semiconductor or CTMO/dielect ⁇ c device, all of which were originally developed for standard semiconductor processing Conside ⁇ ng, for brev ⁇ t ⁇ reasons only, that the CTMO film was to be used in an integrated CTMO/semiconductor device, the CTMO film, while still attached to its native substrate, could be bonded to the semiconductor substrate using either eutectic alloy bonding, solid state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners of the art
  • the native substrate could then be removed by mechanical g ⁇ nding or polishing, by chemical-mechanical planarization techniques, through the use of selective etches, or by a combination of these techniques with others known to practitioners After removal of the native substrate, the CTMO film is firmly joined to the semiconductor wafer, and techniques fully compatible with semiconductor processing can be used to fabricat
  • Fig 1 shows the mating of a CTMO-film on its native substrate to a transfer wafer with bond layers on opposing faces according to the present invention
  • Fig 2 shows a cross section of the bonded CTMO-film/native wafer and transfer wafer of Fig 1 ,
  • Fig 3 shows the cross section of Fig 2 after removal of the native substrate
  • Fig 4 shows the cross section of Fig 2 after top layer metallization of the CTMO-film
  • Fig 5 shows the cross section of Fig 2 after the CTMO-film has been patterned and etched, and then had ⁇ to P - ⁇ ayer metallization coating deposited to yield a monohthically integrated device
  • Fig 6 shows scatte ⁇ ng parameter data for an integrated single-crystal yttrium iron garnet film/ metallized silicon circulator fab ⁇ cated by the process desc ⁇ bed in Example 1 herein,
  • Figs 7A-7F shows an exemplary process available to fabricate an integrated CTMO- film/transfer wafer device using a two transfer method
  • Fig 8 shows a self-biased monolithic circulator with a patterned bond layer, fabricated using a two transfer method
  • Fig 1 the simplest integrated CTMO-film/semiconductor or dielect ⁇ c substrate device can be fab ⁇ cated by bonding an optimal CTMO-film 10, while still attached to its native substrate 12, to a wafer 14 using a bonding layer 16
  • CTMO-film 10 Because the properties of the CTMO-film 10 are of decisive importance in the resulting integrated film/substrate device, and because there are numerous CTMO candidates for technologically important devices, a discussion of a few prototypical fer ⁇ magnetic, ferroelectric, and superconducting films and substrates is prudent For most applications it is expected that the best device performance will be obtained if optimal single-crystal CTMO films are used. It is thus important to choose the native substrate 12 such that its lattice constants, crystallographic orientation, thermal expansion coefficients, and other relevant parameters well known to practitioneis in the art, are approp ⁇ ate for growing a CTMO-film having the specific parameters desired for the device In addition, the choice of a growth method used for growing the single-crystal
  • CTMO film whether a melt-based technique such as liquid phased epitaxy, or physical vapor deposition techniques such as pulsed laser ablation deposition or sputtering, or chemical vapor techniques such as metal-organic chemical vapor deposition, or film growth techniques from solution such as sol-gel, spin- spraying, plating or hydrothermal epitaxy, is also chosen appropriately to yield the desired film characte ⁇ stics, as is well known to practitioners of the art Tne film growth conditions can also be freely chosen to yield films having optimal desired properties
  • CTMO films having less crystallographical pure orientations such as highly- onented or polycrystalline films
  • Highly-oriented CTMO films may be interchangeable with single crystal films for most applications that use fer ⁇ magnetic or ferroelectric CTMO materials
  • Polycrystalline CTMO films may prove a better choice for integrated device fabrication where cost considerations predominate, or where the device performance is insensitive to the film crystallographic orientation, or if the anisotropy int ⁇ nsic to many CTMO single-crystal films is actually det ⁇ mental to the device performance
  • the methods described here will most likely be applied with CTMO films that have sufficient, but not optimal, mate ⁇ al properties for the integrated device Indeed, it is the nature of the methods described here that they are independent of the nature of the CTMO film
  • Nonreciprocal passive microwave devices such as circulators
  • CTMO- film/native substrate pairs 10, 12 are fabricated from fer ⁇ magnetic materials that a/e members of the garnet, spinel, and hexaferrite families, with the approp ⁇ ate material being chosen according to the device's desired operating wavelength, bandwidth, and performance level
  • Appropriate CTMO- film/native substrate pairs 10, 12 for these three types of materials have a yttrium iron garnet fer ⁇ magnetic film grown on a gadolinium gallium garnet substrate, a nickel-zinc femte spinel film grown on a magnesium oxide substrate, or a ba ⁇ um hexaferrite film grown on an alumina, or sapphire, substrate
  • a similar range of CTMO-film/substrate pairs 10, 12 also exist for technologically useful ferroelectric and perovskite-based superconducting films
  • One example is the use of lanthanum aluminate substrate for the growth of epitaxial or
  • the film 10 provided on a native substrate 12 be limited to one layer of uniform composition, or even that the film 10 itself is fixed at a single composition.
  • the CTMO-film 10 in a further embodiment is comprised of multiple films having different compositions.
  • the conductive oxide (La,Sr)CoO 3 often denoted as LSC, has a sufficient lattice match with both lanthanum aluminate and PZT films to allow growth of high quality LSC/PZT/LSC film-sandwiches on lanthanum aluminate substrates.
  • the CTMO- film/native substrate 10, 12 is bonded to the wafer 14, or surface, to which the CTMO- film is to be transferred.
  • This bonding procedure is effected using either eutectic alloy bonding, solid-state interdiffusion bonding, adhesives, van der Waal forces, anodic bonding, or other techniques known to practitioners in the art.
  • adhesives, eutectic alloy bonding, or solid state interdiffusion bonding techniques are used a bond layer 16 will be present between the CTMO-film/native substrate and transfer substrate. This bond layer 16 can be placed upon either or both of the mating surfaces using standard techniques known to practitioners.
  • the constraints on the bonding process are limited only by the desire to not damage either the transfer wafer 14 or the CTMO-film 10 by either thermal, mechanical, or chemical effects, as well as cost / time considerations.
  • the wafer surface may already have undergone considerable previous processing. and may already have integrated circuit components such as metal, insulating, or semiconducting layers and devices present.
  • the native substrate 12 is removed by one or more of the following: g ⁇ nding, lapping, use of selective etching, or other techniques common to chemical- mechanical planarization processes that are well known to practitioners in the art Since these processes are destructive of the native substrate 12, which may have a significant cost, it may be advantageous to remove the native substrate 12 without destroying it m the process This result is obtained by breaking the bond between the CTMO-film 10 and the native substrate 12, allowing the substrate to be detached Methods to inco ⁇ orate a relatively weak bond at the film/substrate interface can be applied either du ⁇ ng the film growth process, or by special preparation of the native substrate 12 before undertaking the CTMO-film 10 growth.
  • CTMO-film 10 Another method for providing a weak bond between film 10 and the native substrate 12 is obtained by depositing a sacrificial layer that has weak mechanical strength onto the native substrate 12 before growing the CTMO-film 10
  • a sacrificial layer that has weak mechanical strength onto the native substrate 12 before growing the CTMO-film 10
  • CLEFT cleaved layer epitaxy for transfer
  • the CTMO-film 10 is available for surface modification or patterning into devices. Refer ⁇ ng to Fig 4, this includes in a first embodinu... of the exposed surface, followed by one oi more layers of metallization 18 Or, as shown in Fig 5, the CTMO-film 10 may be patterned using standard processes well known to those in the art to yield one, or mam . devices on the transfer wafer surface 14
  • the bonded CTMO-film/transfer wafer system 10, 14 is provided in a further embodiment with yet another film transferred to it, again using one of the processes listed above, to yield a complex multilayered film stack 10.
  • EXAMPLE 1 One example for the use of the present invention involves the fabrication of integrated single-crystal yttrium iron garnet circulators on a metallized silicon substrate 14 at low temperatures.
  • GGG gadolinium gallium garnet
  • integrated polycrystalline garnet/semiconductor circulators have been produced through the direct fabrication method at using processing temperatures above 700°C.
  • integrated single-crystal garnet circulators have performance benefits over integrated polycrystalline garnet circulators, and there is a greatly reduced risk of degrading the device characteristics if the integration is done at low temperatures.
  • An integrated single-crystal YIG / silicon circulator was fab ⁇ cated by bonding a YIG film on its native GGG substrate to metallized silicon, followed by removal of the GGG native substrate by grinding. This was done at a chip, or die, level. Before bonding the garnet and silicon chips, the YIG surface had a 2 micrometer-thick copper layer deposited on it for use as a high-conductivity ground plane. Over this copper layer, a barrier layer of titanium-tungsten was deposited.
  • Both chips then had layers of elemental gold and indium deposited on their mating surfaces.
  • the relative thicknesses of the gold and indium layers were chosen such that their relative atomic fraction was approximately nine indium atoms to one gold atom.
  • the chips were then mated, and heated in vacuum uncer slight compression to hold the mated faces steady. During the heating process, at a temperature of 195°C, the indium layer melts and strongly reacts with the gold layer via fast solid-liquid interdiffusion processes to yield islands of an indium-gold alloy in an indium matrix. This eutectic bonding process provided a strong bonding layer between -l i ⁇ the chips, as the indium-gold alloy has good mechanical strength, while still retaining some compliancy to stress through the indium matrix
  • the native GGG substrate was removed by mechanical grinding
  • the now-exposed YIG film top surface was then polished, and metallized by depositing a 2 micrometer-thick layer of copper on the top surface
  • the Y-junction circulator structure was then fab ⁇ cated through standard semiconductor-based photolithographic and etching processes. Tests results from one of the first integrated single-crystal YIG ' silicon circulators is provided in Fig. 6 The results for both the insertion loss and isolation of this circulator show noteworthy performance levels for this nonoptimized circuit
  • Fig 6 shows the forward (S, 2 ) and reverse (S 21 ) scattering parameters for microwave propagation across the circulator circuit and connectors as a function of frequency, where the third port of the Y-junction circulator was terminated by a 50 ⁇ load
  • the different transmitted power for the forward and reverse directions in the frequency range from 8 GHz to 12 GHz shows the nonreciprocal circulator action for this device.
  • an isolation of over 20 dB is seen over a 1 GHz bandwidth centered near 9 GHz, with a minimum measured insertion loss of 1.2 dB
  • a two-step transfer process is shown where the CTMO- film 20 disposed on a native substrate 22 is first patterned, etched, and metallized to the device specifications (Fig 7A), and then the modified CTMO-film is bonded to a host wafer 24 (Fig. 7B), or surface, via a weak binding layer 26, before removing the native substrate 22 using any of the methods described above (Fig 7C)
  • the film 20 may be further modified by patterning and etching processes, by single or multilaver metallization, or by having another film bonded to it to yield a multi-film stack.
  • One modification may have the CTMO-film divided into discrete sub-components, where each sub-component may be bonded to different transfer substrates, or different areas of the same transfer wafer.
  • the CTMO-film 20, or CTMO-film sub- component is bonded to its final attachment site on the transfer wafer 28 via a bonding layer 30 (Fig. 7D), and the host wafer 24 is removed (Fig. 7E).
  • the now- exposed surface of the modified CTMO-film 20, or multi-film stack is further processed to yield a working device (Fig. 7F), which may be comprised of many complex film 20 and metallization 32 layers.
  • a working device Fig. 7F
  • the bond layer 16 has been shown as continuous, there is no need for this layer to be contiguous other than for mechanical strength.
  • FIG. 8 shows a cross-section schematic for one embodiment of this invention that can use both a patterned bond layer and a CTMO-film subcomponent fabricated by multiple transfer steps: a monolithic integrated self-biased circulator on a multicomponent transfer substrate 34.
  • This device has great advantages over conventional circulators because the intrinsic properties of the c-axis oriented hexaferrite CTMO-film act to self-bias the circulator, such that no external magnetic field is required for circulator operation.
  • the transfer substrate 34 may be procured as a GLASS MICROWAVE INTEGRATED CIRCUIT substrate, a trade-marked product of the M/A- COM Co..
  • This substrate 34 consists of a semiconductor wafer 36, such as silicon, a metallization layer 38 that serves as the microwave device ground plane, and a low-loss dielectric filling material 40 that provides for planarity over the substrate surface.
  • This embodiment of a monolithic integrated self-biased circulator entails bonding a c-axis oriented hexaferrite CTMO-film subcomponent 42, having thickness of from 20 micrometers to 100 micrometers, onto a raised silicon pedestal portion of the substrate 34 using a patterned bonding layer 44.
  • the hexaferrite film sub-component 42 may have undergone patterning, etching, and transfer to a host wafer before bonding to the transfer substrate 34, as was shown in Fig 7
  • the hexaferrite film sub-component 42 may have originally been grown, or procured as a continuous film on a 75 millimeter diameter substrate, and then patterned and etched using standard processes to yield a large number of subcomponents 42, each with bevelled film edges
  • These individual subcomponents 42 may have triangular, rectagonal, or hexagonal shapes, and range in edge-length from 1 mm to 2 cm depending upon the particular hexafer ⁇ te material parameters, the device frequency range, and the circuit design
  • the hexafemte film sub-components 42 are weakly bonded to a host substrate before attachment to the transfer substrate
  • the hexaferrite subcomponent 42 ma ⁇ be precisely aligned on the transfer substrate using pick-and-place techniques
  • Fig 8 The bonding process of Fig 8 may be conducted using any of the previously named methods, depending upon thermal, mechanical, time and cost considerations
  • a bond layer that is conductive for example an indium-gold alloy formed by solid state interdiffusion of elemental layers
  • This bond layer pattern consists of several isolated bond layer pads 44a. 44b, 44c that are spaced to provide electrical isolation between the substrate ground plane metallization 38 and the device top surface metallization 46
  • the bond layer pads 44 must also be designed to minimize detrimental capacitance effects in the circuit
  • Dielectric materials such as glass
  • CTMO-films are routinely inco ⁇ orated into electronic circuits either as substrates, or as layers on top of the semiconductor substrate
  • such glasses comprise some, or all, of the transfer wafer 14, 28 upon which the CTMO-film 10.
  • This glass wafer may have one or more optical waveguides internal to the wafer, to provide an integrated magneto-optic sensing element Moreover, instead of glass the transfer wafer can also be comprised of an electrooptic mate ⁇ al
  • films of barium hexafer ⁇ te are heteroepitaxially grown on a native substrate such as single-crystal alumina, or sapphire, and moved using the processes desc ⁇ bed above to a glass, ceramic, or metallic platen for use as a high density magnetic storage medium for hard dnves
  • the underlying platen may already have a layer of, for example MnFe, to provide a magnetic flux closure path to yield small domain sizes in the overlying, transferred, barium hexaferrite film
  • exemplary materials include ceramic or plastic substrates, depending upon the application

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Structural Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Geochemistry & Mineralogy (AREA)
  • General Chemical & Material Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

Dans un procédé permettant de fabriquer des dispositifs intégrés à base de complexe d'oxydes de métaux de transition (CTMO)/substrat semi-conducteur ou diélectrique, on sépare le processus de croissance du film CTMO et le processus d'intégration film CTMO/substrat semi-conducteur ou diélectrique. On transfère le film CTMO (10) du substrat natif (12) sur le substrat final (14) afin de fabriquer des circuits. On fait croître le film CTMO (10) sur un substrat natif (12) dans des conditions de croissance choisies pour obtenir un film CTMO ayant les propriétés et l'épaisseur désirées. Aucune restriction n'est mise ni sur le substrat natif utilisé, ni sur le procédé de croissance utilisé, ni sur les conditions de croissance nécessaires. On joint ensuite le film CTMO (10) au substrat semi-conducteur ou diélectrique (14) et on enlève le substrat natif (12), ce qui permet d'obtenir une base pour un dispositif électronique, optoélectronique ou microélectromécanique intégré. Des techniques entièrement compatibles avec le traitement des semi-conducteurs peuvent être utilisées pour fabriquer des circuits monolithiques intégrés CTMO/semi-conducteur selon un premier mode de réalisation.
PCT/US1997/005961 1996-04-12 1997-04-10 Dispositif integre a base de complexe d'oxydes de metaux de transition, et procede de fabrication associe WO1997039481A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US1536796P 1996-04-12 1996-04-12
US60/015,367 1996-04-12
US08/818,106 US6114188A (en) 1996-04-12 1997-03-13 Method of fabricating an integrated complex-transition metal oxide device
US08/818,106 1997-03-13

Publications (1)

Publication Number Publication Date
WO1997039481A1 true WO1997039481A1 (fr) 1997-10-23

Family

ID=26687291

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1997/005961 WO1997039481A1 (fr) 1996-04-12 1997-04-10 Dispositif integre a base de complexe d'oxydes de metaux de transition, et procede de fabrication associe

Country Status (1)

Country Link
WO (1) WO1997039481A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006134335A1 (fr) * 2005-06-16 2006-12-21 Pilkington Group Limited Panneau en verre revêtu
WO2011120537A1 (fr) * 2010-03-31 2011-10-06 Ev Group E. Thallner Gmbh Procédé de production d'une tranche pourvue de puces sur ses deux faces

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200484A (en) * 1977-09-06 1980-04-29 Rockwell International Corporation Method of fabricating multiple layer composite
US5034343A (en) * 1990-03-08 1991-07-23 Harris Corporation Manufacturing ultra-thin wafer using a handle wafer
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
US5146299A (en) * 1990-03-02 1992-09-08 Westinghouse Electric Corp. Ferroelectric thin film material, method of deposition, and devices using same
US5227204A (en) * 1991-08-27 1993-07-13 Northeastern University Fabrication of ferrite films using laser deposition
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
US5391257A (en) * 1993-12-10 1995-02-21 Rockwell International Corporation Method of transferring a thin film to an alternate substrate
US5449659A (en) * 1991-07-05 1995-09-12 Conductus, Inc. Method of bonding multilayer structures of crystalline materials
US5493220A (en) * 1993-03-05 1996-02-20 Northeastern University Magneto-optic Kerr effect stress sensing system
US5527766A (en) * 1993-12-13 1996-06-18 Superconductor Technologies, Inc. Method for epitaxial lift-off for oxide films utilizing superconductor release layers
US5536361A (en) * 1992-01-31 1996-07-16 Canon Kabushiki Kaisha Process for preparing semiconductor substrate by bonding to a metallic surface

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4200484A (en) * 1977-09-06 1980-04-29 Rockwell International Corporation Method of fabricating multiple layer composite
US5146299A (en) * 1990-03-02 1992-09-08 Westinghouse Electric Corp. Ferroelectric thin film material, method of deposition, and devices using same
US5034343A (en) * 1990-03-08 1991-07-23 Harris Corporation Manufacturing ultra-thin wafer using a handle wafer
US5110748A (en) * 1991-03-28 1992-05-05 Honeywell Inc. Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display
US5449659A (en) * 1991-07-05 1995-09-12 Conductus, Inc. Method of bonding multilayer structures of crystalline materials
US5227204A (en) * 1991-08-27 1993-07-13 Northeastern University Fabrication of ferrite films using laser deposition
US5536361A (en) * 1992-01-31 1996-07-16 Canon Kabushiki Kaisha Process for preparing semiconductor substrate by bonding to a metallic surface
US5493220A (en) * 1993-03-05 1996-02-20 Northeastern University Magneto-optic Kerr effect stress sensing system
US5344524A (en) * 1993-06-30 1994-09-06 Honeywell Inc. SOI substrate fabrication
US5391257A (en) * 1993-12-10 1995-02-21 Rockwell International Corporation Method of transferring a thin film to an alternate substrate
US5527766A (en) * 1993-12-13 1996-06-18 Superconductor Technologies, Inc. Method for epitaxial lift-off for oxide films utilizing superconductor release layers

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
IEEE TRANSACTIONS ON MAGNETICS, November 1990, Vol. 26, No. 6, ICHINOSE M., "Single-Crystal Ferrite Technology for Monolithic Disk Heads", pages 2972-7. *
J. APP. PHYS., 15, April 1988, Vol. 63, No. 8, ABE M. et al., "Ferrite-Organic Multilayer Film for Microwave Monolithic Integrated Circuits Prepared by Ferrite Plating Based on the Spray-Spin-Coating Method", pages 3774-6. *
MICROWAVE JOURNAL, June 1987, Vol. 30, No. 6, GLASS H.L. "Ferrite Films for Microwave and mm-Wave Applications", pages 52, 54, 56, 58, 60, 62-3. *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006134335A1 (fr) * 2005-06-16 2006-12-21 Pilkington Group Limited Panneau en verre revêtu
WO2011120537A1 (fr) * 2010-03-31 2011-10-06 Ev Group E. Thallner Gmbh Procédé de production d'une tranche pourvue de puces sur ses deux faces
US9224630B2 (en) 2010-03-31 2015-12-29 Ev Group E. Thallner Gmbh Method for producing a wafer provided with chips

Similar Documents

Publication Publication Date Title
US6114188A (en) Method of fabricating an integrated complex-transition metal oxide device
US5280013A (en) Method of preparing high temperature superconductor films on opposite sides of a substrate
Adam et al. Thin-film ferrites for microwave and millimeter-wave applications
CN108493325A (zh) 一种高频高性能声表面波器件及其制备方法
US5449659A (en) Method of bonding multilayer structures of crystalline materials
US7208392B1 (en) Creation of an electrically conducting bonding between two semi-conductor elements
US5521150A (en) Method of joining Y-based oxide superconductors
JPH09506586A (ja) 酸化膜のための結晶成長リフトオフ方法およびその結果の構造
CN1564308A (zh) 一种绝缘层上硅结构及制备方法
EP0674808B1 (fr) Structures d'interconnexion électriques
WO1997039481A1 (fr) Dispositif integre a base de complexe d'oxydes de metaux de transition, et procede de fabrication associe
Norton et al. Y‐Ba‐Cu‐O thin films grown on rigid and flexible polycrystalline yttria‐stabilized zirconia by pulsed laser ablation
EP1443131B1 (fr) Oxyde supraconducteur haute temperature et son procede de production
WO1994005046A2 (fr) Structures autonomes en materiaux a base d'oxyde du type perovskite
JPH09260734A (ja) 複合基板及びその製造方法
JP3096050B2 (ja) 半導体装置の製造方法
US6479139B1 (en) Superconducting substrate structure and a method of producing such structure
WO2024083267A1 (fr) Procédé de préparation de structure semi-conductrice, structure semi-conductrice et dispositif électronique
JP2914328B2 (ja) 酸化物超伝導薄膜の製造方法
EP0471292B1 (fr) Substrat pour dispositifs supraconducteurs
Chrisey et al. Microwave magnetic film devices
US20240180041A1 (en) Heterojunction semiconductor substrate with excellent dielectric properties, method of manufacturing the same and electronic device using the same
JP4017476B2 (ja) 誘電体導波管及びその製造方法
Harshavardhan et al. High Tc thin films deposited by PLD onto technologically important substrates
JPH0752761B2 (ja) 集積回路パッケージ

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): JP KR

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): AT BE CH DE DK ES FI FR GB GR IE IT LU MC NL PT SE

CFP Corrected version of a pamphlet front page

Free format text: REVISED ABSTRACT RECEIVED BY THE INTERNATIONAL BUREAU AFTER COMPLETION OF THE TECHNICAL PREPARATIONS FOR INTERNATIONAL PUBLICATION

121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: JP

Ref document number: 97537207

Format of ref document f/p: F

122 Ep: pct application non-entry in european phase