WO1997021164A3 - Rechnerunterbrechungssystem - Google Patents

Rechnerunterbrechungssystem Download PDF

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Publication number
WO1997021164A3
WO1997021164A3 PCT/DE1996/002196 DE9602196W WO9721164A3 WO 1997021164 A3 WO1997021164 A3 WO 1997021164A3 DE 9602196 W DE9602196 W DE 9602196W WO 9721164 A3 WO9721164 A3 WO 9721164A3
Authority
WO
WIPO (PCT)
Prior art keywords
computer
interrupt request
intm
intb
inta
Prior art date
Application number
PCT/DE1996/002196
Other languages
English (en)
French (fr)
Other versions
WO1997021164A2 (de
Inventor
Thomas Mueller
Original Assignee
Siemens Ag
Thomas Mueller
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag, Thomas Mueller filed Critical Siemens Ag
Publication of WO1997021164A2 publication Critical patent/WO1997021164A2/de
Publication of WO1997021164A3 publication Critical patent/WO1997021164A3/de

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Debugging And Monitoring (AREA)

Abstract

Die Erfindung betrifft einen Rechner mit Steckplätzen, die untereinander mit Adreß-, Daten- und Steuerleitungen verbunden sind, wobei die Steuerleitungen Unterbrechungsanforderungsleitungen (INTa, INTb ... INTm) umfassen, und mit einer steckbaren Verarbeitungseinheit, der über die Unterbrechungsanforderungsleitungen (INTa, INTb ... INTm) und über Einstellmittel (Ea, Eb ... Em) Unterbrechungsanforderungssignale (Interrupts) durch steckbare Funktionseinheiten zuführbar sind. Der Rechner ist mit Mitteln versehen, die eine Einstellung der Unterbrechungsanforderungssignale, über welche die Interrupts übertragen werden, vereinfachen. Die Erfindung wird angewandt in Personalcomputern sowie in Automatisierungsrechnern.
PCT/DE1996/002196 1995-12-04 1996-11-18 Rechnerunterbrechungssystem WO1997021164A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE29519211.9 1995-12-04
DE29519211U DE29519211U1 (de) 1995-12-04 1995-12-04 Rechner

Publications (2)

Publication Number Publication Date
WO1997021164A2 WO1997021164A2 (de) 1997-06-12
WO1997021164A3 true WO1997021164A3 (de) 1997-08-28

Family

ID=8016262

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE1996/002196 WO1997021164A2 (de) 1995-12-04 1996-11-18 Rechnerunterbrechungssystem

Country Status (2)

Country Link
DE (1) DE29519211U1 (de)
WO (1) WO1997021164A2 (de)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0380851A2 (de) * 1989-02-03 1990-08-08 Digital Equipment Corporation Modulare Kreuzschienenzwischenverbindungen in einem digitalen Rechner
WO1996027156A1 (en) * 1995-03-01 1996-09-06 Intel Corporation Interrupt steering for a computer system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0380851A2 (de) * 1989-02-03 1990-08-08 Digital Equipment Corporation Modulare Kreuzschienenzwischenverbindungen in einem digitalen Rechner
WO1996027156A1 (en) * 1995-03-01 1996-09-06 Intel Corporation Interrupt steering for a computer system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"PCMCIA Interrupt Multiplexing", IBM TECHNICAL DISCLOSURE BULLETIN., vol. 38, no. 5, May 1995 (1995-05-01), NEW YORK US, pages 303 - 304, XP000519586 *

Also Published As

Publication number Publication date
WO1997021164A2 (de) 1997-06-12
DE29519211U1 (de) 1996-03-28

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