WO1997014213A1

WO1997014213A1 - Limiter circuit

Info

Publication number: WO1997014213A1
Application number: PCT/IB1996/000999
Authority: WO
Inventors: Louis Jacques Drenthen
Original assignee: Philips Electronics N.V.; Philips Norden Ab
Priority date: 1995-10-09
Filing date: 1996-09-27
Publication date: 1997-04-17

Abstract

A limiter circuit comprises a first impedance network (R1) coupled between an input and an output of the limiter circuit, and at least one clipping branch (R2, D2, A, D1) also coupled between an input and an output of the limiter circuit. The clipping branch (R2, D2, A, D1) includes a differential amplifier (A) having a non-inverting input coupled to receive a clip voltage, a second impedance network (R2) coupled between the limiter circuit input and an inverting input of the differential amplifier (A), where the first and second impedance networks (R1, R2) have substantially corresponding impedance values, a first p-n junction (D1) between an output of the differential amplifier (A) and the limiter circuit output, and a second p-n junction (D2) between the inverting input and the differential amplifier output, where a layer (p or n) of said second p-n junction (D2) which is coupled to the differential amplifier output corresponds to a layer (p or n) of the first p-n junction (D1) which is coupled to the differential amplifier output, and wherein the first and second p-n junctions (D1, D2) are substantially identical.

Description

Limiter circuit.

The invention relates to a limiter circuit for limiting signal variations exceeding or falling below a limit level.

JP-A-2/104,117 discloses a limiter circuit to hold a saturated voltage at a fixed value by means of three operational amplifiers, connecting power sources for regulating upper limit and lower limit saturated voltages to the positive input sides of respective operational amplifiers, connecting the output voltages to diodes and connecting the output terminal of an arithmetic circuit to the negative output sides of the respective operational amplifiers. When the input signal is between the clip levels, a non-linear distortion occurs due to the active components (diode and transistor) in the signal path between the input and the output of the clipper. In addition to thermic noise generated in the resistors, other noise components are caused by the active components in the signal path. Instable signal components are caused by substantial impedance variations at the clipping instant. Around the clip level, mutually differing currents flow thru the diodes, resulting in mutually differing junction voltages which cause an undesiredly slow transition to the clipping state. Moreover, at large signal values, currents flowing thru the respective diode branches may differ to a large extent, resulting in an increasing clip level or tilt.

It is, inter alia, an object of the invention to provide an improved limiter circuit. To this end, one aspect of the invention provides a limiter circuit as defined in claim 1. Advantageous embodiments are defined in the dependent claims.

An embodiment of the limiter circuit according to the present invention comprises a first impedance network coupled between an input and an output of the limiter circuit, and at least one clipping branch also coupled between an input and an output of the limiter circuit. The clipping branch includes a differential amplifier having a non-inverting input coupled to receive a clip voltage, a second impedance network coupled between the limiter circuit input and an inverting input of the differential amplifier, where the first and second impedance networks have substantially corresponding impedance values, a first p-n junction between an output of the differential amplifier and the limiter circuit output, and a second p-n junction between the inverting input and the differential amplifier output, where a layer (p or n) of said second p-n junction which is coupled to the differential amplifier output corresponds to a layer (p or n) of the first p-n junction which is coupled to the differential amplifier output, and wherein the first and second p-n junctions are substantially identical. When a two-level clipping is desired, a second clipping branch may be added.

Due to the substantially corresponding impedance values and the substantially identical p-n junctions, it is ensured that the currents thru both p-n junctions are substantially identical, so that soft-clipping and tilt are reduced to a great extent. Moreover, as there is only an impedance network between the input and the output of the limiter circuit, no non-linear distortion resulting from active components can occur, and no other noise components are generated than some thermic noise in the first impedance network. Further, in the limiter circuit of the present invention, no significant impedance fluctuations occur at the clipping instant. The p-n junctions may be diodes, preferably on a single IC substrate (a so-called double diode). The impedance networks may be simple single resistors.

These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.

In the drawings:

Figs. IA and IB show a first embodiment of the invention and a corresponding signal transfer diagram;

Figs. 2A and 2B show a second embodiment of the invention and a corresponding signal transfer diagram; and

Figs. 3A and 3B show a third embodiment of the invention and a corresponding signal transfer diagram.

In the embodiment of Fig. 1 A, an input voltage Vin is applied to identical respective series connections of a first resistor Rl and a first diode Dl, and a second resistor R2 and a second diode D2. So, Rl = R2, and Dl = D2. An operational amplifier A has an inverting input connected to a junction point of the second resistor R2 and the second diode D2, a non-inverting input receiving a clip voltage Vclip, and an output connected to a junction point of the diodes Dl and D2. An output voltage Vout is taken from a junction point of the first resistor Rl and the first diode Dl.

As shown in Fig. IB, at signal levels below the clip voltage Vclip, neither diode Dl, D2 conveys any current and the output voltage Vout is identical to Vin. When the input voltage Vin approximates the clip voltage Vclip, a current starts to flow thru the second resistor R2, which current equals the current thru the second diode D2. Due to the feedback D2, the operational amplifier A ensures that the voltage at the junction point R2-D2 equals Vclip. As noted above, the two resistor-diode branches Rl-Dl and R2-D2 are identical, which results in that also the voltage Vout at the junction point Rl-Dl equals Vclip when the input voltage Vin approximates the clip voltage Vclip.

As is illustrated in the embodiment of Fig. 2A and the corresponding signal transfer diagram of Fig. 2B, by inverting the orientations of both diodes Dl , D2, a clipper for signals lower than Vclip results.

By combining the circuits of Figs. IA and 2A, a two-level clipper results as is shown in Figs. 3A and 3B. In addition to the first clipping branch R2, D2, A, Dl similar to that of Fig. IA, a second clipping branch R3, D4, A2, D3 similar to that of Fig. 2A is present. A high clip voltage Vclip-h is applied to the non-inverting input of the operational amplifier A. A low clip voltage Vclip-1 is applied to the non-inverting input of the operational amplifier A2. The resistors Rl, R2 and R3 have identical values. The diodes Dl and D2 are mutually identical, as are the diodes D3 and D4.

As mentioned above, for input voltages Vin not exceeding (or falling below) the clip level Vclip (-h/-l), the diode D2 (D4) conveys no current. Consequently, for such input voltages the amplifier A (A2) has no feedback, so that its output voltage may decrease towards one of the power supply voltages. When the input voltage Vin approximates the clip level Vclip (-h/-l), and the diode D2 (D4) starts to be conducting, the amplifier A (A2) has to bridge a large potential difference within a short time period. This secondary problem can be solved by selecting an operational amplifier with a large slew-rate, or by connecting an additional diode D2a (D4a) antiparallel to D2 (D4). In the latter option, the amplifier only needs to bridge about 1 Volt. The additional diode(s) need not to be matched.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The invention can be used as a so-called white clipper in analog video processing for consumer, professional medical, and broadcast applications. Notably where A/D converters are used, the invention is preferably applied as no tilt occurs. The invention can also be used in medical X-ray systems in which a low nominal level (and large signal overmodulations) occur.

Claims

Claims:

1. A limiter circuit, comprising: a first impedance network (Rl) coupled between an input and an output of the limiter circuit; a differential amplifier (A) having a non-inverting input coupled to receive a clip voltage; a second impedance network (R2) coupled between said limiter circuit input and an inverting input of the differential amplifier (A), where said first and second impedance networks (Rl, R2) have substantially corresponding impedance values; a first p-n junction (Dl) between an output of the differential amplifier (A) and said limiter circuit output; and a second p-n junction (D2) between said inverting input and said differential amplifier output, where a layer (p or n) of said second p-n junction (D2) which is coupled to said differential amplifier output corresponds to a layer (p or n) of said first p-n junction (Dl) which is coupled to said differential amplifier output, and wherein said first and second p-n junctions (Dl, D2) are substantially identical.

2. A limiter circuit as claimed in claim 1 , further comprising: a second differential amplifier (A2) having a non-inverting input coupled to receive a clip voltage; a third impedance network (R3) coupled between said limiter circuit input and an inverting input of the second differential amplifier (A2), where said first, second and third impedance networks (Rl, R2, R3) have substantially corresponding impedance values; a third p-n junction (D3) between an output of the second differential amplifier (A2) and said limiter circuit output; and a fourth p-n junction (D4) between said inverting input and said output of the second differential amplifier (A2), where a layer (p or n) of said fourth p-n junction (D4) which is coupled to said output of the second differential amplifier (A2) corresponds to a layer (p or n) of said first p-n junction (Dl) which is coupled to said output of the second differential amplifier (A2), and wherein said third and fourth p-n junctions (Dl, D2) are substantially identical.

3. A limiter circuit as claimed in claim 1, further comprising an additional p- n junction (D2a) connected in antiparallel to the second p-n junction (D2).