WO1997012508B1 - Transforming and manipulating program object code - Google Patents
Transforming and manipulating program object codeInfo
- Publication number
- WO1997012508B1 WO1997012508B1 PCT/US1996/015763 US9615763W WO9712508B1 WO 1997012508 B1 WO1997012508 B1 WO 1997012508B1 US 9615763 W US9615763 W US 9615763W WO 9712508 B1 WO9712508 B1 WO 9712508B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- independent
- instruction
- signal
- platform
- steps
- Prior art date
Links
- 230000001131 transforming Effects 0.000 title claims abstract 3
- 230000000875 corresponding Effects 0.000 claims 4
- 241001237731 Microtia elva Species 0.000 claims 1
- 230000004075 alteration Effects 0.000 claims 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 1
- 230000002104 routine Effects 0.000 claims 1
Abstract
A method and system for transforming and manipulating program object code. A set of program object code is transformed into a form in which it may be readily manipulated, preferably a form which is independent of both the processor and the operating system with which the object code will execute. The transformed object code is manipulated, preferably to add error-checking instructions, but possibly to add other functions or to alter the functions of the object code. The manipulated code is then reverse-transformed to program object code of the same type as the original object code.
Claims
AMENDED CLAIMS
[received by the International Bureau on 18 September 1997 (18.09.97); new claims 10-38 added; remaining claims unchanged (10 pages)]
10. The method according to claim 1, wherein the decomposing step includes the following substeps: creating an ELF header having a file header describing the object code; creating text section data having instructions to be executed; creating data section data having data corresponding the instructions to be executed; and creating a tag table having a plurality of tags corresponding to a symbol table, text relocations, and data relocations.
11. The method according to claim 1, wherein the disassembling step includes the following sub-steps: tracing all possible paths by which control might be transferred to an instruction; and disassembling the instruction into a platform-independent assembler instruction.
12. The method according to claim 1, wherein the disassembling step includes the following sub-steps: creating a tag stack by pushing all tags likely to point to instructions for execution onto the tag stack; determining if the tag stack is empty; popping a tag off the tag stack if the tag stack is not determined to be empty; and decoding a next instruction at a location indicated by the popped tag.
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13. The method according to claim 12, the creating step including the following sub- steps: recognizing use of jump tables through searching for a set of relocations having a pattern of a jump table.
14. The method according to claim 12, the decoding step including the following sub- steps: disassembling a next sequential text word in the next instruction; pushing the next instruction onto the tag stack if the next instruction is a conditional branch instruction; and backing up to a most recent tag from which text has been disassembled into instructions when the step of disassembling is unsuccessful, the step of backing up further including the step of constructing a placeholder block indicating that the next instruction is data-in- text.
15. The method according to claim 1, wherein the disassembling step further includes the following sub- steps: creating a linked list of platform-independent assembler instructions, each one of said platform-independent assembler instructions having (a) an instruction type corresponding to an operation code, (b) a set of assembly tags, (c) a set of flags, (d) an encoding for an instruction represented by said element,
35
16. The method according to claim 1 , the disassembling step including the following sub-steps: compiling a machine description, the machine description describing format and nature of machine instructions for a processor, wherein the machine description comprises a machine description language having a header, a register set description, a list of individual register descriptions, an instruction set branch characteristics description, an instruction set formatting description, and an instruction set properties description.
17. The method according to claim 1, the modifying step including the following sub- steps: receiving a platform independent assembly instruction module; examining a next platform independent assembly instruction to determine if a call to a checkpoint function must be inserted; repeating the examining step until it is determined that a checkpoint function must be inserted; inserting a checkpoint function before the next instruction; determining if registers must be reallocated for use in the next instruction; deciding if inserting the checkpoint function before the next instruction would cause an anomaly; and processing the anomaly through providing additional or altered functions not present in the platform independent assembly instruction module.
18. The method according to claim 17, the deciding step further including the following sub-steps: deciding whether a delay slot is present immediately prior to the next instruction; determining whether a label points to the next instruction; and determining alteration or use of processor condition codes near the next instruction.
19. The method according to claim 17, the inserting step further including the following steps: attempting to recognize use of global memory by the platform independent assembly instruction module; attempting to recognize memory initialization by the platform independent assembly instruction module; and attempting to recognize program code for structure copying used by the platform independent assembly instruction module.
20. The method according to claim 17, the inserting step further including the following steps: attempting to optimize the checkpoint function for speed.
21. The method according to claim 20, the attempting to optimize step further including the following sub-steps:
37
checking for an error; and performing a function call to a checkpoint function if an error is detected.
22. The method according to claim 1, the assembling step including the following sub-steps: compiling a machine description, the machine description describing format and nature of machine instructions for a processor, wherein the machine description comprises a machine description language having a header, a register set description, a list of individual register descriptions, an instruction set branch characteristics description, an instruction set formatting description, and an instruction set properties description.
23. The method according to claim 1, the composing step including the following sub-steps: receiving a platform independent object format module; first relinking each call to a system routine; second relinking a library system routine providing for linking dynamic libraries; and third relinking a signal system routine providing for setting up a signal handler.
24. The method according to claim 23, the first relinking step further including the following sub-steps: recognizing each system routine by reference to a preloaded table of system
38
routines; and replacing each reference to a system routine with a reference to a corresponding replacement routine, the replacement routine including a checkpoint.
25. The method according to claim 23, the second relinking step further including the following sub-steps: recognizing calls to the library system routine providing for linking dynamic libraries; and replacing each reference to the library system routine providing for linking dynamic libraries with a library replacement routine.
26. The method according to claim 23, the third relinking step further including the following sub-steps: recognizing calls to the signal system routine; and signal replacing each reference to the signal system routine with a signal replacement routine having a checkpoint signal handler.
27. The set of platform-independent assembler instructions according to claim 2, wherein the instruction comprises a placeholder block for a sequence of data-in-text.
28. The set of platform-independent assembler instructions according to claim 27, wherein the sequence of data-in-text comprises a block of text to be disassembled into
39
instructions.
29. The set of platform-independent assembler instructions according to claim 27, wherein the sequence of data-in-text comprises a block of data which appears in-line with instructions.
30. A method for executing a modified program object code, the method comprising the following steps installing a new handler to replace a system routine; calling a checkpoint function to review arguments to the system routine; determining if any memory access error would occur by calling the checkpoint function; and calling the system routine.
31. A method for executing a modified program object code, the method comprising the following steps installing a new checkpoint signal handler to catch a signal; catching the signal; checking if a signal_blocked bit associated with the signal is set; calling the signal handler if the signal_blocked bit is not set; setting a signal_asserted bit if the signal if the signal_blocked bit is set; and making a system call to block the signal if the signal_blocked bit is set.
40
32. The method according to claim 31, the method further including the following steps: setting the signal_blocked bit; reasserting the signal if the signal_asserted bit is set; and unsetting the signal_blocked bit.
33. A method for executing a modified program object code, the method comprising the following steps installing a new handler to modify a library object module to include checkpoints; locating a library object module to be dynamically linked; determining whether the library object module has been modified to include checkpoints; calling the system routine providing for linking dynamic libraries if the library object module has been modified to include checkpoints; and modifying the library object module if it has not been modified to include checkpoints.
41
34. In a system for checking memory access, a data structure comprising a tree data structure having a plurality of levels, each one of the plurality of levels having a plurality of nodes including a root node and at least one node, the at least one node having at least one entry indicating access to a region of memory, the at least one entry having a bit-pair indicating read/write access for a region of memory; and the size of the region of memory for entries in a particular node being responsive to a distance between the root node and the particular node.
35. The data structure according to claim 34, wherein the bit-pair for each one of the at least one node corresponds to a region of memory with upper address bits defined for the node and address bits defined for the bit-pair; and each one of the at least one node defines the number of address bits required to distinguish it from each other one of the at least one node.
36. The data structure according to claim 35, wherein the tree data structure includes two levels having a root node and a second level.
42
37. The data structure according to claim 36, wherein the root node includes 64K entries, each one of the 64K entries pointing to a node in the second level; and the second level includes at least one node, with each node in the second level having 64K entries, each one of the 64K entries in the second level having 8 bit-pairs.
38. The data structure according to claim 36, wherein each bit-pair in the second level corresponds to a single addressable byte and indicates read/write access for the single addressable byte; and each bit-pair in the root node corresponds to a region of 64K contiguous bytes and indicates read/write access for the 64K region.
43
STATEMENT UNDER ARTICLE 19
New Claims 10-38
The present invention pertains to a method and system for transforming and manipulating program object code. A set of program object code is transformed into a form which is independent of both the processor and the operating system with which the object code will execute. The transformed object code is manipulated to add or alter functions of the object code. The manipulated code is then reverse-transformed to program object code of the same type as the original object code.
New claims 10-38 further define the present invention. New claim 10 depends on independent claim 1 , and further defines the step of decomposing object code into a platform-independent object format. New claims 11-16 depend on independent claim 1, and further define the step of disassembling the platform- independent object format into a set of platform-independent assembler instructions. New claims 17-21 depend on independent claim 1, and further define the step of modifying the platform-independent assembler instructions. New claim 22 depends on independent claim 1 , and further defines the step of assembling the modified platform-independent assembler instructions into the platform- independent object format. New claims 23-26 depend on claim 1 , and further define the step of composing the platform-independent object format into the object code. New claims 27-29 depend on independent claim 2, and further define the set of platform-independent assembler instructions created by the disassembling step. New claims 30-33 further define a method for executing a modified program object code. New claims 34-38 further define a data structure used for checking memory access.
44
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AU73840/96A AU7384096A (en) | 1995-10-04 | 1996-10-01 | Transforming and manipulating program object code |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/538,961 US6021272A (en) | 1995-10-04 | 1995-10-04 | Transforming and manipulating program object code |
| US08/538,961 | 1995-10-04 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO1997012508A2 WO1997012508A2 (en) | 1997-04-10 |
| WO1997012508A3 WO1997012508A3 (en) | 1997-10-30 |
| WO1997012508B1 true WO1997012508B1 (en) | 1997-10-30 |
Family
ID=24149169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1996/015763 WO1997012508A2 (en) | 1995-10-04 | 1996-10-01 | Transforming and manipulating program object code |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6021272A (en) |
| AU (1) | AU7384096A (en) |
| WO (1) | WO1997012508A2 (en) |
Families Citing this family (67)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6960133B1 (en) * | 2000-08-28 | 2005-11-01 | Igt | Slot machine game having a plurality of ways for a user to obtain payouts based on selection of one or more symbols (power pays) |
| US5933635A (en) * | 1997-10-06 | 1999-08-03 | Sun Microsystems, Inc. | Method and apparatus for dynamically deoptimizing compiled activations |
| KR100248376B1 (en) * | 1997-10-28 | 2000-03-15 | 정선종 | Integrated dynamic-visual parallel debugger and its debugging method |
| EP0945793B1 (en) * | 1998-03-27 | 2003-06-04 | Motorola, Inc. | Computer system having a single pointer branch instruction and method |
| DE69815656T2 (en) * | 1998-03-27 | 2003-12-18 | Motorola Inc | Computer system with a multiple jump instruction pointer and procedure |
| US6230316B1 (en) | 1998-04-17 | 2001-05-08 | Symantec Corporation | Patching rebased and realigned executable files |
| US6158047A (en) * | 1998-07-08 | 2000-12-05 | Hewlett-Packard Company | Client/server system for fast, user transparent and memory efficient computer language translation |
| KR20010072477A (en) | 1998-08-13 | 2001-07-31 | 썬 마이크로시스템즈, 인코포레이티드 | Method and apparatus of translating and executing native code in a virtual machine environment |
| IL125846A0 (en) * | 1998-08-19 | 1999-04-11 | Emony | Incremental program update |
| US6260187B1 (en) | 1998-08-20 | 2001-07-10 | Wily Technology, Inc. | System for modifying object oriented code |
| US6883167B1 (en) * | 1999-08-04 | 2005-04-19 | Texas Instruments Incorporated | Method and system for visual linker |
| GB2363215B (en) * | 1999-11-30 | 2004-01-21 | Sgs Thomson Microelectronics | Disassembling object code |
| US7216332B2 (en) * | 2000-02-14 | 2007-05-08 | Arm Limited | Software object library selection |
| US6769985B1 (en) | 2000-05-31 | 2004-08-03 | Igt | Gaming device and method for enhancing the issuance or transfer of an award |
| US7695363B2 (en) * | 2000-06-23 | 2010-04-13 | Igt | Gaming device having multiple display interfaces |
| US7699699B2 (en) | 2000-06-23 | 2010-04-20 | Igt | Gaming device having multiple selectable display interfaces based on player's wagers |
| US6935955B1 (en) | 2000-09-07 | 2005-08-30 | Igt | Gaming device with award and deduction proximity-based sound effect feature |
| US6739973B1 (en) | 2000-10-11 | 2004-05-25 | Igt | Gaming device having changed or generated player stimuli |
| AU2002250146A1 (en) * | 2001-02-28 | 2002-09-19 | Wily Technology, Inc. | Detecting a stalled routine |
| US7512935B1 (en) * | 2001-02-28 | 2009-03-31 | Computer Associates Think, Inc. | Adding functionality to existing code at exits |
| US6966055B2 (en) * | 2001-03-02 | 2005-11-15 | International Business Machines Corporation | Optimizing post-link code |
| US7040983B2 (en) | 2001-03-21 | 2006-05-09 | Igt | Gaming device having a multi-round, multi-characteristic matching game |
| US6749502B2 (en) * | 2001-03-21 | 2004-06-15 | Igt | Gaming device having a multi-characteristic matching game |
| EP1248193A1 (en) * | 2001-04-02 | 2002-10-09 | Hewlett-Packard Company | Initialisation module for a device driver |
| US7581103B2 (en) | 2001-06-13 | 2009-08-25 | Intertrust Technologies Corporation | Software self-checking systems and methods |
| US7043716B2 (en) * | 2001-06-13 | 2006-05-09 | Arius Software Corporation | System and method for multiple level architecture by use of abstract application notation |
| US6738926B2 (en) * | 2001-06-15 | 2004-05-18 | Sun Microsystems, Inc. | Method and apparatus for recovering a multi-threaded process from a checkpoint |
| GB0120611D0 (en) * | 2001-08-24 | 2001-10-17 | Igt Uk Ltd | Video display systems |
| US7406424B2 (en) * | 2001-08-29 | 2008-07-29 | Hewlett-Packard Development Company, L.P. | Migration of a workflow system to changed process definitions |
| US7901291B2 (en) | 2001-09-28 | 2011-03-08 | Igt | Gaming device operable with platform independent code and method |
| US7666098B2 (en) | 2001-10-15 | 2010-02-23 | Igt | Gaming device having modified reel spin sounds to highlight and enhance positive player outcomes |
| US7708642B2 (en) * | 2001-10-15 | 2010-05-04 | Igt | Gaming device having pitch-shifted sound and music |
| US6848996B2 (en) * | 2001-10-15 | 2005-02-01 | Igt | Gaming device with sound recording changes associated with player inputs |
| US7149962B1 (en) * | 2002-03-01 | 2006-12-12 | General Electric Railcar Services Corporation | System and method for providing a gauge table |
| US8769517B2 (en) * | 2002-03-15 | 2014-07-01 | International Business Machines Corporation | Generating a common symbol table for symbols of independent applications |
| US20040045018A1 (en) * | 2002-08-27 | 2004-03-04 | Nair Sreekumar R. | Using address space bridge in postoptimizer to route indirect calls at runtime |
| US7814476B2 (en) * | 2002-10-31 | 2010-10-12 | Oracle America, Inc. | Systems and methods for updating software |
| US7844734B2 (en) * | 2002-11-18 | 2010-11-30 | Innopath Software, Inc. | Dynamic addressing (DA) using a centralized DA manager |
| US7789748B2 (en) * | 2003-09-04 | 2010-09-07 | Igt | Gaming device having player-selectable music |
| US7105736B2 (en) * | 2003-09-09 | 2006-09-12 | Igt | Gaming device having a system for dynamically aligning background music with play session events |
| US7776529B2 (en) | 2003-12-05 | 2010-08-17 | Life Technologies Corporation | Methine-substituted cyanine dye compounds |
| US8043155B2 (en) * | 2004-10-18 | 2011-10-25 | Igt | Gaming device having a plurality of wildcard symbol patterns |
| US7409691B2 (en) * | 2004-12-03 | 2008-08-05 | Microsoft Corporation | Extending operating system subsystems |
| US7587722B2 (en) * | 2004-12-03 | 2009-09-08 | Microsoft Corporation | Extending operating system subsystems |
| US7676795B2 (en) * | 2005-01-13 | 2010-03-09 | International Business Machines Corporation | Error detection in a data processing system |
| US20060176496A1 (en) * | 2005-02-04 | 2006-08-10 | Leshek Fiedorowicz | Extensible transformation framework |
| US7598390B2 (en) | 2005-05-11 | 2009-10-06 | Life Technologies Corporation | Fluorescent chemical compounds having high selectivity for double stranded DNA, and methods for their use |
| US8381198B2 (en) * | 2005-08-15 | 2013-02-19 | Sony Ericsson Mobile Communications Ab | Systems, methods and computer program products for safety checking executable application programs in a module |
| US7979839B2 (en) * | 2006-08-23 | 2011-07-12 | Wolf William M | Method for employing the computer in the creative act of programming |
| US8656381B2 (en) * | 2006-12-07 | 2014-02-18 | International Business Machines Corporation | Presenting machine instructions in a machine-independent tree form suitable for post-link optimizations |
| US8591308B2 (en) | 2008-09-10 | 2013-11-26 | Igt | Gaming system and method providing indication of notable symbols including audible indication |
| US9152456B2 (en) * | 2009-01-23 | 2015-10-06 | Oracle America, Inc. | Efficient per-thread safepoints and local access |
| KR101579589B1 (en) * | 2009-02-12 | 2015-12-22 | 삼성전자 주식회사 | Static branch prediction method for pipeline processor and compile method therefor |
| US8438558B1 (en) | 2009-03-27 | 2013-05-07 | Google Inc. | System and method of updating programs and data |
| US9329846B1 (en) | 2009-11-25 | 2016-05-03 | Parakinetics Inc. | Cooperative program code transformation |
| US8448027B2 (en) | 2010-05-27 | 2013-05-21 | International Business Machines Corporation | Energy-efficient failure detection and masking |
| US8460090B1 (en) | 2012-01-20 | 2013-06-11 | Igt | Gaming system, gaming device, and method providing an estimated emotional state of a player based on the occurrence of one or more designated events |
| US9245407B2 (en) | 2012-07-06 | 2016-01-26 | Igt | Gaming system and method that determines awards based on quantities of symbols included in one or more strings of related symbols displayed along one or more paylines |
| US8740689B2 (en) | 2012-07-06 | 2014-06-03 | Igt | Gaming system and method configured to operate a game associated with a reflector symbol |
| US9192857B2 (en) | 2013-07-23 | 2015-11-24 | Igt | Beat synchronization in a game |
| US9947170B2 (en) | 2015-09-28 | 2018-04-17 | Igt | Time synchronization of gaming machines |
| US9703603B1 (en) * | 2016-04-25 | 2017-07-11 | Nxp Usa, Inc. | System and method for executing accelerator call |
| US20180275976A1 (en) * | 2017-03-22 | 2018-09-27 | Qualcomm Innovation Center, Inc. | Link time optimization in presence of a linker script using path based rules |
| US10223085B2 (en) * | 2017-04-28 | 2019-03-05 | International Business Machines Corporation | Discovering high-level language data structures from assembler code |
| US10776249B2 (en) * | 2018-07-06 | 2020-09-15 | International Business Machines Corporation | Flexible and in-line register comparison for bug analysis |
| CN109828758A (en) * | 2018-12-05 | 2019-05-31 | 苏州蜗牛数字科技股份有限公司 | A kind of analytic method of SO file |
| CN112269597B (en) * | 2020-10-23 | 2023-03-24 | 中国人民解放军战略支援部队信息工程大学 | Method and system for detecting abnormal behavior of processor instruction |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4694420A (en) * | 1982-09-13 | 1987-09-15 | Tektronix, Inc. | Inverse assembly method and apparatus |
| US5450575A (en) * | 1991-03-07 | 1995-09-12 | Digital Equipment Corporation | Use of stack depth to identify machine code mistakes |
| US5193180A (en) * | 1991-06-21 | 1993-03-09 | Pure Software Inc. | System for modifying relocatable object code files to monitor accesses to dynamically allocated memory |
| US5539907A (en) * | 1994-03-01 | 1996-07-23 | Digital Equipment Corporation | System for monitoring computer system performance |
| US5590331A (en) * | 1994-12-23 | 1996-12-31 | Sun Microsystems, Inc. | Method and apparatus for generating platform-standard object files containing machine-independent code |
-
1995
- 1995-10-04 US US08/538,961 patent/US6021272A/en not_active Expired - Lifetime
-
1996
- 1996-10-01 AU AU73840/96A patent/AU7384096A/en not_active Abandoned
- 1996-10-01 WO PCT/US1996/015763 patent/WO1997012508A2/en active Application Filing
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