WO1996025784A1

WO1996025784A1 - Method and apparatus for reducing the power consumption of switchmode electric vehicle battery chargers while operating at low power levels

Info

Publication number: WO1996025784A1
Application number: PCT/US1996/000913
Authority: WO
Inventors: Alan G. Cocconi
Original assignee: Ac Propulsion, Inc.
Priority date: 1995-02-15
Filing date: 1996-01-24
Publication date: 1996-08-22
Also published as: AU4765196A

Abstract

A method and apparatus provide substantially reduced tare losses in a switchmode unity power factor electric vehicle battery charger (18) operating in a low power output regime while maintaining power quality by turning the a.c. input current (12) to the charger (18) off for periods of times beginning and ending at zero crossings of the a.c. line input waveform to the charger (18). By gating the charge circuitry on and off at the zero crossings of the a.c. line voltage (12) the power quality of the original charger (18) is retained, and the reduced duty cycle of the charger power circuit (20) provides substantial power savings. The charge circuit is preferably operated in a high current (and hence most efficient) mode during the 'on' periods. The fraction of cycles that the charger (18) is off may be N-X out of N (for X∫N and N, X integers) cycles or some other value and may be non-sequential if desired.

Description

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TITLE OF THE INVENTION

METHOD AND APPARATUS FOR REDUCING THE POWER CONSUMPTION OF

SWITCHMODE ELECTRIC VEHICLE BATTERY CHARGERS WHILE OPERATING AT

LOW POWER LEVELS

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to unity power factor switchmode battery charging systems intended for use in systems which require large amounts of power while being charged. It is particularly well suited to use in electric vehicle charging systems. More particularly, the present invention is directed to a method and apparatus for reducing the power consumption of such switchmode battery chargers while they are operating at relatively low power levels, such as during the equalization phase of the charging a large battery bank.

2. The Prior Art

Advanced electrically powered vehicles have recendy begun to incorporate unity power factor switchmode battery chargers to meet the power quality requirements imposed by the power generating utilities for power factor and harmonic distortion. When such chargers are designed to operate at high power levels (typically about 20 kilowatts) to provide the rapid recharge that is essential for a practical electric vehicle they usually have high standby (or tare) losses when operated at near zero power as is common for the equalization phase of the charge cycle. These losses (typically about 300 watts) can add substantially to the energy cost of operating an electric vehicle. A large number of schemes exist for charging electric vehicle battery systems. For example, U.S. Patent No. 5.099J86, hereby incorporated herein by reference, describes a system which utilizes the motor windings as an inductor of a switchmode power supply while the vehicle is in charge mode. While reasonably efficient for high power/high current charging, such systems exhibit tare losses under relatively low power low current charge conditions such as those existing during the equalization phase of a charge which is normally employed after a high current charge phase.

Prior an schemes for reduction of such tare losses include the concept of adding a separate low power/low current charger and switching from the high power/high current charger to the low power/low current charger for equalization phase charging. This scheme has the drawback that it requires redundant circuitry as well as switchover circuitry which adds to the cost and weight of the electric vehicle.

Accordingly, it would be desirable to reduce such tare losses while continuing to have a single vehicle charger perform both high power charging and low power charging.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention, a method and apparatus are provided for substantially reducing tare losses while maintaining power quality by turning off the ac input current to the charger power circuit for periods of time beginning and ending at zero crossings of the ac line input waveform to the charger. By gating the charge circuitry on and off at the zero crossings of the ac line voltage the power quality of the original charger is retained, and the reduced duty cycle of the charger power circuitry provides substantial power savings. The charge circuitry is preferably operated in a high current charge (and hence most efficient) mode during the

"on" periods while the "off periods provide the reduced duty cycle and reduced average power and current to the battery.

According to a second aspect of the present invention, the fraction of cycles that the charger is off may be N - X out of N cycles for X < N, where N and X are integers.

OBJECTS AND ADVANTAGES OF THE INVENTION

Accordingly, it is an object of the present invention to provide a method and apparatus for charging an electric vehicle battery which exhibits improved economy of operation. It is a further object of the present invention to provide a method and apparatus for charging an electric vehicle battery which exhibits improved efficiency and reduced tare losses.

Yet a further object of the present invention is to provide a method and apparatus for high power charging of a battery with reduced losses during the equalization phase of charging.

Still another object of the present invention is to provide a method and apparatus for increasing the charging efficiency of electric vehicle battery chargers without adding redundant circuitry and components.

These and many other objects and advantages of the present invention will become apparent to those of ordinary skill in the an from a consideration of the drawings and ensuing description of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of the apparatus used to increase the efficiency of battery chargers according to a presently prefened embodiment of the present invention.

FIG. 2A depicts the input ac current vs. time for a standard charger or the charger according to the present invention in high current charge mode.

FIG. 2B depicts the input ac current vs. time for a standard charger in low current charge mode without the benefit of the present invention.

FIG. 2C depicts the input ac current vs time for a charger according to the present invention in low current charge mode for N=5.

FIG. 3 is a schematic diagram showing a presently preferred embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Those of ordinary skill in the an will realize that the following description of the present invention is illustrative only and is not intended to be in any way limiting. Other embodiments of the invention will readily suggest themselves to such skilled persons from an examination of the within disclosure.

The present invention may be implemented in all known electric vehicle charging systems which employ switchmode chargers and operate under the control of a microprocessor. It is particularly useful with charging systems which are optimally efficient delivering high current to the battery and suffer from tare losses when operated in a low current charge mode, such as during the equalization phase of the battery charge cycle.

Batteries may be charged in a number of ways. Some schemes apply a constant current for a time, other apply a constant voltage with the current varying depending upon the state of charge of the battery, more sophisticated charging schemes employ a plurality of charge phases each having different voltage and current characteristics. Common to most schemes is the fact that batteries under charge represent a changing load having the characteristics of both a resistor and a capacitor. A common technique for charging the battery of an electrically powered vehicle is to apply a great deal of charge power (voltage x current) at the beginning phase of the charge cycle in order to minimize the time required to charge the battery. This is referred to herein as the high power charge mode. This is generally followed by a low power/low current charge phase or equalization phase at the end of the charge cycle which gives the battery an opportunity to equalize the voltage among its various cells. This is referred to herein as the low power charge mode. Other intermediate charge modes may also be employed between the high power charge mode and the low power charge mode as is known to those of ordinary skill in the ait.

Turning now to the drawings, FIG. 1 is a block diagram of the apparatus used to increase the efficiency of battery chargers according to a presently preferred embodiment of the present invention. Battery 10 powers an electrically powered vehicle. When the vehicle is parked, placed in a charge mode and connected to the power grid for charging, an ac power signal (typically 60 Hz at 120V or 240V in the United States and 50 Hz at 240V overseas) 12 is supplied on lines 14, 16.

Battery charger 18 comprises power circuit 20 and control circuit 22 and is powered by lines 14, 16. The control circuit 22 is continuously powered and may include a microprocessor and similar control circuitry as is well known to those of ordinary skill in the an. Power circuit 20 operates under control of control circuit 22 and generates the filtered high current DC power needed to charge the battery. A zero crossing detector 24 is coupled to the ac input voltage signal 12 and detects when the sinusoidal ac input voltage crosses zero voltage which it does 120 times per second (twice per cycle) in a 60 Hz system. To implement a 1 out of N cycles duty cycle, zero crossing detector 24 is connected to the clock ("elk") input 26 of a divide by N counter 28. The divide by N counter is incremented every other zero crossing according to this presently preferred embodiment The "zero" state output 30 from divide by N counter 28 is used to gate (with AND gate 34) the "enable" signal on line 32 that would ordinarily go from the battery charger control circuit 22 to power circuit 20. Additionally, a low power demand detection circuit 36 monitors the battery charger operation over line 38 and allows the counter 28 to operate only when the power throughput is below or is to be below a given threshold. During high power operation, counter 28 is disabled and power circuit 20 operates continuously. It is also possible to switch between different values of N depending upon operating conditions, for example, if several different levels of current are required at different periods during the charge cycle, N may be changed to different values representing different duty cycles. It will also appear to those of skill in the an that the precise system described herein of using 1 out of N cycles to gate the charger on could easily be substituted for any system that provides the same net duty cycle decrease, whether a 1 out of N system, or whether another sequence or even pseudo-random sequence is used. For example, the duty cycle may be N-X out of X for X < N where N, X are integers. Those of ordinary skill in the an will realize that an optimum duty cycle for low power charge mode will depend upon the characteristics of the battery, the capabilities of the charger employed, and potentially environmental factors such as battery temperature and the like. It is also possible to construct the charger in such a manner that the values of N and X may be set by a user, for example, with dip switches or with some other conventional type of user interface to an electrical device. FIG. 2A depicts the input ac current vs. time for a standard charger or the charger according to the present invention in high current charge mode. FIG. 2B depicts the input ac current vs. time for a standard charger in low current charge mode without the benefit of the present invention. FIG. 2C depicts the input ac current vs time for a charger according to the present invention in low current charge mode for N=5. As can be seen, the instantaneous charge current is approximately the same as in high power charge mode, but the average current is reduced to 20% of high power charge mode by the duty cycle decrease.

FIG. 3 is a schematic diagram showing a presently preferred embodiment of the present invention. The circuit shown in FIG.3 is an actual implementation of the block diagram of FIG. 1 designed to interface with the AC- 100 and AC- 150 electric vehicle drive trains and recharge systems presently available from AC Propulsion, Inc. of San Dimas, California.

U1A (40) is a buffer for the LINE CURRENT LIMIT SETTING (82) signal from the charger control circuit. This signal is a dc level that represents the user setting for the maximum allowable current draw from the outlet that the charger is currently connected to. A setting of 0V represents 0A line current permitted and a setting of 5V represents 100A permitted on a 240V power line or 50A permitted on a 120V line. Intermediate settings represent intermediate values. U1A is preferably a standard LM358 op-amp configured as shown. U1B (42), also an LM358, forms a limiter that does not allow the voltage at the anode of CR1 (44) to exceed 1.5 V. When the circuit is in high power mode Ql (46) is on and comparator U2A (48), an LM393 op-amp, will switch to a low state if the LINE CURRENT COMMAND (84) from the charger control circuit 22

(on line 38 in FIG. 1) representing the actual current being drawn from the ac line falls below 32% of the voltage at the anode of CR1 (44). When this occurs Cl (50), a 22 μF electrolytic capacitor, begins to discharge and after a few seconds Schmitt trigger U3A (52 — pan of a 74HC14-type Schmitt trigger input hex inverter) will switch initiating low power mode operation. If comparator U2A (48) ever goes high, the buffer formed by U3C (54) and U3D (56) will rapidly recharge Cl

(50) through diode CR2 (58) and return the charger to high power operation mode.

According to a presently preferred embodiment of the present invention, when in low power charge mode, the gain of the control circuit from the LINE CURRENT LIMIT SETTING (82) and the LINE CURRENT COMMAND (84) to the actual instantaneous ac line current is increased by a factor of 2.0 (via LINE CURRENT LIMIT GAIN CHANGE signal 96), and Ql (46) is turned off so that U2A (48) will switch high if the LINE CURRENT COMMAND (84) is greater than 91% of the LINE CURRENT LIMIT SETTING (82), effectively allowing a maximum single cycle current draw of 1.82 times the LINE CURRENT LIMIT SETTING (82). Note that this corresponds to an RMS current draw of only 81% of the original line current limit when "N" is 5 (the duty cycle is 0.20).

When operating in low power charge mode, the clock input 60 of U4 (62) (an HC4017 divide by 10 counter hard configured as shown to be a divide by 5 counter) is not inhibited and the zero crossing detector 64 formed by U2B (66) (an LM393) and U3E (68) (a Schmitt trigger input 74HC14-type inverter) generates positive going clock transitions corresponding to the positive going zero crossings of the SCALED AC LINE VOLTAGE (86) waveform input from the charger control circuit. The zero crossings of this signal correspond to the positive going zero crossings of the input ac signal, however the voltage amplitude has been divided by 200. U4 (62) is a decade counter with decoded outputs and has output Q5 (70) connected to the counter reset input (72) which effectively hardwires it for divide by 5 operation. When output Q0 (74) is high, the ENABLE (88) signal to the power circuit 20 from the control circuit 22 is unmodified by this circuit and the power circuit 20 operates normally. When QO (74) is low, the ENABLE line (90) to the power circuit 20 is forced low by gates U5A (76) and U5B (78) as shown forcing die powe circuit 20 off. If the vehicle is in drive mode (as opposed to charge mode), then the RUN/CHARGE signal (92) from the control circuit is high and gate U5A (76) will ensure that this efficiency improvement circuit cannot affect the ENABLE signal (90) and erroneously turn off the power circuit 20. When the power circuit 20 is disabled by QO (74) being low, the line current command (LINE CURRENT COMMAND GATE (94)) to the unity power factor pulse width modulation (PWM) control of the control circuit is also gated off to prevent the feedback loop integrator from "winding up" and causing undesirable line spikes at the next positive going transition of QO (74). Diode CR3 (80), a type 1N914, ensures that U4's (62) clock input 60 can only be inhibited when QO (74) is high and the power circuit 20 is operating. This arrangement ensures that all transitions to or from the low power charge mode occur at ac line zero crossings in order not to generate undesirable line transients. The other components of the circuit not specifically called out here are as set forth in FIG. 3.

While illustrative embodiments and applications of this invention have been shown and described, it would be apparent to those skilled in the an that many more modifications than have been mentioned above are possible without departing from the inventive concepts set forth herein. The invention, therefore, is not to be limited except in the spirit of the appended claims.

Claims

CLAIMSWhat is claimed is:

1. An ac powered switchmode battery charger for connection to an ac mains circuit, said charger including an ac powered power circuit for charging the battery of an electric vehicle, said charger comprising: first means for charging the battery during a selected period of time in a high power charge mode with a first average current exceeding a first current value; second means for charging the battery in a low power charge mode subsequent to said selected period time with a second average current not exceeding said first current value; said second means including zero crossing detecting means for detecting zero crossings of the ac mains circuit and third means responsive to said zero crossing detecting means for interrupting ac current to the power circuit of the charger between selected zero crossings of the ac mains circuit-

2. A battery charger according to claim 1 wherein said zero crossing detecting means detects every other zero crossing of the ac mains circuit

3. A battery charger according to claim 2 wherein said selected zero crossings comprise N-X out of N of said every other zero crossing, for X < N and where N and X are integers.

4. An ac powered switchmode battery charger having an ac voltage input, said charger including an ac powered power circuit for charging a battery of an electrically powered vehicle at a plurality of current levels including a high current mode and at least one lower current mode, said charger charging said battery at a lower average current while in said lower current mode than when in said high current mode, said charger comprising: first means for placing said charger into said lower current mode; a zero crossing detector for forming a zero crossing signal indicative of the times at which the ac voltage input to the charger crosses zero voltage; interruption means responsive to said zero crossing signal and said first means for interrupting ac current to the power circuit of the charger between selected zero crossings of the ac mains circuit

5. A charger according to claim 2 wherein said interruption means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N-X out of N positive going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

6. A charger according to claim 2 wherein said interruption means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N-X out of N negative going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

7. A charger according to claim 5 wherein N = 5 and X = 1.

8. A charger according to claim 6 wherein N = 5 and X = 1.

9. A circuit for modifying the operation of an ac voltage input switchmode battery charger, said charger including an ac powered power circuit for charging a battery of an electricall powered vehicle, said circuit for modifying comprising: low power charge mode detection means for detecting when the charger is to be placed into low power charge mode; zero crossing detection means for detecting zero voltage crossings of the ac voltage input t the charger; duty cycle reduction means responsive to said low power charge mode detection means and said zero crossing detection means for interrupting ac current to the power circuit of the charger between selected zero crossings of the ac mains circuit

10. A circuit according to claim 9 wherein said interruption means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N-X out of N positive going zero crossings of the ac voltage input to die charger where X < N and N and X are integers.

1 1. A circuit according to claim 9 wherein said interruption means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N-X out of N negative going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

12. A circuit according to claim 10 wherein N - 5 and X = 1.

13. A circuit according to claim 11 wherein N = 5 and X = 1.

14. A circuit according to claim 10 wherein N may be set by a user.

15. A circuit according to claim 11 wherein N may be set by a user.

16. An ac voltage input switchmode battery charger, said charger including an ac powered power circuit for charging a battery of an electrically powered vehicle, said charger comprising: a computer processor operating under the control of software instructions for evaluating signals from the battery and determining when to charge the battery in a low power charge mode; zero crossing detection means for detecting zero voltage crossings of the ac input voltage to the charger; duty cycle reduction means contained within said software instructions responsive to said computer processor and said zero crossing detection means for interrupting ac current to the power circuit of the charger between selected zero crossings of the ac mains circuit

17. A charger according to claim 16 wherein said duty cycle reduction means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N- X out of N positive going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

18. A charger according to claim 16 wherein said duty cycle reduction means operates to interrupt current to the power circuit of the battery charger during periods of time defined by N- X out of N negative going zero crossings of the ac voltage input to the charger where X < N and

N and X are integers.

19. A charger according to claim 17 wherein N = 5 and X = 1.

20. A charger according to claim 18 wherein N = 5 and X = I.

21. A charger according to claim 17 wherein N may be set by a user.

22. A charger according to claim 18 wherein N may be set by a user.

23. A method of operating an ac voltage input switchmode battery charger, said charger including an ac powered power circuit for charging a battery of an electrically powered vehicle, said method comprising: evaluating signals from the battery; determining when to charge the battery in a low power charge mode; detecting zero voltage crossings of the ac input voltage to the charger; reducing the duty cycle of die charger when in said low power charge mode by interrupting ac current to the power circuit of the charger between selected zero crossings of the ac mains circuit. 96/25784 S96/00913

24. A method according to claim 23 wherein said reducing the duty cycle step is carried out by interrupting current to the power circuit of the battery charger during periods of time defined by N-X out of N positive going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

25. A method according to claim 23 wherein said reducing die duty cycle step is carried out by interrupting current to die power circuit of the battery charger during periods of time defined by N-X out of N negative going zero crossings of the ac voltage input to the charger where X < N and N and X are integers.

26. A method according to claim 24 wherein N = 5 and X = 1.

27. A method according to claim 25 wherein N = 5 and X = 1.

28. A method according to claim 24 wherein N may be set by a user.

29. A method according to claim 25 wherein N may be set by a user.