WO1996001027B1 - Analog video chromakey mixer - Google Patents
Analog video chromakey mixerInfo
- Publication number
- WO1996001027B1 WO1996001027B1 PCT/US1995/008279 US9508279W WO9601027B1 WO 1996001027 B1 WO1996001027 B1 WO 1996001027B1 US 9508279 W US9508279 W US 9508279W WO 9601027 B1 WO9601027 B1 WO 9601027B1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- video signal
- analog video
- analog
- time delay
- input
- Prior art date
Links
- 230000001934 delay Effects 0.000 claims abstract 12
- 230000000007 visual effect Effects 0.000 claims 1
Abstract
An improved technique for mixing picture signals directed at a monitor screen. Two analog video signals (such as an analog VGA input and an analog RGB signal produced in response to a stored digital still or moving image) may be multiplexed in analog form. An analog chromakey mixer detects a background color in the first video signal (such as the analog VGA input), and replaces the portion of that first video signal with the second video signal. The time delays of the first video signal and the second video signal may be adjusted so that they reach the monitor screen (by means of a multiplexer output) at the same time. An alignment detector may attempt to align two known signals (such as a VGA sync signal and a signal generated for this purpose), and may adjust a set of time delays in the analog chromakey mixer until the time difference between the first and second video signals falls below a threshold.
Claims
AMENDED CLAIMS
[received by the International Bureau on 8 January 1996 (08.01.96); original claims 1, 2, 17 and 18 cancelled; original claims 3, 6, 9-14, 19, 27 and 29 amended; new claims 31 and 32 added; remaining claims unchanged (9 pages)]
3. A device, comprising
means for receiving a first analog video signal;
means for receiving a second analog video signal; means for detecting a chromakey in said first analog video signal and for generating a comparison signal in response thereto; means for replacing a portion of said first analog video signal with a portion of
said second analog video signal in response to said comparison signal; means for measuring a difference between a first time delay and a second time
delay, said first time delay comprising a delay from input to output of said first analog video signal, said second time delay comprising a delay from input to output of said second analog
video signal; and means for adjusting said at least one time delay, responsive to said means for measuring, so that said first time delay and said second time delay are substantially equal.
4. A device as in claim 3, wherein said means for adjusting comprises
means for supplying a selected first video input to said means for receiving said
first analog video signal; means for supplying a selected second video input to said means for receiving
said second analog video signal; means for comparing an output of said means for replacing with a selected
analog video signal; and
means for controlling at least one time delay circuit in response to said means
for comparing.
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5. A device as in claim 3, wherein said means for adjusting comprises
means for supplying a selected first video input to said means for receiving said
first analog video signal; means for supplying a selected second video input to said means for receiving
said second analog video signal; means for comparing an output of said means for replacing with a selected analog video signal; and means for controlling at least one time delay circuit to minimize a difference
between said output of said means for replacing and said selected analog video signal.
6. A device as in claim 3, wherein said means for adjusting comprises
means for supplying a selected first video input to said means for receiving said
first analog video signal; means for supplying a selected second video input to said means for receiving said second analog video signal; means for comparing an output of said means for replacing with a selected
analog video signal; means for tentatively selecting a first and a second one of a plurality of possible time delays for said time delay circuit; means for examining an output of said means for comparing for said first and
said second one possible time delays, responsive to said means for tentatively selecting; and
means for permanently selecting said first or said second one possible time
delay in response to said means for examining.
7. A device as in claim 6, wherein said means for tentatively selecting repeatedly selects possible combinations of time delays for a plurality of time delay circuits
until a difference between said output of said means for replacing and said selected analog
video signal falls below a selected threshold.
8. A device as in claim 6, wherein said means for tentatively selecting
selects substantially all possible combinations of time delays for a plurality of time delay
circuits, and wherein said means for permanently selecting selects one of said substantially all possible combinations that minimizes a difference between said output of said means for
replacing and said selected analog video signal.
9. A device as in claim 3, wherein said first analog video signal is an analog VGA input.
10. A device as in claim 3, wherein said means for replacing comprises an
analog multiplexer coupled to said first analog video signal, said second analog video signal,
and said comparison signal.
11. A device as in claim 3, wherein said second analog video signal is an analog RGB signal produced in response to a stored digital still or moving image.
12. A video system, comprising
a digital signal processor coupled to a source of digital video;
25
a video D/A converter coupled to an output of said digital signal processor;
an analog video input; a chromakey detector coupled to said analog video input; an analog multiplexer coupled to an output of said video D/A converter, to said
analog video input, and to said chromakey detector; at least one adjustable delay coupled to an input of said analog multiplexer; and
an alignment detector coupled to an output of said analog multiplexer.
13. A video system, comprising a sync input; a phase locked loop coupled to said sync input; a first delay circuit coupled to said phase locked loop,
a digital signal processor coupled to said sync input and to said first time delay
circuit; a video D/A converter coupled to an output of said digital signal processor; a second and a third delay circuit coupled to said digital signal processor;
an analog video input;
a chromakey detector coupled to said analog video input; a logic circuit coupled to said chromakey detector and to said second and third
delay circuits; a fourth delay circuit coupled to said analog video input; an analog multiplexer coupled to an output of said D/A converter, to an output of said fourth delay circuit, and to said logic circuit; and
an alignment detector coupled to an output of said analog multiplexer.
26
14. A video system, comprising means for receiving analog video;
a digital signal processor coupled to a source of digital video; a D/A converter coupled to said digital signal processor;
an analog chromakey mixer coupled to an output of said D/A converter and to said means for receiving analog video;
at least one adjustable delay coupled to an input of said analog chromakey mixer; and
an alignment detector coupled to an output of said analog multiplexer.
15. A video system as in claim 14, comprising a video monitor coupled to an output of said analog chromakey mixer.
16. A video system as in claim 14, wherein said means for receiving analog
video is coupled to a monitor driver circuit.
19. A method comprising the steps of
receiving a first analog video signal;
receiving a second analog video signal; detecting a chromakey in said first analog video signal and generating a
comparison signal in response thereto; replacing a portion of said first analog video signal with a portion of said second analog video signal in response to said comparison signal;
2 7
adjusting at least one time delay between said means for receiving a first analog video signal and said means for replacing; measuring a difference between a first time delay and a second time delay, said first time delay comprising a delay from input to output of said first analog video signal, said
second time delay comprising a delay from input to output of said second analog video signal; and adjusting at least one time delay, responsive to said step of measuring, so that said first time delay and said second time delay are substantially equal.
20. A method as in claim 19, wherein said step of adjusting comprises the
steps of supplying a selected first video input; supplying a selected second video input; comparing a result of said step of replacing with a selected analog video signal;
and
controlling at least one time delay circuit in response to said step of comparing.
21. A method as in claim 19, wherein said step of adjusting comprises the
steps of
supplying a selected first video input;
supplying a selected second video input; comparing a result of said step of replacing with a selected analog video signal;
and controlling at least one time delay circuit to minimize a difference between said
result of said step of replacing and said selected analog video signal.
2 8
22. A method as in claim 19, wherein said step of adjusting comprises the
steps of supplying a selected first video input; supplying a selected second video input;
comparing a result of said step of replacing with a selected analog video signal; tentatively selecting a first and a second one of a plurality of possible time delays for said time delay; examining a result of said step of comparing for said first and said second one
possible time delays; and
permanently selecting said first or said second one possible time delay in response to said step of examining.
23. A method as in claim 22, wherein said step of tentatively selecting
selects substantially all possible combinations of time delays for a plurality of time delay circuits, and wherein said step of permanently selecting selects one of said substantially all
possible combinations that minimizes a difference between said result of said step of replacing and said selected analog video signal.
24. A method as in claim 22, wherein said step of tentatively selecting is
performed repeatedly to select possible combinations of time delays for a plurality of time
delay circuits until a difference between said result of said step of replacing and said selected
analog video signal falls below a selected threshold.
2 9
25. A method as in claim 24, wherein said step of receiving a second analog video signal comprises the steps of producing an analog RGB signal in response to a stored digital still or moving image, and receiving said analog RGB signal.
26. A method as in claim 24, wherein said step of replacing comprises the step of using an analog multiplexer coupled to said first analog video signal, said second analog video signal, and said comparison signal.
27. A method comprising the steps of receiving a first analog video signal;
converting a source of digital video to a second analog video signal; multiplexing said first analog video signal and said second analog video signal; measuring a difference between a first time delay ad a second time delay, said first time delay comprising a delay from input to output of said first analog video signal, said second time delay comprising a delay from input to output of said second analog video signal;
and adjusting at least one time delay, responsive to said step of measuring, so that said first time delay and said second time delay are substantially equal.
28. A video system as in claim 27, comprising the step of displaying a result of said step of multiplexing.
29. A method comprising the steps of receiving a first analog video signal;
30
detecting a chromakey in said first analog video signal; converting a source of digital video to a second analog video signal; replacing a portion of said first analog video signal with a portion of said second analog video signal in response to said chromakey; measuring a difference between a first time delay ad a second time delay, said first time delay comprising a delay from input to output of said first analog video signal, said
second time delay comprising a delay from input to output of said second analog video signal;
and adjusting at least one time delay, responsive to said step of measuring, so that said first time delay and said second time delay are substantially equal.
30. A method as in claim 29, comprising the step of displaying a result of
said step of replacing.
31. A device as in claim 4, wherein said selected analog video signal
comprises an all-black signal.
32. A method as in claim 20, wherein said selected analog video signal
comprises an all-black signal.
3 1
Statement Under Article 19
The invention provides a system in which two analog signals may be multiplexed in analog form, by detecting a background color in a first video signal and replace that portion of the first video signal with the second video signal. The time delays of the two signals are adjusted so that they reach the monitor screen at the same time, by aligning two known signals and adjusting a set of time delays in the analog chromakey mixer until the difference falls below a threshold.
In US A 4,829,366 (Penney), the relative gain and delay for two signals is displayed by impressing a "burst packet" on each of the two signals, with known phase relationship, and subtracting the output signals; the displayed envelope of the difference signal allows a human observer to determine whether there is relative gain or delay. Penney does not show or suggest any means for adjusting a time delay for either input signal.
Although US A 4,122,490 (Lish) recognizes that visual artifacts appear at the interface between the backdrop and the keying object, Lish teaches an entirely different method for addressing that problem. See Lish col. 6, lines 17-53, and figure 3. In Lish, no time delay is adjusted; rather, a differentiator 54 detects the interface and controls the switch 16 to always operate at the same time during each frame.
Accordingly, Lish teaches against adjusting a time delay for either input signal, and therefore teaches against use of Penney. Also, because Lish operates directly on NTSC signals for broadcast or display, it would be undesirable to impress a "burst packet" on either such signal or to allow a pattern resulting from doing so to appear on the display.
Even if Lish and Penney were combined, there would still be no means for adjusting a time delay as recited in claim 3, or a step of adjusting a time delay as recited in claim 19. Lish does not even suggest that delay line 12a and 14a could be adjustable.
Accordingly, the claimed subject matter involves an inventive step over the cited art.
32
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/765,464 US6421096B1 (en) | 1994-06-28 | 1995-06-27 | Analog video chromakey mixer |
| AU29151/95A AU2915195A (en) | 1994-06-28 | 1995-06-27 | Analog video chromakey mixer |
| US09/900,529 US6501512B2 (en) | 1994-06-28 | 2001-07-06 | Method and apparatus for automatic calibration of analog video chromakey mixer |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/268,764 US5528309A (en) | 1994-06-28 | 1994-06-28 | Analog video chromakey mixer |
| US08/268,764 | 1994-06-28 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| WO1996001027A1 WO1996001027A1 (en) | 1996-01-11 |
| WO1996001027B1 true WO1996001027B1 (en) | 1996-02-08 |
Family
ID=23024377
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1995/008279 WO1996001027A1 (en) | 1994-06-28 | 1995-06-27 | Analog video chromakey mixer |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US5528309A (en) |
| AU (1) | AU2915195A (en) |
| WO (1) | WO1996001027A1 (en) |
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| US5434913A (en) | 1993-11-24 | 1995-07-18 | Intel Corporation | Audio subsystem for computer-based conferencing system |
| US5450542A (en) | 1993-11-30 | 1995-09-12 | Vlsi Technology, Inc. | Bus interface with graphics and system paths for an integrated memory system |
| US5416749A (en) | 1993-12-10 | 1995-05-16 | S3, Incorporated | Data retrieval from sequential-access memory device |
| US5528309A (en) * | 1994-06-28 | 1996-06-18 | Sigma Designs, Incorporated | Analog video chromakey mixer |
| JP2933487B2 (en) | 1994-07-15 | 1999-08-16 | 松下電器産業株式会社 | How to convert chroma format |
| US5638130A (en) | 1995-05-25 | 1997-06-10 | International Business Machines Corporation | Display system with switchable aspect ratio |
| US5982459A (en) | 1995-05-31 | 1999-11-09 | 8×8, Inc. | Integrated multimedia communications processor and codec |
| US5832120A (en) | 1995-12-22 | 1998-11-03 | Cirrus Logic, Inc. | Universal MPEG decoder with scalable picture size |
| US5719511A (en) | 1996-01-31 | 1998-02-17 | Sigma Designs, Inc. | Circuit for generating an output signal synchronized to an input signal |
-
1994
- 1994-06-28 US US08/268,764 patent/US5528309A/en not_active Expired - Fee Related
-
1995
- 1995-06-27 US US08/765,464 patent/US6421096B1/en not_active Expired - Lifetime
- 1995-06-27 WO PCT/US1995/008279 patent/WO1996001027A1/en active Application Filing
- 1995-06-27 AU AU29151/95A patent/AU2915195A/en not_active Abandoned
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