WO1995005702A1

WO1995005702A1 - Process for controlling the speed of rotation of a single-phase or polyphase induction motor

Info

Publication number: WO1995005702A1
Application number: PCT/AT1994/000110
Authority: WO
Inventors: Franco Giglifiore
Original assignee: Entec Energietechnik Gesellschaft M.B.H.
Priority date: 1993-08-19
Filing date: 1994-08-10
Publication date: 1995-02-23
Also published as: AU7340094A; ZA945822B; CO4290395A1

Abstract

A process is disclosed for controlling the speed of rotation of a single-phase or polyphase induction motor with N(N=1,2,3,...) phase windings by changing the frequency of N phase voltages that drive the phase windings and that are phase-shifted each by 2π/N. The phase voltages are formed by switching the tappable potentials of n(n=2,3,4,...) direct voltage sources connected in series with n different voltages Ej(j=1,2,...,n) through to output terminals in series of predeterminable intervals that is constantly repeated with a period duration T and in a predetermined sequence. Each switched through potential is associated to one of the time intervals. The frequency f1=1/t of the phase voltages is changed by increasing or reducing the duration of one or several predeterminable time intervals.

Description

Speed control method for a single or multi-phase induction motor

The invention relates to a method for speed control and a circuit arrangement for carrying out the method for a single-phase or multi-phase induction motor with N (N = 1,2,3, ..) phase windings by changing the frequency of the N operating them each 2π / N phase-shifted phase voltages.

The speed control of motors is of increasing importance in many industrial applications, since for modern systems very great demands must be made on the changeability and adjustability of production processes which are to be monitored both manually and automatically, and most of these processes are carried out by motors are driven. The variable speed enables the efficiency and reliability of the motors to be increased to optimum values for every task. In the case of non-regulated AC motors, the speed is very dependent on the torque, supply voltage and temperature. These influences can be counteracted by controlling the speed in a control loop or by manually controlling the speed. In many cases, a programmable sequence of speed changes to be carried out automatically at certain times is also desired by the users.

In known methods of the type mentioned at the outset, the change in the frequency of the phase voltages takes place, for example, through the use of mechanical aids such as motor generators or asynchronous frequency converters, with the aid of which voltages which can be varied in frequency can be generated. This requires considerable effort with regard to the construction and the space requirement and the acceptance of an additional mechanical element that is in need of repair. In addition, the adjustable speeds are in a very narrow range.

The object of the invention is to specify a method of the type mentioned at the outset which does not use any moving mechanical parts for carrying it out and which sweeps over a high adjustable speed range.

According to the invention this is achieved in that the phase voltages by switching through the tappable potentials of n (n = 2,3,4, ...) DC voltage sources connected in series with n different voltages E: j = 1, 2, ... , n) are formed to output terminals in a sequence of predeterminable periods of time and in a predetermined sequence, which is repeated continuously with a period T, each of the switched potentials being assigned one of the periods, and that the frequency f-I / T of the phase voltages is determined by Increasing or reducing the duration of one or more of the predeterminable periods of time is changed. Such a change in the frequency of the pha- Sens voltages is advantageous due to its large variation range, which is not tied to any mechanical means, and also due to the independence from AC voltage sources.

In a further embodiment of the invention it can be provided that the mutual phase differences of the phase voltages are formed by the time shift of the corresponding, predeterminable time intervals. This measure can be implemented in a simple manner, particularly when using microprocessors to control the phase.

According to a further feature of the invention, it can be provided that for a number z of predeterminable periods of a period T, the frequency f _{j of} the phase voltages by the amount Df _j = l / DT by increasing or decreasing each of the z periods by l / (Df _] -z) is changed. As a result, the shape of the phase voltages is proportionally changed in their proportions, thus ensuring a balanced change in speed with the motor running smoothly.

The invention also achieves the above-mentioned object by means of a circuit arrangement for carrying out the method, which is characterized in that, in order to generate each of the N phase voltages, the output of a control unit is connected to the input of a controllable function generator, one at the output of the function generator Clock frequency f _{Q can be} tapped depending on the speed values entered in the control unit, the output of the function generator is connected to the frequency control input of a staircase pulse generator, so that depending on the frequency f _Q in this pulse train for controlling switching processes in semiconductor switches at its outputs, a phase control unit is connected to a phase control input of the staircase pulse generator, via which groups of pulse trains assigned to each phase are delayed in time in accordance with the phase shift, the outputs of the staircase pulse generator m it the inputs of the driver circuit and its output are connected to the windings of the motor. Such a clock frequency allows a very large frequency or speed range to be implemented very precisely and without great effort.

According to a further embodiment of the invention it can be provided that in the driver circuit the negative pole of a first DC voltage source with the voltage E _j with a first connection of a first smoothing capacitor, a first connection of a first controllable semiconductor switch with reverse diode and a first terminal of a second controllable semiconductor switch is connected to a reverse diode; the positive pole of the first DC voltage source at a common node with the negative pole of a second DC voltage source with the voltage E2, via a parallel connection of two semiconductor switches with reverse diodes and each with an anti-parallel connection. a diode connected in series with one another is connected to the second connection of the first semiconductor switch, a first connection of a third controllable semiconductor switch with reverse diode and a first output terminal; the positive pole of the second direct voltage source is connected to the second connection of the second smoothing capacitor, the second connection of the third semiconductor switch and the first connection of a fourth controllable semiconductor switch with reverse diode; the second connection of the second semiconductor switch is connected to the second connection of the fourth semiconductor switch and a second output terminal; the control inputs of the controllable semiconductor switches are connected to the outputs of the staircase pulse generator. This enables a particularly advantageous way of generating the phase voltages, the frequency of which can be easily controlled in terms of circuitry.

In a further embodiment of the invention it can be provided that the controllable semiconductor switches are formed by field effect transistors, preferably MOSFET. In addition to a low power requirement for control, such switching elements also have good high-frequency properties and are therefore also suitable for generating high-frequency AC voltages and thus high adjustable speed ranges. A further advantage are the reverse diodes which are already integrated in field effect transistors for technological reasons and which are located between the drain and source and prevent cutoff voltages from inductances from destroying the semiconductor switches.

Finally, a further embodiment of the invention is that the controllable semiconductor switches are formed by IGBT. Such elements offer, in particular in motors with high connected loads, sufficient current and voltage strength for their speed control.

The invention is described in more detail below by way of example with reference to the connected figures.

1 shows a block diagram of a circuit arrangement for carrying out the method according to the invention for a three-phase induction motor; 2 shows a possible embodiment of a driver circuit arrangement for a three-phase induction motor; 3 shows diagrams of step-shaped phase voltages as a function of time.

An arrangement for an exemplary embodiment with the number of phases N = 3 of a speed control according to the invention is shown schematically in FIG. A control unit 118 adopts the speed to be set of a motor with phase windings 102, 103, 104 as input values, which are entered manually via an input unit (not shown) or, when used in control loops, in the form of a manipulated variable be transmitted. The output of the control unit 118 is connected to a frequency generator 110 with a voltage-dependent input, so that different voltage values at the input of the frequency generator 110 correspond to different frequencies at its output. In the simplest case, the control unit 118 can thus consist of a voltage divider that can be changed by a potentiometer and is connected to the input of the frequency generator 110, for example a rectangular generator, whereby its output frequency varies depending on the position of the potentiometer. The control unit 118 can, however, also be constructed in a very complex manner with digital input and preprogrammable processes or can be part of a control loop in which the actual speed of the motor is determined, for example via speed sensors, and via a control loop with signal amplifiers, digital-analog converters and arithmetic unit taking into account the target rotational speed, a corresponding voltage is emitted to the input of the frequency generator 110, which emits a frequency f _Q proportional to this voltage at its output. The frequency f _Q subsequently serves as a clock generator for phase voltages FI, F2 _> —FN _>, where N = 3 in the example shown, since the motor is a three-phase induction motor with a number of pole pairs p = 1. Each of the three phase windings 102, 103, 104 of the motor is fed with the phase voltages F _j ^^ ge, which as step-like, periodic voltages in the drivers 114, 115, 116, which in turn are controlled by stair pulse generators 111, 112, 113, be generated. In this case, the frequency f _Q reaching the frequency control input of the staircase pulse generators 111, 112, 113 is used to generate N groups of pulse trains, which in turn cause a sequence of switching states in the drivers 114, 115, 116 equipped with power semiconductors, which result in different states Switch DC voltage potentials at their outputs and thereby the periodic staircase voltages F _j , ¥ 2 _. Generate F3. Each group of pulse trains comprises an equal number of pulse trains as there are controllable semiconductor switches in the drivers 114, 115, 116. The phase voltages F _j , F2 _. F3 are identical in shape and period, but are mutually phase-shifted by a constant angle in accordance with the spatial arrangement of the windings 102, 103, 104 in the motor. This phase shift is kept constant by a phase control unit 117, whose output is connected to one of the phase control inputs of the staircase pulse generators 111, 112, 113. The three groups of pulse trains at the outputs of the staircase pulse generators 114, 115, 116 are mutually delayed, so that stair voltages F _j , F2 _. F3 with a frequency f _j with a phase difference of 2π / N, for this example with N = 3, ie 120 °. The number of phase voltages is adapted to the motor to be controlled, so that there is no restriction of the invention with regard to the number of phases or number of windings. For reasons of higher accuracy, the clock frequency f _Q can be chosen to be very large in relation to the frequency of the phase voltages f ^, so that f _Q = 100 kHz and f _j = 50 Hz, for example. The pulse trains emanating from the staircase pulse generators 111, 112, 113 are therefore further processed in the drivers 114, 115, 116 into stair voltages F _j , F2 ^ which subsequently operate the motor at the frequency f _j . To control or regulate the speed of the motor can be via the Control unit 118, the frequencies f _Q and f _j are changed accordingly, so that the phase voltages F _j , F2 ^ 3 controlling the motor cause a change in the speed of the motor due to their frequency change. A manual setting of the speed effected via the control unit 118 changes the frequency of the stair tensions to the extent entered, while when the control unit 118 is included in a controlled system, an actual speed is compared with a target speed and except for a zero adjustment of the two Sizes are controlled with a control device so that speed fluctuations due to various influencing variables, such as torque, temperature etc., are automatically compensated for.

2 shows three identical driver circuits 5, 6, 7 for the phase voltages F _j , F2, F3, which operate the windings 2, 3, 4 of a three-phase induction motor 1. Two series-connected DC voltage sources 8, 9 with the voltages E _j and E2 have a common negative pole terminal -, a common middle terminal C and a common positive pole terminal +, at which the following 5 potentials from the three driver units 5, 6, 7 can be tapped. These are:

0, E _j , (E! + E ₂ ), -E ₂ , - (E ₁ + E ₂ ).

This type of scanning is carried out for each of the driver units 5, 6, 7 by controllable semiconductor switching elements 11, 12, 13, 14, 17, 18 and 21, 22, 23, 24, 27, 28 and 31, 32, respectively , 33, 34, 37, 38 these potentials are switched through in succession to the output terminals 51, 52 or 61, 62 or 71, 72 in a predetermined order. The smoothing capacitors 19, 20, 29, 30, 39, 40 are designed for better stability of the direct voltages E _j , E2, which can be provided, for example, by batteries. The semiconductor switches 11, 12, 13, 14, 17, 18, 21, 22, 23, 24, 27, 28, 31, 32, 33, 34, 37, 38 shown are in MOSFET technology with reverse diodes 41 , 42, 43, 44, 45, 46, 47, 48, 49, 53, 54, 55, 57, 58, 59, 63, 64, but any other type of controllable switch can be used for this purpose . One possibility for controlling high-performance motors is, for example, IGBT elements with internal reverse diodes. The reverse diodes 41, 42, 43, 44, 45, 46, 47, 48, 49, 53, 54, 55, 57, 58, 59, 63, 64 are for use with inductors such as those of the motor windings 2, 3, 4 represent, advantageous, since the shutdown voltages otherwise the semiconductor switches 11, 12, 13, 14, 17, 18, 21, 22, 23, 24, 27, 28, 31, 32, 33, 34 , 37, 38 would destroy. Each of the semiconductor switches 11, 12, 13, 14, 17, 18, 21, 22, 23, 24, 27, 28, 31, 32, 33, 34, 37, 38 is controlled by outputs of staircase pulse generators, as shown in Fig .l described, controlled by an output thereof with a control input of the semiconductor switches 11, 12, 13, 14, 17, 18, 21, 22, 23, 24, 27, 28, 31, 32, 33, 34, 37, 38 is connected and an associated pulse train is sent via this. In the- Sem example, the control inputs (gates) of the MOSFET elements are not shown. The stair voltages F _j , F2, F are thus determined by a periodic sequence of switching states of the semiconductor switches 11, 12, 13, 14, 17, 18, 21, 22, 23, 24, 27, 28, 31, 32, 33, 34, 37, 38, with exactly one potential being switched through to the outputs 51, 52 or 61, 62 or 71, 72 during fixed time periods. After each time period, the next one follows with a new switching state and an associated potential. The process is repeated after the end of a staircase voltage period. As usual, the period T is defined as the time between two zero crossings. The frequency of the resulting staircase voltage is varied by changing the period T, which is composed of the sum of the individual time periods. If each of the time spans is made longer by a certain amount, the period T of the staircase tension increases in the amount of the sum of the amounts. The control of the individual time spans takes place in the same way for each of the phase voltages F _j , F2, F3, but since these should have a predetermined phase difference, the timing of the switching states by phase control unit 117 is adjusted by a phase angle Time period tf is delayed. The driver 5 thus executes a specific switching state, which is carried out later in the driver 6 by the time tf and in the driver 7 by the time 2-tf. The result of this are three stair voltages F _j , F2, F3 as in FIG. 3, which are phase-shifted from one another by a constant amount.

3 shows the three phase voltages present as step voltages F _j , F2, F3. The shape of the staircase function is determined by the choice of the direct voltages E _j , E2 and the duration of the individual time periods t _Q , t _j , tg, the sum of which

Period T forms, is given and consists of a positive and a negative half wave. The stair voltages F _j , F2, F3 shown here are made possible in this example by scanning the series connection of two DC voltage sources with the same voltage E _j , E2. In general, any number of such n series-connected DC voltage sources with different voltages E: (j = 1,..., N) can be realized, with which a correspondingly more finely divided staircase can be achieved. As can be seen in FIG. 3, the shape of the step voltages F _j , F2, F3 is largely approximated to a sinusoidal oscillation, but can be designed in the desired form by the choice of the time intervals and the individual voltages. As can also be seen from FIG. 3, the three staircase voltages F _j , F2, F3 are phase-shifted by the time delay tf, which corresponds to a phase angle of 120 °. The individual switching processes of the semiconductor switches 11, 12, 13, 14, 17, 18, which lead to the formation of the staircase voltage F _j , are given by way of example in the table below, the reference symbols from FIGS. 2 and 3 be valid. 11 12 13 14 17 18

^x 0 0 0 0 0 0

0 0 0 1 0

0 O- → l 0 ►0 0 0

0 1 0 0 0 1

-E- * 7 0 1 0 0 0 1 ^l 8 0 1 0 0 0 0

Switch position: 1 = open 0 = closed

In the period t3, for example, the voltage E _j prevails at the terminals 51, 52, caused by opening the semiconductor switches 11, 12, 13, 18 and closing the semiconductor switches 14, 17. After that in the period 14 all are first Semiconductor switch opened, the voltage F _j = 0 being present, and the switches 12, 14 still being closed while maintaining the voltage F _j = 0, while the remaining switches remain open to change the switch positions for to prepare the negative half-wave of the stair voltage F _j .

Claims

PATENT CLAIMS

1. A method of speed control for a single or multi-phase induction motor with N (N = 1,2,3, ..) phase windings by changing the frequency of the operating, N by 2π / N phase-shifted phase voltages, characterized in that the Phase voltages by switching through the tappable potentials of n (n = 2,3,4, ...) in series connected DC voltage sources with n different voltages E: (j = 1, 2, ..., n) to output terminals in one constantly with a period T repeating the sequence of predeterminable periods of time and in a predetermined sequence, one of the periods being assigned to each switched potential and that the frequency f _j = l / T of the phase voltages by increasing or decreasing the duration of one or more of the predeterminable periods of time is changed.

2. The method according to claim 1, characterized in that the mutualphase¬ differences of the phase voltages are formed by the time shift of the corresponding, predetermined time intervals.

3. The method according to claim 1 or 2, characterized in that with a number z of predeterminable periods of a period T, the frequency f _{j of} the Phasenspan¬ voltages by the amount Df _j = l / DT by increasing or decreasing each of the z periods by l / (Df _j -z) is changed.

4. Circuit arrangement for performing the method according to one of claims 1 to 3, characterized in that for generating each of the N phase voltages, the output of a control unit (118) is connected to the input of a controllable function generator (110), at the output a clock frequency f ₀ depending on the speed values entered into the control unit can be tapped from the function generator (110), the output of the function generator (110) is connected to the frequency control input of a staircase pulse generator (111, 112, 113) , so that depending on the frequency f _Q in this pulse train for controlling switching processes in semiconductor switches at its outputs, a phase control unit (117) is connected to a phase control input of the staircase pulse generator (111, 112, 113), via the groups of assigned to each phase Pulse trains are delayed according to the phase shift, the outputs of the Staircase pulse generator (111, 112, 113) with the inputs of a driver circuit (114, 115, 116) and the outputs of which are connected to the windings of the motor (102, 103, 104).

5. Circuit arrangement according to claim 4, characterized in that in the driver circuit (5)

- The negative pole of a first DC voltage source (9) with the voltage E _j with a first connection of a first smoothing capacitor (20), a first connection of a first controllable semiconductor switch (13) with reverse diode (48) and a first connection of a second controllable semiconductor switch (14) is connected to a reverse diode (57);

- The positive pole of the first DC voltage source (9) at a common node (C) with the negative pole of a second DC voltage source (8) with the voltage E2, via a parallel connection of two semiconductor switches (17, 18) with reverse diodes (41, 42 ) and each with a diode (15, 16) connected in antiparallel to each other with the second connection of the first semiconductor switch (13), a first connection of a third controllable semiconductor switch (13) with reverse diode (47) and a first output terminal ( 51) is connected;

- The positive pole of the second DC voltage source (8) with the second connection of the second smoothing capacitor (19), the second connection of the third semiconductor switch (11) and the first connection of a fourth controllable semiconductor switch (12) with reverse Di¬ ode (56) is connected;

- The second connection of the second semiconductor switch (14) is connected to the second connection of the fourth semiconductor switch (12) and a second output terminal (52);

- The control inputs of the controllable semiconductor switches (11, 12, 13, 14) are connected to the outputs of the staircase pulse generator.

6. Circuit arrangement according to claim 5, characterized in that the controllable semiconductor switches (11, 12, 13, 14) are formed by field effect transistors, preferably MOSFET.

7. Circuit arrangement according to claim 5, characterized in that the controllable semiconductor switches (11, 12, 13, 14) are formed by IGBT.