WO1994027330A1 - Method and apparatus for increasing bimorph displacement range - Google Patents

Method and apparatus for increasing bimorph displacement range Download PDF

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Publication number
WO1994027330A1
WO1994027330A1 PCT/US1994/003823 US9403823W WO9427330A1 WO 1994027330 A1 WO1994027330 A1 WO 1994027330A1 US 9403823 W US9403823 W US 9403823W WO 9427330 A1 WO9427330 A1 WO 9427330A1
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WO
WIPO (PCT)
Prior art keywords
layer
voltage
bimorph
applying
layers
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Application number
PCT/US1994/003823
Other languages
French (fr)
Inventor
John G. Linvill
Alan H. Starkie
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Telesensory Corporation
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Publication of WO1994027330A1 publication Critical patent/WO1994027330A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09BEDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
    • G09B21/00Teaching, or communicating with, the blind, deaf or mute
    • G09B21/001Teaching or communicating with blind persons
    • G09B21/003Teaching or communicating with blind persons using tactile presentation of the information, e.g. Braille displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/20Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
    • H10N30/204Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators using bending displacement, e.g. unimorph, bimorph or multimorph cantilever or membrane benders
    • H10N30/2041Beam type
    • H10N30/2042Cantilevers, i.e. having one fixed end
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/80Constructional details
    • H10N30/802Circuitry or processes for operating piezoelectric or electrostrictive devices not otherwise provided for, e.g. drive circuits

Definitions

  • This invention relates to bimorphs and, more particularly to bimorphs capable of increased displacement range.
  • Piezoelectric bimorphic elements have been employed in a variety of applications to provide conversion between mechanical motion or pressure and electrical signals. This may be translation of mechanical motion to electrical signals.
  • piezoelectric bimorphic pickups for electric stringed instruments, such as electric guitars, is well known. See, for example, U.S. Patent No. 4,860,625 (Mathews, 1989) .
  • electromechanical braille cells have been developed to assist the visually handicapped (blind or visually impaired) in gaining access to information normally converted to visual displays for reading. That is, arrangements of braille cells have been developed for use by the visually handicapped to provide a braille read-out from a computer. In general, these arrangements convert the electrical signals to mechanical movement defining braille. A multitude of braille cells are used to define the individual braille letters.
  • braille cells have utilized a set of piezoelectric reeds (bimorphs) which bend in response to the application of an electric voltage thereacross for urging the tips of sensing rods through an array of openings in a braille cell reading surface.
  • the selected braille indicia defined by the protruding tips is sensed by the finger of the operator.
  • the bimorph apparatus of the present invention addresses the need in the art for a sensitive bimorphic device having an extended range of displacement.
  • the bimorph apparatus of the present invention is typical in that it includes a bimorph having a conductive vane sandwiched between first and second piezoelectric layers, free for movement in response to electrical signals applied thereto.
  • the bimorph includes a driver circuit for developing a first potential drop across the first layer to induce contraction of the first layer.
  • a second driver circuit operates to develop a second potential drop across the second layer to induce expansion of the second layer contemporaneous with contraction of the first layer. Simultaneous contraction and expansion of the first and second layers in this way, results in extended displacement of the free portion of the bimorph in a first direction.
  • the second driver circuit may be adapted to apply a third electrical signal to the second layer, and the first driver circuit adapted to apply a fourth electrical signal to the first layer simultaneously with application of the third signal to the second layer. In this manner extended movement of the free portion of the bimorph is induced in the opposite direction or some other second direction.
  • the first and second potential drops are different from one another.
  • One simple way of assuring this difference is to continuously apply a bias voltage to the lower layer. Application of a drive voltage to the conductive vane thus results in the development of different potential drops across the first and second layers.
  • the bias voltage is selected such that the net voltage applied across a layer remains in the direction of polarization for a specified range of drive voltages.
  • first and second layers are respectively polarized in first and second directions, with the first electrical signal being applied in the first polarization direction and the second electrical signal being applied in the second polarization direction.
  • Extended bimorph displacement is effected through this asymmetrical arrangement by selecting the magnitude of the first electrical signal to be larger than that of the second electrical signal.
  • FIGS. 1-8 are utilized in the basic description which follows.
  • FIG. 9 illustrates a preferred embodiment of the bimorph displacement apparatus of the present invention.
  • FIGS. 10A and 10B depict circuit representations of a bimorph in which the voltages applied across the upper and lower piezoelectric layers, modeled as upper and lower capacitors U and L, are selected in the conventional manner so as to displace the bimorph upward and downward, respectively.
  • FIGS. IOC and 10D depict circuit representations of a bimorph in which the voltages applied across the upper and lower piezoelectric layers have been selected in accordance with the method of the present invention so as to improve upward and downward bimorph displacement, respectively.
  • FIG. 11 schematically depicts control and driver circuits included within a simplified switched relay implementation of the present invention.
  • FIG. 12 shows a schematic representation of another, second preferred embodiment of the inventive bimorph displacement apparatus suitable for inclusion within a bimorph array.
  • FIG. 13 shows a partially schematic, partially block diagrammatic representation of a third preferred embodiment of the inventive bimorph displacement apparatus.
  • FIGS. 14A-14I are timing diagrams which illustratively represent operation of the second preferred embodiment of the inventive bimorph displacement apparatus.
  • FIG. 15 shows a schematic representation of a control circuit included within the second preferred embodiment of the present invention.
  • FIG. 16 shows a partially schematic, partially block diagrammatic representation of a fourth preferred embodiment of the inventive bimorph displacement apparatus, suitable for implementation as an integrated circuit.
  • FIG. 17 schematically represents a non-inverting level-shifting circuit designed to drive a p-channel integrated circuit transistor.
  • FIG. 18 schematically represents a non-inverting level-shifting circuit designed to drive an n-channel integrated circuit transistor.
  • FIG. 19 depicts a braille cell having a generally rectangular frame enclosing a plurality of elongated, piezoelectric bimorph reeds disposed to be controlled by the bimorph displacement apparatus of the present invention.
  • FIG. 20 is a cross-sectional view of one of the piezoelectric reeds included within the braille cell of FIG. 19.
  • FIG. 1 One begins with a single sheet of piezoelectric material as illustrated in FIG. 1, of length, width and thickness equal to that of the leaves of a bimorph 1 made with two conductive leaves 2 and 3 having a layer 4 of a dielectric material between them.
  • Lead zirconate titanate is an appropriate dielectric material, polarized in manufacture with polarization, P, as shown in the figure.
  • a voltage V is applied between the leaves 2 and 3 and, hence, between the opposed surfaces of the dielectric.
  • the polarization, P is the dipole moment per unit volume. For a uniform dielectric, it is also equal to the surface charge density on the dielectric.
  • the surface charge density on the lower surface of the dielectric layer 4 is P coul/m 2 , and that on its top surface -P coul/m 2 .
  • the polarization/voltage plot is as shown in FIG. 2. At zero applied voltage there remains polarization as at point A, where the material has been polarized by a positive V in manufacture.
  • the polarization remains fixed as a viewer moves to his/her right on the top.
  • the piezoelectric effect if a clamp holds the material 1 fixed against changes in length or deflection along the length direction in the undamped strip, remains essentially fixed as one applies large voltages in the positive direction.
  • the motion of the hysteresis curve is to the left from point A.
  • the polarization does not significantly decrease.
  • the stress in a clamped strip (or the strain in a free strip) is proportional to the voltage with a constant of proportionality, but with opposite direction, to that experienced with voltages in the polarizing direction.
  • the stress (or strain) is opposite in sign to that experienced with applied voltages in the polarizing direction.
  • the P-V trajectory first is along the flat top branch of the hysteresis curve. But as the amplitude increases, the polarization trajectory drops on the negative side and minor loops on the hysteresis curve are encountered. It finally comes to a voltage amplitude which with sufficient cycles leaves the layer 4 depolarized and the piezoelectric effect ceases.
  • Two voltages are identified in FIG. 2. The first is -V p , the maximum voltage but sufficiently small in magnitude that excursions from point A to it, back through A and to an equal value in a polarizing direction and back to A do not result in depolarization.
  • the second voltage is -V ⁇ which is sufficiently large that cyclic excursions from point A to ⁇ V Dp , back to A, to a magnitude of V ⁇ but in the polarizing direction and back to A results in depolarizing the material.
  • FIG. 3 a two-sheet configuration (FIG. 3) of a bimorph in which two piezoelectric sheets 5 and 6 are separated by a conductive layer 7 of brass or the like.
  • the layers are polarized as shown in the figure.
  • the left end as viewed is clamped, making a cantilever, and the right end is free to deflect.
  • the upward deflection with respect to a fixed reference is D.
  • the thickness of the conductive layer 7 is shown here equal to the thickness of each of the two sheets 5 and 6 for convenience.
  • the three terminals, the top conducting surface of the top layer is T, the bottom conducting surface of the bottom layer is B, and the terminal of the conducting metal layer is M, are to be used in three different configurations.
  • FIG. 5 Another configuration is shown in FIG. 5. With the drive switch in position i, the T and B terminals are grounded and the top layer has a depolarizing voltage - it expands. The bottom layer has a polarizing voltage - it contracts. The deflection of the tip is -2k V TIE/2 . With the switch in position ii, the top layer has a polarizing signal and it contracts, and the bottom layer has a depolarizing signal - it expands. V TIE/2 must be less than, or at most equal to, V p of FIG. 2. The deflection of the tip is 2k V TIE/2 . The difference in deflection is 2k v TIE .
  • V B The ratio of deflections between the two configurations is V B /V TIE .
  • the maximum V B is determined by the permissible voltage impressible on the bimorph, or the maximum voltage which can be delivered by the drive circuitry. Thus V B can be made larger than V TIE .
  • FIG. 6 The basic concept behind the instant invention is illustrated in FIG. 6.
  • V M polarizing voltage
  • V M the polarizing voltage
  • -V p the maximum voltage in the depolarizing direction which when cyclically applied with the polarizing voltage V M does not lead to depolarization.
  • FIG. 8 selecting bias voltages, V p and V B , which limit the applied voltages in the layers to V M in the polarizing direction and -V p in the depolarizing direction.
  • Such apparatus 10 is designed to displace a piezoelectric bimorph 12 in accordance with electrical signals impressed on an input data line 14. It is noted that while the bimorph 12 is depicted in cross section as an elongated bimorphous piezoelectric reed of the type suitable for inclusion in, for example, a braille cell, the teachings of the present invention may be used to increase the displacement of other bimorphic structures.
  • the bimorph 12 includes a center vane 16, typically realized using a thin leaf of brass or the like, sandwiched between first and second piezoelectric layers 18 and 20 electrically polarized as indicated by arrows Al and A2.
  • the center vane 16 is electrically conductive, although in alternative embodiments it may be desired that the center vane be made of an insulating material.
  • the piezoelectric layers 18 and 20 may be polarized through application of an appropriate polarization voltage to the bimorph 12 during fabrication thereof.
  • the outer surfaces of the layers 18 and 20 are covered with thin layers of electrically conductive material (e.g. gold or nickel) , hereinafter referred to as upper and lower electrodes 22 and 24, respectively.
  • the upper and lower electrodes 22 and 24 are connected to a control circuit 26 operative to provide voltages to the electrodes 22 and 24 on the basis of data values present on the input line 14. Similarly, a reference voltage applied to the conductive vane 16 is supplied by a driver circuit 28 in accordance with data values impressed on input line 14.
  • the bimorph 12 is cantilevered adjacent a first end 30 thereof such that a free end 32 is displaced in response to varying dimensional changes within the piezoelectric layers 18 and 20. These changes arise by reason of the reference voltage applied to the conductive vane 16 and first and second voltages applied to the upper and lower electrodes 22 and 24.
  • Fixed cantilever members 34 define a fulcrum point about which the bimorph 12 bends as a consequence of the dimensional changes of the layers 18 and 20.
  • a bonding agent such as glue or the like is used to secure the portion of the bimorph 12 proximate the first end 30 thereof within a frame structure (not shown) .
  • FIGS. 10A-10D depict circuit representations of a piezoelectric bimorph, such as the bimorph 12, consisting of the series connection of an upper capacitor U and a lower capacitor L.
  • the upper and lower capacitors U and L of the equivalent circuits of FIGS. 10A and 10B respectively model the upper and lower piezoelectric layers of the bimorph.
  • upward displacement of the free end of a bimorph is conventionally effected by applying a displacement voltage V D across the upper piezoelectric layer in agreement with the direction of polarization P thereof.
  • the charge held by the upper layer is in proportion to a combination of the displacement voltage and the consequent mechanical deflection.
  • the magnitude of the displacement voltage V D is selected to be less than the breakdown potential of the piezoelectric layers 18 and 20, and, for example, would consequently be selected to be approximately 200 volts for piezoelectric layers having thicknesses on the order of 0.010 inches.
  • Application of the displacement voltage V D causes the upper piezoelectric layer to contract, which results in an upward bending of the bimorph. It is observed that an analogous displacement voltage is not conventionally applied across the lower piezoelectric layer which, again, is represented by capacitor L. It follows that any expansion of the lower piezoelectric layer occurring during upward displacement of the bimorph arises only as a consequence of the displacement voltage applied across the upper piezoelectric layer.
  • the standard method of bending the bimorph downward involves applying a displacement voltage V D to the lower piezoelectric in agreement with the polarization direction P thereof (FIG. 10B) . Since the displacement voltage typically is not applied to both sides of the upper piezoelectric layer, any expansion of the upper piezoelectric layer accompanying downward displacement of the bimorph occurs by virtue only of the voltage V D applied across the lower layer.
  • FIGS. IOC and 10D depict electrical equivalent circuits of a bimorph in which the voltages applied respectively across the upper and lower piezoelectric layers have been selected in accordance with the method of the present invention so as to improve upward and downward bimorph displacement.
  • a displacement voltage V D in agreement with the polarization direction P is applied across the upper layer while a back voltage V B in opposition to the polarization direction P is applied across the lower layer.
  • the back voltage V B serves to enhance upward displacement by externally inducing expansion of the lower piezoelectric layer while contraction of the upper layer is simultaneously being effected by application thereto of the voltage V D .
  • the back voltage V B is selected to be less than the depolarization voltage associated with the bimorph layer to which it is applied in order that the polarization direction P be maintained.
  • the back voltage will typically be on the order of 80 Volts. It should be noted that according to the invention the net voltage across each electrode (assuming equal amounts of time are spent in the up and down positions) is in the direction of polarization. This effectively removes any tendency to depolarize.
  • FIG. 11 schematically depicts an embodiment of the present invention which includes simplified switched relay implementations of the control circuit 26 and the driver circuit 28.
  • the driver circuit 28 includes a first relay switch 50 coupled to the conductive vane 16 of the bimorph 12 through a first resistor Rl.
  • the control circuit 26 includes second and third relay switches 54 and 56 connected to the upper and lower electrodes 22 and 24 of the bimorph 12 through resistors R2 and R3, respectively.
  • a first back voltage source V B1 is included between a displacement voltage source V D and downward throw terminal D of relay switch 54, while a second back voltage source V B2 is connected between ground and upward throw terminal U of relay switch 56.
  • first relay switch 50 When a first data value (e.g., a logic 0) corresponding to downward displacement of the bimorph 12 is present on the input data line 14 the first relay switch 50 is set to throw position D, thereby operatively connecting the conductive vane 16 to voltage source V D . Impression of the first data value on line 14 also results in second relay switch 54 being set to throw position D, which places a potential of V D - V B1 upon the upper electrode 22. Additionally, third relay switch 56 is set to throw position D in response to presence of the first data value on line 14, thereby grounding the lower electrode 24. In this way the free end 32 of the bimorph 12 is displaced downward as a consequence of application of the displacement voltage V D across the upper layer 18 in direction Al contemporaneously with application of the back voltage V B2 across the layer 20 in opposition to polarization direction A2.
  • a first data value e.g., a logic 0
  • FIG. 12 shows a schematic representation of an alternatively preferred embodiment of the inventive bimorph displacement apparatus 100 in which the upper and lower bimorph electrodes may be held at fixed potentials, yet in which individual control of each bimorph is preserved. Since the inventive displacement apparatus 100 may be employed to displace a piezoelectric bimorph such as that shown in FIG. 9, identical reference numerals will be used to identify the bimorph 12 depicted in FIGS. 9 and 12. Displacement Apparatus for Inclusion in Bimorph Array
  • the displacement apparatus 100 includes a control circuit 260 for applying the displacement voltage V D and the back voltage V B to the upper 22 and lower 24 electrodes of the bimorph 12.
  • the displacement apparatus 100 further includes a driver circuit 280 for switching the potential applied to the conductive vane 16 of the bimorph 12 on the basis of data values present on an input line 140.
  • the free end 32 of the bimorph 12 is displaced downward by simultaneously applying the displacement voltage V D and back voltage V B to the lower and upper layers 20 and 18 in agreement with, and in opposition to, the polarization directions A2 and Al, respectively.
  • the driver circuit 280 operates to effect this condition by impressing a potential V D + V B upon the conductive vane 16. That is, a potential of V D + V B is applied to the conductive vane 16 when the voltage on the input line 140 is such that PNP bipolar transistor 284 is turned on and first NPN bipolar transistor 286 is turned off.
  • the inventive displacement apparatus 100 operates in a similar manner to bend the bimorph 12 in the upward direction.
  • a logical high i.e., 5 Volts
  • the impression of a logical high (i.e., 5 Volts) upon input data line 140 turns on the first NPN transistor 286, thereby effectively grounding the conductive vane 16.
  • this condition induces upward displacement of the free end 32 of the bimorph 12.
  • the transistors 284, 286 and 288 may be realized using, for example, Motorola MPSA42 bipolar transistors.
  • the resistors Rl', R2' and R3' will generally be selected to be of equivalent magnitude, typically on the order of 1 M ⁇ .
  • FIG. 13 shows a partially schematic, partially block diagrammatic representation of a second alternatively preferred embodiment of the inventive bimorph displacement apparatus 300.
  • the apparatus 300 is suitable for inclusion in devices such as braille cells incorporating bimorph arrays in which it is desired that identical voltages be applied to two of the three electrical terminals of each bimorph without sacrifice of independent control over each.
  • the apparatus 300 is advantageously designed so as only to require external provision of a single supply voltage of magnitude V D .
  • the inventive displacement apparatus 300 includes a driver circuit 310 addressed by an input data line 320 on which are impressed binary signals corresponding to upward and downward displacement of the bimorph 12.
  • Input data present on the data line 320 is clocked through negative AND gate 324 and AND gate 326 in accordance with a clock waveform applied to a driver timing line 327.
  • the output of the negative AND gate 324 is coupled through a resistor 334 to the emitter of an NPN turn-on transistor 338.
  • the output of the AND gate 326 is resistively coupled 350 to the base of an NPN pull-down transistor 352. It follows that when the output of the AND gate 326 registers a logical high the NPN pull-down transistor 352 is turned on, thus creating a forward bias across a second isolation diode 356 and effectively grounding the conductive vane 16.
  • the complementary manner in which the negative AND gate 324 and the AND gate 326 operate to drive the conductive vane 16 may be more fully appreciated by reference to the timing diagrams of FIGS. 14A-14D.
  • FIGS. 14A and 14B are timing diagram depicting the input signals " received by the driver circuit 310.
  • FIG. 14A shows the clock waveform impressed on the input clock line 330
  • FIG. 14B is representative of the magnitude of a particular binary data signal impressed on the input data line 330
  • FIGS. 14C and 14D correspond, respectively, to the output waveforms generated by the negative AND gate 324 and the AND gate 326 in response to the clock and data waveforms shown in FIGS. 14A and 14B.
  • the input data transitions from a logical low to a logical high at a time T .
  • the output of the negative AND gate 324 rises and falls in synchrony with the clock waveform, while the output of AND gate 326 remains fixed at a logical low.
  • the output of the negative AND 324 remains unchanged while the output AND gate 326 toggles between a logical high and low in phase with the clock waveform (FIG. 14A) .
  • FIG. 14E in which is shown a timing diagram illustrating the switching waveform impressed on the conductive vane 16 by the driver circuit 310.
  • the control circuit 330 is operative to impress a first switching waveform +V SW upon upper electrode 22.
  • the waveform +V SW alternates between a first voltage equivalent to the displacement voltage V D and a second voltage V D - V B , wherein V B corresponds to the magnitude of a back voltage.
  • the control circuit 330 serves to apply a second switching waveform -V sw (FIG. 14G) to the lower electrode 24 of bimorph 12.
  • the second waveform -V sw alternates between a voltage of V B and ground and, like the first waveform +V SW , tracks the phase of the clock waveform (FIG. 14A) .
  • FIGS. 14H and 141 respectively depict the potential difference between the upper electrode 22 and the conductive vane 16, and the potential difference between the conductive vane 16 and the lower electrode 24.
  • FIGS. 14B, 14H, and 141 the presence of a logical low upon input data line 320 results in application of the back voltage V B across the upper layer 18 in opposition to the polarization thereof, and in the displacement voltage V D being defined across the lower layer 20 in accordance with the polarization thereof.
  • the switching waveforms +V SW and -V sw produced by the control circuit 330 are substantially in phase with the alternating voltage impressed upon the conductive vane 16 by the driver circuit 310. Implementations of the driver and control circuits in which a differing predefined phase relationship exists between the switching waveforms produced thereby may nonetheless be apparent to those skilled in the art.
  • FIG. 15 shows a schematic representation of the control circuit 330.
  • the control circuit 330 serves to provide a first alternating waveform +V SW to the upper electrode 22, and a second alternating waveform -V sw to the lower electrode 24.
  • the control circuit 330 includes an input inverter 380 addressed by the clock signal (FIG. 14A) , which is substantially in phase with the waveforms +V SW and -V sw .
  • the control circuit 330 includes a first PNP bipolar transistor 384 and a first NPN transistor 386 for switching the first waveform +V SW between V D and V D - V B , respectively.
  • an upper power supply node 388 held at the displacement voltage V D (e.g., 200V) is connected to the upper electrode 22.
  • V D displacement voltage
  • V B back potential
  • the waveform +V SW provides power to the bimorph 12 by charging the capacitance associated with the upper electrode 22
  • the first PNP and NPN transistors 384 and 386 must be capable of providing adequate output current (e.g., 0.1 mA per bimorph).
  • control circuit 330 further includes a second PNP bipolar transistor 396 and a second NPN bipolar transistor 398 for toggling the second waveform -V sw between the back voltage V B and ground. Specifically, when second PNP transistor 396 is in a conductive state and second NPN transistor 398 is non-conductive, the voltage V B across a second Zener diode 402 is supplied to the lower electrode 24. Otherwise, the lower electrode 24 is effectively connected to ground potential through second NPN transistor 398.
  • the first PNP and NPN transistors 384 and 386 are controlled by a first turn-on network 406.
  • Turn-on network 406 includes first and second level-shifting NPN bipolar transistors 410 and 412 designed to switch the first PNP and first NPN transistors 384 and 386 in accordance with the clock waveform provided to the input inverter 380.
  • Current drive is provided to the base of the first NPN transistor 386 through a current mirror 416 connected to the collector of the turn-on transistor 410.
  • the emitter of the first turn-on transistor 410 is linked to the input inverter 380 by the series connection of a second inverter 420 and a first emitter resistor 422.
  • a second emitter resistor 424 couples the emitter of the second level-shifting transistor 412 to the input inverter 380.
  • First and second speed-up capacitors 426 and 427 are provided for partially bypassing the turn-on transistors 410 and 412 during transitions in the clock waveform so as to expedite turn-on of the first PNP and NPN transistors 384 and 386.
  • First and second turn-on resistors 428 and 430 serve in conjunction with the level-shifting transistors 410 and 412 to turn on the first PNP and first NPN transistors 384 and 386 by generating the requisite level-shifted turn-on voltages across the base-emitter junction of each.
  • first and second turn-on capacitors 436 and 438 provide charge reservoirs for respectively supplying switching current to the first PNP and NPN transistors 384 and 386, and to the second PNP and NPN transistors 396 and 398.
  • the control circuit 330 further includes a second turn-on circuit 444 for controlling the PNP and NPN bipolar transistors 396 and 398 transistors which, again, operate to produce the second switching waveform -V sw .
  • the waveform -V sw is generated as a consequence of switching the second PNP and NPN bipolar transistors 396 and 398 in accordance with the clock signal so as to periodically alter the voltage applied to a resistive divider 446.
  • a third level-shifting transistor 448 provides a DC offset to the input clock waveform by drawing current through a third turn-on resistor 450 and coupling resistor 451. In this way the emitter-base voltage of the second PNP transistor 396 is modulated about the base voltage thereof in response to the clock waveform.
  • the clock waveform directly modulates the base-emitter voltage of the second NPN transistor through a base resistor 454.
  • third and fourth speed-up capacitors 458 and 462 expedite turn-on of the transistors 396 and 398 by partially circumventing the level-shifting transistor 448 and resistor 454.
  • the control circuit 330 When the bimorph 12 driven by the control circuit 330 is to be employed in a braille cell, the control circuit 330 will generally operate at a frequency in excess of that detectable by human hearing (e.g., 60 kHz). This frequency selection reduces the likelihood that transient charge storage on the bimorph will be audible to a human operator.
  • FIG. 16 shows a partially schematic, partially block diagrammatic representation of a third alternatively preferred embodiment of the inventive bimorph displacement apparatus 500 suitable for implementation as an integrated circuit.
  • the apparatus 500 is disposed to apply voltage potentials to the conductive vane and to the upper and lower electrodes of a bimorph (not shown) , such as the bimorph 12, on the basis of binary data received at input terminal 510.
  • the displacement apparatus 500 operates to displace the bimorph in upward and downward directions in response to logically high and low data values (i.e., 5V and 0V) , respectively.
  • a first level-shifter 514 provides a DC offset to the input data such that a first high-voltage, p-channel MOS transistor 516 is turned on and off, respectively, upon receipt of logically low and high data values. Since a first current-limiting MOS transistor 518 is biased so as to be continuously conductive, the drain of the first MOS transistor 516 is effectively coupled to the displacement voltage V D . Accordingly, level-shifter 514 operates to turn transistor 516 off and on, respectively, by transforming logically high input values to a voltage of approximately V D , and logically low input values to a voltage of approximately V D - VT, where VT corresponds to a turn-on voltage of the transistor 516.
  • FIG. 17 schematically represents a simplified implementation of the level shifter 514 amenable to convenient description. It is noted that particular physical realizations of the level shifter may differ due to constraints on component size, power consumption, and the like.
  • the level shifter includes an inverter 522 coupled to the input thereof.
  • a base resistor 524 links the output of the inverter 522 with an n-channel MOS transistor 526.
  • the collector of the transistor 526 is connected to a Zener diode 530 through a collector resistor R.
  • the turn-on voltage of the diode 530 is selected to be at least as large as the turn-on voltage VT of the p-channel transistor 516 such that transistor 516 is rendered conductive when the level-shifter 514 is addressed by a logic low.
  • Second and third level-shifters 520 and 522 (FIG. 16) included within the inventive displacement apparatus 500 may be realized substantially identically to the first level-shifter 514.
  • the magnitude of a gate bias voltage 531 applied to the gate of the first current-limiting transistor 518 is adjusted in accordance with a desired bimorph displacement rate.
  • the bias voltage 531 is set to increase the current through transistor 518 if it is desired to reduce the time required to switch the bimorph between upper and lower displacement states, and is adjusted so as to reduce the current through transistor 518 in order to slow the rate of bimorph movement.
  • current-limiting transistor 518 regulates the rate at which capacitive charge is allowed to accumulate upon the conductive vane of the bimorph, while a second current-limiting transistor 532 controls the rate of capacitive discharge from the conductive vane.
  • the rate at which charge accumulated upon the conductive vane is discharged during switching between bimorph displacement states may be controlled by adjusting the magnitude of a second gate bias voltage 534 coupled to the gate of the second current-limiting transistor 532.
  • the bias voltages 531 and 534 could be derived from a common source, thereby enabling an operator to adjust the rate of bimorph displacement via a single control mechanism.
  • a logical low to input terminal 510 causes the first level-shifter 514 to turn on p-channel transistor 516, and also activates lower n-channel MOS transistor 536 connected to input inverter 540.
  • the logically high output of inverter 540 also causes the second level- shifter 520 to turn off an upper p-channel MOS transistor 544, and a fourth level-shifter 548 to turn on an upper n-channel MOS transistor 550.
  • a low data value results in the back voltage V B being applied across the upper piezoelectric layer through simultaneous application of the voltage V D - V B to the upper bimorph electrode and the voltage V D the conductive vane.
  • the lower piezoelectric layer supports the displacement voltage V D when a logical low is received at terminal 510 since the lower bimorph electrode is grounded through turned-on transistor 536 and the voltage V D is present on the conductive vane. In this way a logically low data values induce downward bimorph displacement.
  • FIG. 18 illustratively represents one manner in which the first level-shifter 514 may be modified so as to realize the fourth level-shifter 548.
  • the fourth level-shifter 548 includes an inverter 551 interposed between a first level-shifter 514, or a functional equivalent thereof, and a level-shifter input terminal 552.
  • the output of the level-shifter 514 will preferably be provided to a current mirror (CM) interposed between the level shifter and a p-channel MOS switching transistor 553, with the drain of transistor 553 being connected to the displacement voltage V D .
  • CM current mirror
  • a second Zener diode 554 having a turn-on voltage approximately equal to the back voltage V B less the MOS turn-on voltage VT is included between the switching transistor 553 and a supply rail V D - V B .
  • the current mirror prevents the transistor 553 from forcing excessive current through the Zener diode 554.
  • the fourth level-shifter 548 operates to provide the displacement voltage V D to the n-channel transistor 550 when the switching transistor 553 is turned on, and to provide a voltage of V D - VT thereto otherwise.
  • a high data value results in coupling of the upper bimorph electrode to the voltage V D through upper p-channel transistor 544, in grounding of the conductive vane as a consequence of input n-channel MOS transistor 554 being rendered conductive, and in impression of the voltage V B upon the lower bimorph electrode through a lower p-channel transistor 556.
  • FIG. 19 depicts a braille cell 611 having a generally rectangular frame 618 enclosing a plurality of elongated, piezoelectric bimorph reeds disposed to be controlled by the bimorph displacement apparatus of the present invention.
  • the reeds are stacked vertically adjacent one another in two rows, and four of such reeds, reeds 619-623, are illustrated.
  • Frame 618 includes a web 627 extending between upper and lower cross bars 628 and 629. Such web is electrically non-conducting and acts to electrically isolate the adjacent rows of reeds from one another.
  • a surface mount printed circuit board 631 is provided for the circuitry of the cell, which board is suitably secured to the frame 618 at one end of the latter.
  • each includes a pair of layers 632 and 633 of electrically polarized material sandwiching a leaf 634 of conductive material of brass or the like.
  • the outer surfaces of each of the layers 632 and 633 are covered with a thin layer 636 and 637, respectively, of electrically conductive material.
  • These layers and the leaf 634 of each reed are individually electrically connected to associated lands 641, 642 and 643 on the printed circuit board 631. In this connection, electrical wires are provided to connect the layers to their associated lands, whereas the connection at the leaf
  • each of the bimorphs is obtained by extending the leaf of each of the bimorphs beyond the remainder of the bimorph structure for direct electrical connection to the surface mount printed circuit board. It is to be noted that the electrical connections to each of the reeds is at one of its ends.
  • Adhesive "drops" 646-651 are provided to adhere the end of each of the reeds to the frame web 627. It is to be noted that while the individual drops may at first blush appear to be associated with a particular reed, it actually requires a portion of two drops to maintain the end of each of the reeds in the desired non-movable manner. For example, the electrical connection end of reed 619 is adhered to the web 627 by both the lower portion of drop 646 and the upper portion of adhesive drop 647.
  • the electrical connections are provided at a non-movable portion of their associated reeds. Thus, once electrical connection is established one need not be concerned that the desired cantilever operation may adversely change such electrical connection.
  • the electrical connection is provided before the adherence step so that the adhesive will encompass the electrical connection. This encompassing of the electrical connection provides protection for the same and adds structural rigidity to it, thereby enhancing reliability.
  • a depolarizing field to one of the piezoelectric layers is not necessary to achieve an extended range of bimorph displacement.
  • contraction of the lower layer may be induced by holding the electrode of the upper layer and the center vane at ground while applying a bias voltage to the electrode of the lower layer in the polarizing direction. If a drive voltage having a magnitude equivalent to the bias voltage is then applied to the conductive vane so as to drive the upper layer in the polarization direction, the upper layer is made to contract and the lower layer to expand. In this way the bimorph may be made to operate in the push-pull mode of the present invention without providing a depolarizing field to either of the piezoelectric layers.

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Abstract

A bimorph apparatus having an extended range of displacement is disclosed herein. The bimorph apparatus is typical in that it includes a bimorph having a conductive vane (7) sandwiched between first (5) and second (6) piezoelectric layers, free for movement in response to electrical signals applied thereto. The bimorph includes a driver circuit for developing a first potential drop across the first layer which induces contraction thereof. In addition, however, a second driver circuit operates to develop a second potential drop different from the first potential drop across the second layer contemporaneous with development of the first potential drop, thereby inducing expansion of the second layer. In this way simultaneous contraction and expansion of the first and second layers results in extended displacement of the free portion of the bimorph in a first direction. The second driver circuit may be adapted to apply a third electrical signal to the second layer, and the first driver circuit implemented to apply a fourth electrical signal to the first layer simultaneously with application of the third signal to the second layer. In this manner extended movement of the free portion of the bimorph is induced in the opposite direction or some other second direction.

Description

METHOD AND APPARATUS FOR INCREASING BIMORPH DISPLACEMENT RANGE
Inventors
DISCLOSURE
Background of the Invention
This invention relates to bimorphs and, more particularly to bimorphs capable of increased displacement range.
Piezoelectric bimorphic elements ("bimorphs") have been employed in a variety of applications to provide conversion between mechanical motion or pressure and electrical signals. This may be translation of mechanical motion to electrical signals. For example, the use of piezoelectric bimorphic pickups for electric stringed instruments, such as electric guitars, is well known. See, for example, U.S. Patent No. 4,860,625 (Mathews, 1989) .
They are also employed in a reciprocal manner, i.e., to translate electrical signals into mechanical movement.
As an example of the latter, electromechanical braille cells have been developed to assist the visually handicapped (blind or visually impaired) in gaining access to information normally converted to visual displays for reading. That is, arrangements of braille cells have been developed for use by the visually handicapped to provide a braille read-out from a computer. In general, these arrangements convert the electrical signals to mechanical movement defining braille. A multitude of braille cells are used to define the individual braille letters.
Conventional braille cells have utilized a set of piezoelectric reeds (bimorphs) which bend in response to the application of an electric voltage thereacross for urging the tips of sensing rods through an array of openings in a braille cell reading surface. The selected braille indicia defined by the protruding tips is sensed by the finger of the operator.
Those in the art typically have found it desirable to cantilever the bimorph reeds to, among other things, provide suitable sensitivity without making the braille cell itself too large. U.S. Patent Nos. 4,283,178 and 4,758,165 disclose typical prior art arrangements of this nature. One disadvantage with this approach is that the operative portion of the reed (i.e., that portion where movement is sensed) is only that portion which is cantilevered from a fastening position, decreasing the operative length of the reeds and, as a consequence, requiring the length of the overall cell to be increased to achieve desired sensitivity. Accordingly, a bimorph having improved displacement capability would provide increased sensitivity without requiring an enlargement of cell size.
Summary of the Invention
The present invention addresses the need in the art for a sensitive bimorphic device having an extended range of displacement. In summary, the bimorph apparatus of the present invention is typical in that it includes a bimorph having a conductive vane sandwiched between first and second piezoelectric layers, free for movement in response to electrical signals applied thereto. The bimorph includes a driver circuit for developing a first potential drop across the first layer to induce contraction of the first layer. A second driver circuit operates to develop a second potential drop across the second layer to induce expansion of the second layer contemporaneous with contraction of the first layer. Simultaneous contraction and expansion of the first and second layers in this way, results in extended displacement of the free portion of the bimorph in a first direction. The second driver circuit may be adapted to apply a third electrical signal to the second layer, and the first driver circuit adapted to apply a fourth electrical signal to the first layer simultaneously with application of the third signal to the second layer. In this manner extended movement of the free portion of the bimorph is induced in the opposite direction or some other second direction.
Most desirably, the first and second potential drops are different from one another. One simple way of assuring this difference is to continuously apply a bias voltage to the lower layer. Application of a drive voltage to the conductive vane thus results in the development of different potential drops across the first and second layers. In order to prevent depolarization of either layer, the bias voltage is selected such that the net voltage applied across a layer remains in the direction of polarization for a specified range of drive voltages.
In a preferred embodiment of the present invention the first and second layers are respectively polarized in first and second directions, with the first electrical signal being applied in the first polarization direction and the second electrical signal being applied in the second polarization direction. Extended bimorph displacement is effected through this asymmetrical arrangement by selecting the magnitude of the first electrical signal to be larger than that of the second electrical signal.
Other features and advantages of the invention either will become apparent or will be described in connection with the following, more detailed description of preferred embodiments of the invention.
Brief Description of the Drawings
With reference to the accompanying drawings:
FIGS. 1-8 are utilized in the basic description which follows.
FIG. 9 illustrates a preferred embodiment of the bimorph displacement apparatus of the present invention.
FIGS. 10A and 10B depict circuit representations of a bimorph in which the voltages applied across the upper and lower piezoelectric layers, modeled as upper and lower capacitors U and L, are selected in the conventional manner so as to displace the bimorph upward and downward, respectively.
FIGS. IOC and 10D depict circuit representations of a bimorph in which the voltages applied across the upper and lower piezoelectric layers have been selected in accordance with the method of the present invention so as to improve upward and downward bimorph displacement, respectively.
FIG. 11 schematically depicts control and driver circuits included within a simplified switched relay implementation of the present invention. FIG. 12 shows a schematic representation of another, second preferred embodiment of the inventive bimorph displacement apparatus suitable for inclusion within a bimorph array.
FIG. 13 shows a partially schematic, partially block diagrammatic representation of a third preferred embodiment of the inventive bimorph displacement apparatus.
FIGS. 14A-14I are timing diagrams which illustratively represent operation of the second preferred embodiment of the inventive bimorph displacement apparatus.
FIG. 15 shows a schematic representation of a control circuit included within the second preferred embodiment of the present invention.
FIG. 16 shows a partially schematic, partially block diagrammatic representation of a fourth preferred embodiment of the inventive bimorph displacement apparatus, suitable for implementation as an integrated circuit.
FIG. 17 schematically represents a non-inverting level-shifting circuit designed to drive a p-channel integrated circuit transistor.
FIG. 18 schematically represents a non-inverting level-shifting circuit designed to drive an n-channel integrated circuit transistor.
FIG. 19 depicts a braille cell having a generally rectangular frame enclosing a plurality of elongated, piezoelectric bimorph reeds disposed to be controlled by the bimorph displacement apparatus of the present invention. FIG. 20 is a cross-sectional view of one of the piezoelectric reeds included within the braille cell of FIG. 19.
Detailed Description of the Preferred Embodiment(s)
The following is presented to facilitate an understanding of the invention. One begins with a single sheet of piezoelectric material as illustrated in FIG. 1, of length, width and thickness equal to that of the leaves of a bimorph 1 made with two conductive leaves 2 and 3 having a layer 4 of a dielectric material between them. Lead zirconate titanate is an appropriate dielectric material, polarized in manufacture with polarization, P, as shown in the figure. A voltage V is applied between the leaves 2 and 3 and, hence, between the opposed surfaces of the dielectric. The polarization, P, is the dipole moment per unit volume. For a uniform dielectric, it is also equal to the surface charge density on the dielectric. Thus, for the construction shown in FIG. 1, the surface charge density on the lower surface of the dielectric layer 4 is P coul/m2, and that on its top surface -P coul/m2. The polarization/voltage plot is as shown in FIG. 2. At zero applied voltage there remains polarization as at point A, where the material has been polarized by a positive V in manufacture.
For application of positive voltages from point A, the polarization remains fixed as a viewer moves to his/her right on the top. Thus, the piezoelectric effect, if a clamp holds the material 1 fixed against changes in length or deflection along the length direction in the undamped strip, remains essentially fixed as one applies large voltages in the positive direction.
For application of negative voltages, the motion of the hysteresis curve is to the left from point A. For small excursions, the polarization does not significantly decrease. Further, the stress in a clamped strip (or the strain in a free strip) is proportional to the voltage with a constant of proportionality, but with opposite direction, to that experienced with voltages in the polarizing direction. Of course the stress (or strain) is opposite in sign to that experienced with applied voltages in the polarizing direction.
For application of large negative voltages, the polarization decreases and ultimately goes to zero at point B. At that point there is a coercive voltage corresponding to zero polarization.
At the application of alternating voltages from point A, the P-V trajectory first is along the flat top branch of the hysteresis curve. But as the amplitude increases, the polarization trajectory drops on the negative side and minor loops on the hysteresis curve are encountered. It finally comes to a voltage amplitude which with sufficient cycles leaves the layer 4 depolarized and the piezoelectric effect ceases. Two voltages are identified in FIG. 2. The first is -Vp, the maximum voltage but sufficiently small in magnitude that excursions from point A to it, back through A and to an equal value in a polarizing direction and back to A do not result in depolarization. The second voltage is -V^ which is sufficiently large that cyclic excursions from point A to ~V Dp, back to A, to a magnitude of V^ but in the polarizing direction and back to A results in depolarizing the material. One would choose to operate the material to the right of -Vp to avoid depolarization of the material and loss of its piezoelectric character.
The Bimorph Configuration
Now we go to a two-sheet configuration (FIG. 3) of a bimorph in which two piezoelectric sheets 5 and 6 are separated by a conductive layer 7 of brass or the like. The layers are polarized as shown in the figure. The left end as viewed is clamped, making a cantilever, and the right end is free to deflect. The upward deflection with respect to a fixed reference is D. The thickness of the conductive layer 7 is shown here equal to the thickness of each of the two sheets 5 and 6 for convenience. (Typical dimensions are not shown - the figure is intended only as a vehicle to display ideas and alternative drive configurations.) The three terminals, the top conducting surface of the top layer is T, the bottom conducting surface of the bottom layer is B, and the terminal of the conducting metal layer is M, are to be used in three different configurations.
1. One configuration imposes polarizing drives on the two layers at different times, never imposing a depolarizing drive on any layer. A drive circuit which imposes this is shown in FIG. 4. With the drive switch in position i the base and emitter are grounded, the collector is reverse biased and terminal M is connected to VB through the resistor. The top leaf has no significant voltage - it is at point A in the hysteresis curve of FIG. 2. The bottom leaf has VB applied in the polarizing direction. The deflection D is -VBk, with k being the constant of deflection per volt across one layer. With the drive switch in position ii, the transistor is saturated and the voltage from collector to emitter is about zero, shorting out the lower layer and applying VB to the upper layer. The deflection of the end of the cantilever is VBk. The difference in deflection is 2 k VB.
2. Another configuration is shown in FIG. 5. With the drive switch in position i, the T and B terminals are grounded and the top layer has a depolarizing voltage - it expands. The bottom layer has a polarizing voltage - it contracts. The deflection of the tip is -2k VTIE/2. With the switch in position ii, the top layer has a polarizing signal and it contracts, and the bottom layer has a depolarizing signal - it expands. VTIE/2 must be less than, or at most equal to, Vp of FIG. 2. The deflection of the tip is 2k VTIE/2. The difference in deflection is 2k vTIE.
The ratio of deflections between the two configurations is VB/VTIE. The maximum VB is determined by the permissible voltage impressible on the bimorph, or the maximum voltage which can be delivered by the drive circuitry. Thus VB can be made larger than VTIE.
The basic concept behind the instant invention is illustrated in FIG. 6. By applying a bias voltage on the lower layer to polarize it, the other configuration of drive discussed above is not limited by the voltage Vp. Each layer goes to two extremes, a polarizing voltage VM (FIG. 7) which is the limit before breakdown of the bimorph or the drive circuit and -Vp the maximum voltage in the depolarizing direction which when cyclically applied with the polarizing voltage VM does not lead to depolarization.
We provide a drive voltage of magnitude VM + Vp
(FIG. 8) selecting bias voltages, Vp and VB, which limit the applied voltages in the layers to VM in the polarizing direction and -Vp in the depolarizing direction. With the drive switch in position i, the upper leaf has the maximum depolarizing signal and the bottom leaf has the maximum polarizing voltage applied. With the drive switch in position ii, the upper layer has the maximum polarizing voltage applied (VM) and the lower leaf has the maximum depolarizing voltage applied (-Vp) . The deflection is 2k(VM+Vp) . Referring to FIG. 9, there is illustrated a preferred embodiment 10 of the bimorph displacement apparatus of the present invention. Such apparatus 10 is designed to displace a piezoelectric bimorph 12 in accordance with electrical signals impressed on an input data line 14. It is noted that while the bimorph 12 is depicted in cross section as an elongated bimorphous piezoelectric reed of the type suitable for inclusion in, for example, a braille cell, the teachings of the present invention may be used to increase the displacement of other bimorphic structures.
As shown in FIG. 9, the bimorph 12 includes a center vane 16, typically realized using a thin leaf of brass or the like, sandwiched between first and second piezoelectric layers 18 and 20 electrically polarized as indicated by arrows Al and A2. In the preferred embodiment of FIG. 9 the center vane 16 is electrically conductive, although in alternative embodiments it may be desired that the center vane be made of an insulating material. The piezoelectric layers 18 and 20 may be polarized through application of an appropriate polarization voltage to the bimorph 12 during fabrication thereof. The outer surfaces of the layers 18 and 20 are covered with thin layers of electrically conductive material (e.g. gold or nickel) , hereinafter referred to as upper and lower electrodes 22 and 24, respectively. The upper and lower electrodes 22 and 24 are connected to a control circuit 26 operative to provide voltages to the electrodes 22 and 24 on the basis of data values present on the input line 14. Similarly, a reference voltage applied to the conductive vane 16 is supplied by a driver circuit 28 in accordance with data values impressed on input line 14.
The bimorph 12 is cantilevered adjacent a first end 30 thereof such that a free end 32 is displaced in response to varying dimensional changes within the piezoelectric layers 18 and 20. These changes arise by reason of the reference voltage applied to the conductive vane 16 and first and second voltages applied to the upper and lower electrodes 22 and 24. Fixed cantilever members 34 define a fulcrum point about which the bimorph 12 bends as a consequence of the dimensional changes of the layers 18 and 20. In particular embodiments a bonding agent such as glue or the like is used to secure the portion of the bimorph 12 proximate the first end 30 thereof within a frame structure (not shown) .
The manner in which the apparatus 10 increases displacement of the free end 32 of the bimorph 12 may be more fully appreciated with reference to FIGS. 10A-10D. Specifically, FIGS. 10A and 10B depict circuit representations of a piezoelectric bimorph, such as the bimorph 12, consisting of the series connection of an upper capacitor U and a lower capacitor L. The upper and lower capacitors U and L of the equivalent circuits of FIGS. 10A and 10B, respectively model the upper and lower piezoelectric layers of the bimorph. Referring to FIG. 10A, upward displacement of the free end of a bimorph is conventionally effected by applying a displacement voltage VD across the upper piezoelectric layer in agreement with the direction of polarization P thereof. The charge held by the upper layer is in proportion to a combination of the displacement voltage and the consequent mechanical deflection. The magnitude of the displacement voltage VD is selected to be less than the breakdown potential of the piezoelectric layers 18 and 20, and, for example, would consequently be selected to be approximately 200 volts for piezoelectric layers having thicknesses on the order of 0.010 inches. Application of the displacement voltage VD causes the upper piezoelectric layer to contract, which results in an upward bending of the bimorph. It is observed that an analogous displacement voltage is not conventionally applied across the lower piezoelectric layer which, again, is represented by capacitor L. It follows that any expansion of the lower piezoelectric layer occurring during upward displacement of the bimorph arises only as a consequence of the displacement voltage applied across the upper piezoelectric layer.
In like manner the standard method of bending the bimorph downward involves applying a displacement voltage VD to the lower piezoelectric in agreement with the polarization direction P thereof (FIG. 10B) . Since the displacement voltage typically is not applied to both sides of the upper piezoelectric layer, any expansion of the upper piezoelectric layer accompanying downward displacement of the bimorph occurs by virtue only of the voltage VD applied across the lower layer.
FIGS. IOC and 10D depict electrical equivalent circuits of a bimorph in which the voltages applied respectively across the upper and lower piezoelectric layers have been selected in accordance with the method of the present invention so as to improve upward and downward bimorph displacement. As is shown in FIG. IOC, a displacement voltage VD in agreement with the polarization direction P is applied across the upper layer while a back voltage VB in opposition to the polarization direction P is applied across the lower layer. The back voltage VB serves to enhance upward displacement by externally inducing expansion of the lower piezoelectric layer while contraction of the upper layer is simultaneously being effected by application thereto of the voltage VD. Referring to FIG. 10D, the simultaneous provision of the polarization-opposing back voltage VB to the upper bimorph layer and the displacement voltage VD to the lower bimorph layer (in polarization direction P) similarly increases downward displacement of the bimorph. The back voltage VB is selected to be less than the depolarization voltage associated with the bimorph layer to which it is applied in order that the polarization direction P be maintained. For example, for piezoelectric layers having a thickness of approximately 0.010 inches the back voltage will typically be on the order of 80 Volts. It should be noted that according to the invention the net voltage across each electrode (assuming equal amounts of time are spent in the up and down positions) is in the direction of polarization. This effectively removes any tendency to depolarize.
Switched-Relay Implementation
FIG. 11 schematically depicts an embodiment of the present invention which includes simplified switched relay implementations of the control circuit 26 and the driver circuit 28. As shown in FIG. 11, the driver circuit 28 includes a first relay switch 50 coupled to the conductive vane 16 of the bimorph 12 through a first resistor Rl. Similarly, the control circuit 26 includes second and third relay switches 54 and 56 connected to the upper and lower electrodes 22 and 24 of the bimorph 12 through resistors R2 and R3, respectively. A first back voltage source VB1 is included between a displacement voltage source VD and downward throw terminal D of relay switch 54, while a second back voltage source VB2 is connected between ground and upward throw terminal U of relay switch 56.
When a first data value (e.g., a logic 0) corresponding to downward displacement of the bimorph 12 is present on the input data line 14 the first relay switch 50 is set to throw position D, thereby operatively connecting the conductive vane 16 to voltage source VD. Impression of the first data value on line 14 also results in second relay switch 54 being set to throw position D, which places a potential of VD - VB1 upon the upper electrode 22. Additionally, third relay switch 56 is set to throw position D in response to presence of the first data value on line 14, thereby grounding the lower electrode 24. In this way the free end 32 of the bimorph 12 is displaced downward as a consequence of application of the displacement voltage VD across the upper layer 18 in direction Al contemporaneously with application of the back voltage VB2 across the layer 20 in opposition to polarization direction A2.
The impression of a second data value (e.g., a logic 1) upon input data line 14 sets the relay switches 50, 54 and 56 to upward throw positions U. These switch settings result in provision of the displacement voltage VD across the upper layer 18 in agreement with polarization thereof, and contemporaneously cause the back voltage VB1 to be applied across the layer 20 in opposition to polarization thereof. As may be appreciated by reference to FIG. 10C, application of these voltages to the piezoelectric layers 18 and 20 results in upward displacement of the bimorph 12.
Although the switched-relay implementation 10 of the displacement apparatus 10 effects improved bimorph displacement, in applications involving an array of individual bimorphs (e.g., a braille cell) the number of separate electrical connections to the array is reduced if two of the three electrodes of each bimorph within the array are held at common potentials. In this regard FIG. 12 shows a schematic representation of an alternatively preferred embodiment of the inventive bimorph displacement apparatus 100 in which the upper and lower bimorph electrodes may be held at fixed potentials, yet in which individual control of each bimorph is preserved. Since the inventive displacement apparatus 100 may be employed to displace a piezoelectric bimorph such as that shown in FIG. 9, identical reference numerals will be used to identify the bimorph 12 depicted in FIGS. 9 and 12. Displacement Apparatus for Inclusion in Bimorph Array
Referring to FIG. 12, the displacement apparatus 100 includes a control circuit 260 for applying the displacement voltage VD and the back voltage VB to the upper 22 and lower 24 electrodes of the bimorph 12. The displacement apparatus 100 further includes a driver circuit 280 for switching the potential applied to the conductive vane 16 of the bimorph 12 on the basis of data values present on an input line 140.
Again, in accordance with the present invention the free end 32 of the bimorph 12 is displaced downward by simultaneously applying the displacement voltage VD and back voltage VB to the lower and upper layers 20 and 18 in agreement with, and in opposition to, the polarization directions A2 and Al, respectively. The driver circuit 280 operates to effect this condition by impressing a potential VD + VB upon the conductive vane 16. That is, a potential of VD + VB is applied to the conductive vane 16 when the voltage on the input line 140 is such that PNP bipolar transistor 284 is turned on and first NPN bipolar transistor 286 is turned off. Specifically, application of a data value corresponding to a logical low (i.e., 0 volts) to input data line 140 causes a second NPN transistor 288 to turn on, thereby inducing a voltage drop across resistor Rl' sufficient to turn on the PNP transistor 284. In this way the presence of a logical low on input data line 140 leads to electrical connection of the conductive vane 16 to the voltage VD + VB, and hence to downward displacement of the bimorph 12.
The inventive displacement apparatus 100 operates in a similar manner to bend the bimorph 12 in the upward direction. In particular, the impression of a logical high (i.e., 5 Volts) upon input data line 140 turns on the first NPN transistor 286, thereby effectively grounding the conductive vane 16. This results in the simultaneous application of the displacement voltage VD and back voltage VB to the upper and lower layers 18 and 20 in agreement with, and in opposition to, the polarization directions Al and A2, respectively. As is indicated by FIG. IOC, this condition induces upward displacement of the free end 32 of the bimorph 12.
When the driver circuit 280 is fabricated using discrete electrical components rather than as an integrated circuit the transistors 284, 286 and 288 may be realized using, for example, Motorola MPSA42 bipolar transistors. In such an implementation the resistors Rl', R2' and R3' will generally be selected to be of equivalent magnitude, typically on the order of 1 MΩ.
Single-Supply Displacement Apparatus for Inclusion in Bimorph Arrays
FIG. 13 shows a partially schematic, partially block diagrammatic representation of a second alternatively preferred embodiment of the inventive bimorph displacement apparatus 300. The apparatus 300 is suitable for inclusion in devices such as braille cells incorporating bimorph arrays in which it is desired that identical voltages be applied to two of the three electrical terminals of each bimorph without sacrifice of independent control over each. In addition, the apparatus 300 is advantageously designed so as only to require external provision of a single supply voltage of magnitude VD.
The inventive displacement apparatus 300 includes a driver circuit 310 addressed by an input data line 320 on which are impressed binary signals corresponding to upward and downward displacement of the bimorph 12. Input data present on the data line 320 is clocked through negative AND gate 324 and AND gate 326 in accordance with a clock waveform applied to a driver timing line 327. The output of the negative AND gate 324 is coupled through a resistor 334 to the emitter of an NPN turn-on transistor 338. When the output of negative AND gate 324 registers a logical low when transistor 338 is turned on and draws current through turn-on resistor 340. In this way a PNP pull-up transistor 344 is turned on, which forward biases a first isolation diode 348 and thereby operatively connects the conductive vane 16 to the displacement voltage VD.
As shown in FIG. 13, the output of the AND gate 326 is resistively coupled 350 to the base of an NPN pull-down transistor 352. It follows that when the output of the AND gate 326 registers a logical high the NPN pull-down transistor 352 is turned on, thus creating a forward bias across a second isolation diode 356 and effectively grounding the conductive vane 16. The complementary manner in which the negative AND gate 324 and the AND gate 326 operate to drive the conductive vane 16 may be more fully appreciated by reference to the timing diagrams of FIGS. 14A-14D.
FIGS. 14A and 14B are timing diagram depicting the input signals" received by the driver circuit 310.
Specifically, FIG. 14A shows the clock waveform impressed on the input clock line 330, while FIG. 14B is representative of the magnitude of a particular binary data signal impressed on the input data line 330. FIGS. 14C and 14D correspond, respectively, to the output waveforms generated by the negative AND gate 324 and the AND gate 326 in response to the clock and data waveforms shown in FIGS. 14A and 14B.
Referring to FIG. 14B, the input data transitions from a logical low to a logical high at a time T . Prior to time T-. the output of the negative AND gate 324 rises and falls in synchrony with the clock waveform, while the output of AND gate 326 remains fixed at a logical low. Likewise, subsequent to the data transition at time Tx the output of the negative AND 324 remains unchanged while the output AND gate 326 toggles between a logical high and low in phase with the clock waveform (FIG. 14A) . The foregoing may be more fully appreciated with reference to FIG. 14E, in which is shown a timing diagram illustrating the switching waveform impressed on the conductive vane 16 by the driver circuit 310.
As is shown in FIG. 14F and discussed below, the control circuit 330 is operative to impress a first switching waveform +VSW upon upper electrode 22. The waveform +VSW alternates between a first voltage equivalent to the displacement voltage VD and a second voltage VD - VB, wherein VB corresponds to the magnitude of a back voltage. Similarly, the control circuit 330 serves to apply a second switching waveform -Vsw (FIG. 14G) to the lower electrode 24 of bimorph 12. The second waveform -Vsw alternates between a voltage of VB and ground and, like the first waveform +VSW, tracks the phase of the clock waveform (FIG. 14A) .
The voltages applied across the upper and lower piezoelectric layers 18 and 20 as a result of conjunctive operation of the driver circuit 310 and the control circuit 330 are shown in FIGS. 14H and 141, respectively. Specifically, FIGS. 14H and 141 respectively depict the potential difference between the upper electrode 22 and the conductive vane 16, and the potential difference between the conductive vane 16 and the lower electrode 24. Referring to FIGS. 14B, 14H, and 141, the presence of a logical low upon input data line 320 results in application of the back voltage VB across the upper layer 18 in opposition to the polarization thereof, and in the displacement voltage VD being defined across the lower layer 20 in accordance with the polarization thereof. Again referring to FIGS. 14H and 141, the complementary situation in which the voltage VD is applied across the lower layer 20 and the voltage VB is defined over the upper layer 18 arises when a logical high is impressed upon input data line 320. In this way a logical high present on input line 320 causes simultaneous contraction of the lower piezoelectric layer 20 and expansion of the upper piezoelectric layer 18, thereby causing the bimorph 12 to be displaced upward. Downward displacement of the bimorph 12 is effected in a substantially similar manner when a logical low is applied to the input line 320.
As is evident upon inspection of FIGS. 14A-14G, the switching waveforms +VSW and -Vsw produced by the control circuit 330 are substantially in phase with the alternating voltage impressed upon the conductive vane 16 by the driver circuit 310. Implementations of the driver and control circuits in which a differing predefined phase relationship exists between the switching waveforms produced thereby may nonetheless be apparent to those skilled in the art.
FIG. 15 shows a schematic representation of the control circuit 330. As mentioned above, the control circuit 330 serves to provide a first alternating waveform +VSW to the upper electrode 22, and a second alternating waveform -Vsw to the lower electrode 24. The control circuit 330 includes an input inverter 380 addressed by the clock signal (FIG. 14A) , which is substantially in phase with the waveforms +VSW and -Vsw. Referring to FIG. 15, the control circuit 330 includes a first PNP bipolar transistor 384 and a first NPN transistor 386 for switching the first waveform +VSW between VD and VD - VB, respectively. When the PNP bipolar transistor 384 is turned on and the first NPN bipolar transistor 386 is turned off, an upper power supply node 388 held at the displacement voltage VD (e.g., 200V) is connected to the upper electrode 22. In the reverse case the voltage VD less a voltage drop through Zener diode 392 equivalent to the back potential VB (e.g., 80V) is coupled to the upper electrode 22 through the NPN transistor 386. Since the waveform +VSW provides power to the bimorph 12 by charging the capacitance associated with the upper electrode 22, the first PNP and NPN transistors 384 and 386 must be capable of providing adequate output current (e.g., 0.1 mA per bimorph).
Again referring to FIG. 15, the control circuit 330 further includes a second PNP bipolar transistor 396 and a second NPN bipolar transistor 398 for toggling the second waveform -Vsw between the back voltage VB and ground. Specifically, when second PNP transistor 396 is in a conductive state and second NPN transistor 398 is non-conductive, the voltage VB across a second Zener diode 402 is supplied to the lower electrode 24. Otherwise, the lower electrode 24 is effectively connected to ground potential through second NPN transistor 398.
The first PNP and NPN transistors 384 and 386 are controlled by a first turn-on network 406. Turn-on network 406 includes first and second level-shifting NPN bipolar transistors 410 and 412 designed to switch the first PNP and first NPN transistors 384 and 386 in accordance with the clock waveform provided to the input inverter 380. Current drive is provided to the base of the first NPN transistor 386 through a current mirror 416 connected to the collector of the turn-on transistor 410. As shown in FIG. 15, the emitter of the first turn-on transistor 410 is linked to the input inverter 380 by the series connection of a second inverter 420 and a first emitter resistor 422.
Similarly, a second emitter resistor 424 couples the emitter of the second level-shifting transistor 412 to the input inverter 380. First and second speed-up capacitors 426 and 427 are provided for partially bypassing the turn-on transistors 410 and 412 during transitions in the clock waveform so as to expedite turn-on of the first PNP and NPN transistors 384 and 386. First and second turn-on resistors 428 and 430 serve in conjunction with the level-shifting transistors 410 and 412 to turn on the first PNP and first NPN transistors 384 and 386 by generating the requisite level-shifted turn-on voltages across the base-emitter junction of each. In addition, first and second turn-on capacitors 436 and 438 provide charge reservoirs for respectively supplying switching current to the first PNP and NPN transistors 384 and 386, and to the second PNP and NPN transistors 396 and 398.
The control circuit 330 further includes a second turn-on circuit 444 for controlling the PNP and NPN bipolar transistors 396 and 398 transistors which, again, operate to produce the second switching waveform -Vsw. In particular, the waveform -Vsw is generated as a consequence of switching the second PNP and NPN bipolar transistors 396 and 398 in accordance with the clock signal so as to periodically alter the voltage applied to a resistive divider 446. A third level-shifting transistor 448 provides a DC offset to the input clock waveform by drawing current through a third turn-on resistor 450 and coupling resistor 451. In this way the emitter-base voltage of the second PNP transistor 396 is modulated about the base voltage thereof in response to the clock waveform. The clock waveform directly modulates the base-emitter voltage of the second NPN transistor through a base resistor 454. Again, third and fourth speed-up capacitors 458 and 462 expedite turn-on of the transistors 396 and 398 by partially circumventing the level-shifting transistor 448 and resistor 454.
When the bimorph 12 driven by the control circuit 330 is to be employed in a braille cell, the control circuit 330 will generally operate at a frequency in excess of that detectable by human hearing (e.g., 60 kHz). This frequency selection reduces the likelihood that transient charge storage on the bimorph will be audible to a human operator. Integrated Circuit Implementation
FIG. 16 shows a partially schematic, partially block diagrammatic representation of a third alternatively preferred embodiment of the inventive bimorph displacement apparatus 500 suitable for implementation as an integrated circuit. The apparatus 500 is disposed to apply voltage potentials to the conductive vane and to the upper and lower electrodes of a bimorph (not shown) , such as the bimorph 12, on the basis of binary data received at input terminal 510. Specifically, the displacement apparatus 500 operates to displace the bimorph in upward and downward directions in response to logically high and low data values (i.e., 5V and 0V) , respectively. A first level-shifter 514 provides a DC offset to the input data such that a first high-voltage, p-channel MOS transistor 516 is turned on and off, respectively, upon receipt of logically low and high data values. Since a first current-limiting MOS transistor 518 is biased so as to be continuously conductive, the drain of the first MOS transistor 516 is effectively coupled to the displacement voltage VD. Accordingly, level-shifter 514 operates to turn transistor 516 off and on, respectively, by transforming logically high input values to a voltage of approximately VD, and logically low input values to a voltage of approximately VD - VT, where VT corresponds to a turn-on voltage of the transistor 516.
FIG. 17 schematically represents a simplified implementation of the level shifter 514 amenable to convenient description. It is noted that particular physical realizations of the level shifter may differ due to constraints on component size, power consumption, and the like. In order that the overall transfer characteristic of the level shifter 514 be non-inverting, the level shifter includes an inverter 522 coupled to the input thereof. A base resistor 524 links the output of the inverter 522 with an n-channel MOS transistor 526. The collector of the transistor 526 is connected to a Zener diode 530 through a collector resistor R. The turn-on voltage of the diode 530 is selected to be at least as large as the turn-on voltage VT of the p-channel transistor 516 such that transistor 516 is rendered conductive when the level-shifter 514 is addressed by a logic low. Second and third level-shifters 520 and 522 (FIG. 16) included within the inventive displacement apparatus 500 may be realized substantially identically to the first level-shifter 514.
Referring again to FIG. 16, the magnitude of a gate bias voltage 531 applied to the gate of the first current-limiting transistor 518 is adjusted in accordance with a desired bimorph displacement rate. Specifically, the bias voltage 531 is set to increase the current through transistor 518 if it is desired to reduce the time required to switch the bimorph between upper and lower displacement states, and is adjusted so as to reduce the current through transistor 518 in order to slow the rate of bimorph movement. In this regard current-limiting transistor 518 regulates the rate at which capacitive charge is allowed to accumulate upon the conductive vane of the bimorph, while a second current-limiting transistor 532 controls the rate of capacitive discharge from the conductive vane. In particular, the rate at which charge accumulated upon the conductive vane is discharged during switching between bimorph displacement states may be controlled by adjusting the magnitude of a second gate bias voltage 534 coupled to the gate of the second current-limiting transistor 532. In alternative implementations the bias voltages 531 and 534 could be derived from a common source, thereby enabling an operator to adjust the rate of bimorph displacement via a single control mechanism.
Again with reference to FIG. 16, application of a logical low to input terminal 510 causes the first level-shifter 514 to turn on p-channel transistor 516, and also activates lower n-channel MOS transistor 536 connected to input inverter 540. The logically high output of inverter 540 also causes the second level- shifter 520 to turn off an upper p-channel MOS transistor 544, and a fourth level-shifter 548 to turn on an upper n-channel MOS transistor 550. Hence, a low data value results in the back voltage VB being applied across the upper piezoelectric layer through simultaneous application of the voltage VD - VB to the upper bimorph electrode and the voltage VD the conductive vane. Similarly, the lower piezoelectric layer supports the displacement voltage VD when a logical low is received at terminal 510 since the lower bimorph electrode is grounded through turned-on transistor 536 and the voltage VD is present on the conductive vane. In this way a logically low data values induce downward bimorph displacement.
FIG. 18 illustratively represents one manner in which the first level-shifter 514 may be modified so as to realize the fourth level-shifter 548. As is shown in FIG. 18, the fourth level-shifter 548 includes an inverter 551 interposed between a first level-shifter 514, or a functional equivalent thereof, and a level-shifter input terminal 552. The output of the level-shifter 514 will preferably be provided to a current mirror (CM) interposed between the level shifter and a p-channel MOS switching transistor 553, with the drain of transistor 553 being connected to the displacement voltage VD. In addition, a second Zener diode 554 having a turn-on voltage approximately equal to the back voltage VB less the MOS turn-on voltage VT is included between the switching transistor 553 and a supply rail VD - VB. The current mirror prevents the transistor 553 from forcing excessive current through the Zener diode 554. As may be appreciated from the foregoing, the fourth level-shifter 548 operates to provide the displacement voltage VD to the n-channel transistor 550 when the switching transistor 553 is turned on, and to provide a voltage of VD - VT thereto otherwise.
Referring again to FIG. 16, it is apparent that receipt of logically high input data values by the displacement apparatus 500 causes upward bimorph movement. Specifically, a high data value results in coupling of the upper bimorph electrode to the voltage VD through upper p-channel transistor 544, in grounding of the conductive vane as a consequence of input n-channel MOS transistor 554 being rendered conductive, and in impression of the voltage VB upon the lower bimorph electrode through a lower p-channel transistor 556.
Braille Cell Incorporating Bimorphs with Improved Displacement Range
FIG. 19 depicts a braille cell 611 having a generally rectangular frame 618 enclosing a plurality of elongated, piezoelectric bimorph reeds disposed to be controlled by the bimorph displacement apparatus of the present invention. The reeds are stacked vertically adjacent one another in two rows, and four of such reeds, reeds 619-623, are illustrated. Frame 618 includes a web 627 extending between upper and lower cross bars 628 and 629. Such web is electrically non-conducting and acts to electrically isolate the adjacent rows of reeds from one another. A surface mount printed circuit board 631 is provided for the circuitry of the cell, which board is suitably secured to the frame 618 at one end of the latter.
The bimorphous piezoelectric reeds are all the same. As best seen in the cross sectional view of reed 621 in FIG. 20, each includes a pair of layers 632 and 633 of electrically polarized material sandwiching a leaf 634 of conductive material of brass or the like. As mentioned above, the outer surfaces of each of the layers 632 and 633 are covered with a thin layer 636 and 637, respectively, of electrically conductive material. These layers and the leaf 634 of each reed are individually electrically connected to associated lands 641, 642 and 643 on the printed circuit board 631. In this connection, electrical wires are provided to connect the layers to their associated lands, whereas the connection at the leaf
634 is obtained by extending the leaf of each of the bimorphs beyond the remainder of the bimorph structure for direct electrical connection to the surface mount printed circuit board. It is to be noted that the electrical connections to each of the reeds is at one of its ends.
Adhesive "drops" 646-651 are provided to adhere the end of each of the reeds to the frame web 627. It is to be noted that while the individual drops may at first blush appear to be associated with a particular reed, it actually requires a portion of two drops to maintain the end of each of the reeds in the desired non-movable manner. For example, the electrical connection end of reed 619 is adhered to the web 627 by both the lower portion of drop 646 and the upper portion of adhesive drop 647.
The provision of separate structural adherents of the reed ends to the frames increases reliability while still allowing the cell to be relatively compact. In this connection, the use of the same is counter intuitive in that when one considers making a cell more compact, the natural inclination is to reduce or combine elements, rather than add an additional element. The provision of the separate adherents of the bimorph ends allows the desired cantilever without the cantilever operation placing strain on the electrical connections.
It is to be noted that the electrical connections are provided at a non-movable portion of their associated reeds. Thus, once electrical connection is established one need not be concerned that the desired cantilever operation may adversely change such electrical connection. In the manufacture of the braille cell, the electrical connection is provided before the adherence step so that the adhesive will encompass the electrical connection. This encompassing of the electrical connection provides protection for the same and adds structural rigidity to it, thereby enhancing reliability.
As mentioned at the beginning of the detailed description, Applicant is not limited to the specific embodiment(s) described above. Various changes and modifications can be made. For example, those skilled in the art may be aware of particular electrical implementations of the driver and control circuits other than those disclosed herein.
In addition, application of a depolarizing field to one of the piezoelectric layers is not necessary to achieve an extended range of bimorph displacement. For example, contraction of the lower layer may be induced by holding the electrode of the upper layer and the center vane at ground while applying a bias voltage to the electrode of the lower layer in the polarizing direction. If a drive voltage having a magnitude equivalent to the bias voltage is then applied to the conductive vane so as to drive the upper layer in the polarization direction, the upper layer is made to contract and the lower layer to expand. In this way the bimorph may be made to operate in the push-pull mode of the present invention without providing a depolarizing field to either of the piezoelectric layers.
Moreover, in particular applications it may be desired to utilize a bimorph having an insulator, rather than a conductor, for the center vane. In such instances it will be apparent to those skilled in the art how to appropriately modify the driver and control circuits such that voltages are applied to the first and second piezoelectric layers in the manner taught by the present invention. The claims, their equivalents and their equivalent language define the scope of protection.

Claims

CLAIMSWhat is claimed is:
1. A bimorph apparatus having improved displacement capability, comprising: a bimorph having a conductive center vane sandwiched between first and second piezoelectric layers of predefined polarization, said bimorph having an end free for movement in response to electrical signals applied thereto; and driver means for simultaneously developing first and second potential drops across said first and second layers to respectively induce contraction of said first layer and expansion of said second layer, said driver means including biasing means for increasing the absolute value of the depolarization voltage of said second layer; whereby simultaneous contraction and expansion of said first and second layers displaces said free end of said bimorph in a first direction.
2. The bimorph structure of claim 1 wherein said driver means includes means for applying a third voltage to said second layer which is less than the polarization breakdown voltage of said second layer in the direction of the predefined polarization thereof and for applying a fourth voltage to said first layer during application of said third voltage, which fourth voltage has a value which increases the absolute value of the depolarization voltage of said first layer.
3. The bimorph structure of claim 2 wherein said driver means includes: first relay switch means for connecting said conductive vane to a first power supply node during a first interval and to a second power supply node during a second interval; second relay switch means for connecting said first layer to said second power supply node during said first interval and for connecting said first layer to a first back bias node during said second interval; and third relay switch means for connecting said second layer to a second back bias node during said first interval and for connecting said first layer to said first power supply node during said second interval; whereby said first deflection voltage and first back voltage are respectively impressed across said first and second layers during said first interval and said third voltage and said fourth voltage are respectively impressed across said second and first layers during said second interval.
4. The bimorph structure of claim 3 wherein said driver means includes a first back voltage source connected between said first back bias node and said second power supply node, and a second back voltage source connected between said second back bias node and said first power supply node.
5. The bimorph structure of claim 2 wherein said piezoelectric layer is sandwiched between an upper electrode and said conductive vane, and said second piezoelectric layer is sandwiched between a lower electrode and said conductive vane.
6. The bimorph structure of claim 5 wherein said driver means includes a control circuit for applying first and second back voltages to said upper electrode during first and second intervals, respectively, and for applying third and fourth back voltages to said lower electrode during said first and second intervals, respectively.
7. The bimorph structure of claim 6 wherein said driver means includes a switched transistor circuit for applying said fourth back voltage to said conductive vane during said first interval and for applying said first back voltage to said conductive vane during said second interval.
8. A bimorph apparatus having improved displacement capability, comprising: a bimorph having a conductive center vane sandwiched between first and second piezoelectric layers of predefined polarization, said bimorph having an end free for movement in response to electrical signals applied thereto and said first piezoelectric layer being sandwiched between an upper electrode and said conductive vane and said second piezoelectric layer being sandwiched between a lower electrode and said conductive vane; and driver means for simultaneously developing first and second potential drops of differing magnitude across said first and second layers, respectively, wherein said first and second potential drops respectively induce contraction of said first layer and expansion of said second layer, said driver means including:
(A) means for applying a third voltage to said second layer in agreement with said predefined polarization thereof and for applying a fourth voltage to said first layer during application of said third voltage so as to induce movement of said free end in a second direction;
(B) a control circuit for applying first and second back voltages to said upper electrode during first and second intervals, respectively, and for applying third and fourth back voltages to said lower electrode during said first and second intervals, respectively;
(C) a switched transistor circuit for applying said fourth back voltage to said conductive vane during said first interval and for applying said first back voltage to said conductive vane during said second interval; and input logic means for generating a first switch control voltage during said first interval in response to a first input data value, and for generating a second switch control voltage during said second interval in response to a second input data value; whereby simultaneous contraction and expansion of said first and second layers displaces said free end of said bimorph.
9. In a braille cell for converting between electrical signals and mechanical movement, the combination of: a plurality of cantilevered bimorph reeds, each of which has an end free for movement in response to varying dimensional changes in said reed arising by reason of electrical signals applied thereto and includes a first piezoelectric layer sandwiched between an upper electrode and a conductive vane and a second piezoelectric layer sandwiched between a lower electrode and said conductive vane; and control circuit means for simultaneously applying a first back voltage to said upper electrode and for applying a second back voltage different from said first back voltage to said lower electrode so as to induce contraction of said first layer and expansion of said second layer, the absolute value of said second back voltage being selected to be less than the absolute value of the depolarization voltage of said second layer; whereby simultaneous contraction and expansion of said first and second layers displaces said free end of said one bimorph in a first direction.
10. The braille cell of claim 9 wherein said first and second piezoelectric layers are polarized in first and second predefined polarization directions, and wherein the polarities of said first and second back voltages are selected to conform respectively to said first and second predefined polarization directions.
11. A bimorph apparatus having improved displacement capability, comprising: a bimorph having a conductive vane sandwiched between first and second piezoelectric layers, said bimorph having a portion free for movement in response to electrical signals applied thereto; a control circuit for applying a first switching signal to said first layer and a second switching signal to said second layer, said first and second switching signals being of first and second phases, respectively; a first driver network having a switch element connected between said conductive vane and a first reference voltage, said switch element being addressed by a third switching signal of a third phase wherein said first, second and third phases have a first predefined phase relationship; a second driver network having a switch element connected between said conductive vane and a second reference voltage, said switch element being addressed by a fourth switching signal of a fourth phase wherein said first, second and fourth phases have a second predefined phase relationship; whereby said first predefined phase relationship is selected such that first and second displacement voltages are simultaneously impressed across said first and second layers, respectively, so as to displace said free portion in a first direction and said second predefined phase relationship is selected such that third and fourth displacement voltages are simultaneously impressed across said first and second layers, respectively, so as to displace said free portion in a second direction; and an input logic network is included for enabling said first driver network and disabling said second driver in response to a first input data value, and for enabling said second driver network and disabling said first driver network in response to a second data value.
12. In a cell for converting between electrical signals and mechanical movement, the combination of: a plurality of bimorphs, each of which includes a conductive vane sandwiched between a first piezoelectric layer connected to a first switching terminal and a second piezoelectric layer connected to a second switching terminal, each of said bimorphs having a portion free for movement in response to electrical signals applied thereto; a control circuit for applying a first switching signal to said first switching terminal and a second switching signal to said second switching terminal, said first and second switching signals being of a predefined phase relationship; a plurality of driver networks, each of said driver networks having a switch element connected between said conductive vane of one of said bimorphs and a first reference voltage wherein each of said driver networks includes an input logic network for periodically opening said switch element in accordance with said predefined phase relationship; said predefined phase relationship being selected such that first and second displacement voltages are simultaneously impressed across said first and second layers, respectively, of each bimorph connected to one of said driver networks addressed by a first data value.
13. A method for improving the displacement capability of a bimorph having a conductive vane sandwiched between first and second piezoelectric layers and a portion free for movement in response to electrical signals applied thereto, comprising the steps of: applying a first potential drop across said first layer to induce contraction of said first layer; and applying a second potential drop across said second layer to induce expansion of said second layer during application of said first potential drop; biasing said second layer during the application of said first and second potential drops, with a voltage having an absolute value less than the depolarization voltage of said second layer; whereby simultaneous contraction and expansion of said first and second layers displaces said free portion of said bimorph in a first direction.
14. The method of claim 13 further including the step of simultaneously applying first and second electrical signals to said first and second layers, respectively, so as to develop said first and second potential drops.
15. The method of claim 14 further including the step of applying a third potential drop across said first layer and a fourth potential drop different from said third potential drop across said second layer so as to displace said free portion in a second direction, said third potential drop including a biasing component which increases the absolute value of the depolarization voltage of said first layer.
16. The bimorph apparatus of claim 1 wherein said driver means simultaneously develops the maximum potential drop in the polarizing direction which the first layer can withstand without breakdown while producing said second potential drop at the maximum voltage which the second layer can withstand without depolarization.
17. The braille cell of claim 9 wherein the value of said first back voltage is selected to be the maximum value which the first layer can withstand without breakdown while the second back voltage is selected to be the maximum value which the second layer can withstand without depolarization.
18. The method of claim 13 wherein said first potential drop is selected to be of a value which is the maximum said first layer can withstand without breakdown and said second potential drop is selected to be the maximum value which said second layer can withstand without depolarization.
PCT/US1994/003823 1993-05-18 1994-03-07 Method and apparatus for increasing bimorph displacement range WO1994027330A1 (en)

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EP0911784A1 (en) * 1997-10-22 1999-04-28 Gunnar Matschulat Tactile reading device
EP1575157A1 (en) * 2002-12-16 2005-09-14 Wac Data Service Kabushiki Kaisha Piezoelectric actuator driver
EP2012291A1 (en) * 2007-07-04 2009-01-07 Optelec Development B.V. Electromechanical relief display
WO2009095911A1 (en) * 2008-01-28 2009-08-06 Technion Research & Development Foundation Ltd. Piezoelectric-ferroelectric actuator device
DE102012012183A1 (en) * 2012-06-19 2013-12-19 Festo Ag & Co. Kg Piezoceramic bending transducer for fluid valve, has electrical check unit that is connected between connecting unit of intermediate layer and common electrical reference point of piezoelectric ceramic plates
US8847466B2 (en) 2008-06-19 2014-09-30 Nxp B.V. Piezoelectric bimorph switch

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0911784A1 (en) * 1997-10-22 1999-04-28 Gunnar Matschulat Tactile reading device
EP1575157A1 (en) * 2002-12-16 2005-09-14 Wac Data Service Kabushiki Kaisha Piezoelectric actuator driver
EP1575157A4 (en) * 2002-12-16 2007-09-05 Wac Data Service Kabushiki Kai Piezoelectric actuator driver
EP2012291A1 (en) * 2007-07-04 2009-01-07 Optelec Development B.V. Electromechanical relief display
WO2009095911A1 (en) * 2008-01-28 2009-08-06 Technion Research & Development Foundation Ltd. Piezoelectric-ferroelectric actuator device
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DE102012012183A1 (en) * 2012-06-19 2013-12-19 Festo Ag & Co. Kg Piezoceramic bending transducer for fluid valve, has electrical check unit that is connected between connecting unit of intermediate layer and common electrical reference point of piezoelectric ceramic plates
DE102012012183B4 (en) * 2012-06-19 2014-04-03 Festo Ag & Co. Kg Piezoceramic bending transducer and method for operating a piezoceramic bending transducer

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