WO1994023304A1

WO1994023304A1 - Semiconductor chip

Info

Publication number: WO1994023304A1
Application number: PCT/EP1994/000738
Authority: WO
Inventors: Heinz Schade
Original assignee: Steag Reinraumtechnik Gmbh
Priority date: 1993-03-29
Filing date: 1994-03-10
Publication date: 1994-10-13
Also published as: DE4310170A1

Abstract

The invention concerns a semiconductor chip (31) with at least one active region (32), which can be inexpensively connected to at least one other chip by virtue of the fact that at least one additional chip (33) is disposed on the semiconductor chip (31). This disposition enables the chips (31, 33) to be bonded directly, without using wires, thus giving a compact design and making it possible to accommodate the whole combination in a housing (37). This makes a high integration density possible for chips which have been manufactured using different techniques.

Description

Semiconductor chip

The invention relates to a semiconductor chip on which at least one additional chip is arranged.

In order to connect semiconductor chips to one another, ceramic substrates or printed circuit boards are used, on which the different chips or their connections or pins are connected with wires. In the case of ceramic substrates, the connecting wires are laid in or on the ceramic, whereas when using printed circuit boards, the lines are formed by conductor tracks on the printed circuit board. A separate housing is required for each chip, which significantly increases the manufacturing costs. However, the theoretical possibility of integrating the integrated circuits or active areas of otherwise separate chips in a semiconductor component leads to chips with a larger area. Since the costs of the chips increase disproportionately with their size, a more cost-effective method of production is not possible. In addition, the chips to be connected to one another are very often manufactured using different, mutually exclusive manufacturing processes, so that in principle it is not possible to manufacture several individual chip components together on a single semiconductor chip.

Another conventional way of connecting two chips to one another is to provide pads, so-called pads, on the chip-free chip substrates, which are connected to one another with a wire, for example by the so-called wire-bonding method. However, a considerable area of the semiconductor substrate is required for the attachment of pads. Since the costs for a semiconductor component depend essentially on the size of the semiconductor substrate, the costs for this method for connecting chips increase significantly. From the publications JP 63-11659 A. In: Patents Abstr. of Japan, Sect. E. Vol. 12 (1988), No. 357 (E-662); JP 58-154254 A. In: Patents Abstr. of Japan, Sect. E. Vol. 7 (1983), No. 272 (E-214); JP 4-99056 A. In: Patents Abstr. of Japan, Sect. E. Vol. 16 (1992) No. 332 (E-1236); JP 60-150660 A. In: Patents Abstr. of Japan, Sect. E. Vol. 9 (1985), No. 318 (E-366) and JP 58-158958 A. In: Patents Abstr. of Japan, Sect. E. Vol. 7 (1983), No. 280 (E-216), semiconductor chips are known, on each of which an additional chip is arranged. The individual chips that are connected to one another are conventional semiconductor chips, possibly manufactured using different manufacturing methods, but not sensor chips that have to be connected to an evaluation circuit.

The invention is therefore based on the object of providing a semiconductor chip which is designed as a sensor and has an evaluation unit without additional wiring and in a very small space.

This object is achieved in that the semiconductor chip has an active area which is designed as a motion sensor.

In contrast to the known stack arrangement of chips according to the cited documents, the actual semiconductor chip in the present invention is an active chip that serves as a motion sensor and that with a

Chip for the evaluation of the sensor signals is combined. In conventional arrangements with semiconductor chips as motion sensors, the chip serving as motion sensor and the evaluation chip are arranged on a support plate, for example a circuit board with conductor tracks, and the connections of the chips are connected by conductor tracks or additional wires. Through the The measure according to the invention of equipping the semiconductor chip with an active area serving as a motion sensor and arranging the additional chip, in particular serving as an evaluation circuit, on the semiconductor chip results in a considerably more compact one

Arrangement with less manufacturing effort. The particular advantage of such an arrangement is, however, that because of the non-existent or at least very short connection paths between the semiconductor chip serving as a sensor and the evaluation chip, the electromagnetic radiation or interference that is present is the normally very weak sensor signal, which is in part of the order of magnitude of 10 ~ ¹² A and below, do not affect or distort.

Starting from a semiconductor chip of the type mentioned at the outset, the task is solved by an active area which is designed as a motion sensor. The chips to be connected are therefore not on an additional circuit board or an additional one

Ceramic substrate applied and the individual chip connections then connected to each other via lines, but the additional chip is arranged directly on the semiconductor chip. The great advantage is that no connecting wires or conductor tracks are required. This not only results in shorter signal paths, but the semiconductor chip can also be small due to the short signal paths and designed as a very sensitive sensor. In particular, due to the short signal paths, they are electromagnetic

Interferences which can impair or falsify the sensor signal are less serious than in the case of conventional arrangements with connecting lines consisting of wires between the sensor and, for example, an evaluation circuit. According to an advantageous embodiment of the invention, the additional chip is arranged at least partially on a free area of the semiconductor chip substrate. In this case, this free area serves as a carrier for the additional chip. Alternatively, however, it is also possible for the additional chip to be arranged at least partially over the active region of the semiconductor chip. As a result, the area of the semiconductor chip can be reduced further, and the connecting lines between the chips also become shorter.

It is particularly advantageous if the electrical connection between the semiconductor chip and the additional chip is made by directly contacting the contact points with one another. As a result, the contacting points or the input / output (I / O) connections from chip to chip on the semiconductor substrate are small and require only a small area, so that the dimensions of the semiconductor chip substrate can be kept small. Since the cost of a semiconductor device is significantly different from that

Depending on the size of the semiconductor chip substrate, the arrangements according to the present invention can be manufactured more cost-effectively.

The contacts of the additional chip with those of the semiconductor chip can be contacted in various ways, preferably by means of a soldering process, a bonding method or the flip-chip technology. The connection surfaces preferably consist of conductive metal alloys in a composition which is selected and advantageous for the particular contacting method chosen. These contacting measures result in a very inexpensive assembly of complex units.

According to a further very advantageous embodiment of the invention, the semiconductor chip and the additional one Chip housed in a common housing. The direct contacting of the two chips, which - seen individually - are not yet packaged or are connected to one another without a housing, are preferably accommodated in a common housing. Since the cost of a chip is essentially determined by the housing and the connecting pins passing through the housing, a much simpler, inexpensive chip with a high packing density and using separately manufactured chips can be produced in this way. In particular, significantly fewer connections to the outside are required overall, which not only reduces the manufacturing outlay, but in particular also increases the reliability both during the manufacturing process and during assembly of the chip and during its use.

According to a very advantageous embodiment of the invention, the semiconductor chip and the additional chip are manufactured using different manufacturing processes. This allows very advantageous chip combinations to be created in a simple manner and in the smallest space. In this context, it is advantageous if the semiconductor chip is a control circuit with low line consumption and the additional chip is a power circuit, or vice versa. This enables a compact interconnection of power and control electronics, which offers advantages when using such components in automobile construction and for machine controls. The control circuit with low power consumption can preferably be in

CMOS technology, while the power circuit is bipolar. The manufacturing technology can therefore be optimally selected for the respective individual chip areas. It is normally not possible to use different chip production techniques at the same time, since the acids and solvents used in this process are different or not tolerate or even exclude other chemical substances required for the treatment.

The present invention is also particularly advantageous when the semiconductor chip is a sensor chip and the additional chip is an integrated evaluation circuit for the sensor chip. In this way, the sensor, including the evaluation circuit, can be accommodated in a compact, small structural unit, the sensor and the evaluation circuit each being able to be produced independently with different manufacturing processes. In this context, it is particularly advantageous that practically no connecting lines between the sensor and the evaluation circuit are required, so that the risk of interference is significantly reduced. In addition, it is possible to accommodate both the evaluation circuit and the sensor in an electromagnetically sealed, sealed housing, as a result of which the sensitivity to interference of such semiconductor chips is further reduced. As a result, very small, sensitive sensors can be used, since the output signal of the sensors also depends in particular on the size of the sensors.

In connection with the application of the present invention in the field of sensor technology, it is in particular also possible to arrange the additional chip, which is preferably used as an evaluation circuit, in such a way that it acts as a mechanical limitation of moving sensors, for example acceleration sensors serves, as will be explained in more detail below using an exemplary embodiment.

According to a further advantageous embodiment of the invention, the semiconductor chip and / or the additional chip has connection areas, for example in the form of bonding pads, for the connection to the outside. Overall, however considerably fewer connections or connections through housings are required because the connections between the chips themselves are located inside the housing, as a result of which not only the packaging costs are lower, but also the reliability of the chips is or becomes higher.

The invention, as well as further features and advantages thereof, will be explained below using exemplary embodiments with reference to the figures. Show it:

1 shows a conventional chip wiring on a ceramic substrate, FIG. 2 shows a conventional wiring of chips on a circuit board,

Fig. 3 by means of a conventional wiring of chips

Bond wires and FIG. 4 an embodiment of the semiconductor chip according to the invention.

Fig. 1 shows a conventional wiring form of chips

1 with connections 2, which are formed in or on a ceramic substrate 3. When wiring according to Fig.

2, the chips 1, each in a housing, are wired to one another via their connecting pins 4 and conductor tracks 5 of a printed circuit board 6. The wiring shown in FIG. 3 is carried out using bond wires 7, which connect the connection areas 8 of a sensor chip 9 to connection areas 10 of an evaluation circuit 11.

These conventional types of installation and wiring have the disadvantage that connecting lines 2, 5 and 7 are required for the wiring, which not only represent a high manufacturing outlay, but also cause damage and - in the case of Sen ¬ sensor circuits - give rise to electromagnetic radiation, whereby both the mechanical and the functional reliability of the chip combination suffers. The area required for contacting or bonding the connecting lines 2, 5, 7 on the semiconductor substrate is also relatively large, so that the semiconductor substrate area cannot be fully used for the active circuit or sensor area.

The embodiment according to the invention shown in FIG. 4 has a sensor chip 31 with a sensor 32, which in the exemplary embodiment shown is a movable sensor. An evaluation circuit 33 is arranged on the sensor chip 31 in a free area and is connected via conductive contacts to corresponding connection surfaces 34 of the sensor chip 31, for example by means of a soldering process. The pads 34 of the

In this exemplary embodiment, sensor chips 31 are connected to sensor 32 via integrated conductors 36. The entire sensor chip with the additional chip 33 applied thereon, which serves as an evaluation circuit, is accommodated in a housing 37, which is indicated as a frame. The sensor chip 31 or the evaluation circuit 33 is connected to the outside, that is to say through the housing base of the housing 37, with pins 38 via bond connections 35.

No wires are required between the sensor chip 31 and the additional chip 33. Rather, the two chips are directly contacted within a common housing.

In the exemplary embodiment shown in FIG. 4, a mechanical limiting element 39, for example made of silicon, is provided above the acceleration sensor 32 and limits the deflections of the acceleration sensor. The limiting element 39 can be soldered together with the additional chip 33 on the sensor chip in one operation. The invention was previously explained with reference to a preferred exemplary embodiment. However, numerous modifications and refinements are possible for the person skilled in the art without departing from the inventive idea. In particular, the additional chip 33 can also be arranged over the active region of a semiconductor chip 31, for example a sensor chip, as a result of which the semiconductor area of the semiconductor chip can be further reduced. It is also possible to provide the semiconductor chip 31 with a number of active areas, ie a number of sensors 32 and / or integrated circuits. In addition, more than one additional chip 33 can also be attached to the semiconductor chip 31 if this is desired or required.

Claims

1. Semiconductor chip, on which at least one additional chip is arranged, passes through an active region which is designed as a motion sensor.

2. A semiconductor chip according to claim 1, characterized in that the additional chip (33) is arranged at least partially on a free area of the semiconductor chip (31).

3. Semiconductor chip according to claim 1 or 2, characterized ge indicates that the additional chip (33) is at least partially arranged over the active region (32) of the semiconductor chip (31).

4. Semiconductor chip according to one of the preceding Ansprü¬ che, characterized in that the electrical connections between the additional chip (33) and the semiconductor chip (31) by direct contacting of the connections (34) with each other.

5. Semiconductor chip according to one of the preceding claims, characterized in that the contacting of the connections of the additional chip (33) with those (34) of the semiconductor chip (31) takes place by means of a soldering operation.

6. Semiconductor chip according to one of claims 1 to 4, characterized in that the contacting of the connections of the additional chip (33) with those (34) of the semiconductor chip (31) takes place by means of a bonding method.

Semiconductor chip according to one of Claims 1 to 4, characterized in that the contacting of the The additional chip (33) is connected to those (34) of the semiconductor chip (31) by means of the flip-chip technology.

8. Semiconductor chip according to one of the preceding claims, characterized in that the semiconductor chip (31) and the additional chip (33) are accommodated in a common housing (37).

9. Semiconductor chip according to one of the preceding claims, characterized in that the semiconductor chip (31) and the additional chip (33) are produced with different manufacturing processes.

10. Semiconductor chip according to one of the preceding claims, characterized in that the semiconductor chip (31) is a sensor chip and the additional chip (33) is an integrated evaluation circuit for the sensor chip (31).

11. A semiconductor chip according to claim 10, characterized in that the additional chip (33) is provided as a mechanical limiting element (39) for the motion sensor (32).

12. Semiconductor chip according to one of the preceding claims, characterized in that the semiconductor chip (32) and / or the additional chip (33) has connecting surfaces (35) for connections to the outside.