WO1994010707A1

WO1994010707A1 - Highly absorbent solar cell and production process

Info

Publication number: WO1994010707A1
Application number: PCT/DE1993/001046
Authority: WO
Inventors: Arthur ENDRÖS; Richard Einzinger; Wolfgang KRÜHLER; Andreas Schlachetzki; Hergo-Heinrich Wehmann
Original assignee: Siemens Aktiengesellschaft
Priority date: 1992-11-05
Filing date: 1993-11-02
Publication date: 1994-05-11

Abstract

A highly absorbent solar cell has a substrate made of crystalline silicon and, epitaxially grown thereon, a highly absorbent compound semiconductor layer of the system In1-xGaxAsyP1-y. The pn semiconductor junction is formed in the substrate as a homojunction or at the interface between substrate and highly-absorbent layer as a heterojunction. A metallic back-surface contact on the substrate and a finger electrode structure over the highly absorbent layer complete the solar cell.

Description

Superabsorbent solar cell and manufacturing method.

Highly efficient, large-area, inexpensive and environmentally compatible solar cells are required for photovoltaic energy generation in the power range. No solar cell type currently meets these requirements at the same time.

Although solar cells made of III-V compound semiconductors (GaAs / GaSb) show the highest efficiencies of over 30 percent to date, they are currently neither large-scale nor sufficiently inexpensive to manufacture. Because of the direct band gap of the III-V semiconductors, approx. 50 n to 1 μm thick semiconductor layers are sufficient to absorb incident sunlight, but the mechanical stability of compound semiconductor layers can only be guaranteed from a layer thickness of a few 100 μm. The use of solar cells from III-V compound semiconductors has therefore hitherto been limited to concentrator systems in which the sunlight is concentrated on small solar cell areas by means of optical systems.

Although solar cells made of single-crystalline silicon (c-Si) can be manufactured in large quantities and in an environmentally compatible manner, they are currently not yet highly efficient and at the same time inexpensive enough, since both the outlay in terms of process and the quality requirements for the silicon material increase disproportionately towards high efficiencies .

This is one of the main reasons for the lower efficiency of silicon solar cells and the high costs for highly efficient ones Silicon solar cells are the technical problem that, because of the indirect band gap of crystalline silicon, layer thicknesses of approximately 100 μm are necessary in order to completely absorb the sunlight. As a result, the location at which charge carrier pairs are generated can be up to 100 μm far from the location of the

Carrier separation (p / n transition) must be removed. On this distance to be overcome by diffusion, impurities and lattice construction errors in the crystal lead to the recombination of charge carrier pairs and thus to a reduction in the efficiency of the solar cell. The efficiency of c-Si solar cells is therefore heavily dependent on the purity and perfection of the silicon material. Depending on the material quality and manufacturing effort, top efficiencies of up to 24 percent are achieved today. With economically justifiable. So far, effortlessly manufactured c-Si solar cells have only achieved an efficiency of around 14 to 17 percent.

The problem of the present invention is therefore to increase the efficiency of solar cells in a cost-effective manner. Furthermore, a method for producing such solar cells is to be specified.

According to the invention, this problem is solved by a solar cell according to claim 1 and a method for producing this solar cell according to claim 10.

Further refinements of the invention can be found in the subclaims.

The recently successful heteroepitaxy of III-V compound semiconductors on crystalline silicon makes it possible to grow high-quality compound semiconductor layers in thin layers on the relatively cheaper silicon. Although III-V semiconductors already show high absorption constants due to the direct band gap, it has now surprisingly been found that the layers grown by heteroepitaxy remove sunlight more than usual. sorb and absorption coefficients in the range of 5 x 10 " ⁴ to 2 x 10 ^~ 5 cm"! ± _{m have a} wavelength range from 700 to 1000 nm. This means that a large part of the available solar spectrum, for example, is already absorbed in 50 nm thick indium phosphide layers. It is further surprising that the absorption edge known from III-V semiconductors in the long-wave range above 900 nm is not observed in the high-absorption layers according to the invention and that the absorption constant in the long-wave range only drops gently.

In the highly absorbing layer, complete absorption of sunlight takes place in a very thin layer thickness of, for example, 50 nm. The generation of charge carrier pairs caused thereby is therefore localized within this thin layer. Since the pn junction is arranged near the interface to the compound semiconductor layer, the minority charge carriers only have to cover a short distance to the charge-separating junction. The opportunity and thus the probability of a recombination of charge carrier pairs is therefore greatly reduced, more charge carriers are separated and a higher current and thus a higher efficiency of the entire solar cell is achieved. Since the absorption takes place entirely within the highly absorbent layer, the quality requirement for the crystalline silicon substrate is significantly lower. Majority charge carriers must predominantly be transported within the substrate, so that the Si substrate in the solar cell functions practically only as an electrical connection. Inexpensive silicon can thus be used. The relatively expensive III-V semiconductor is also required in a thin layer and is therefore significantly cheaper than known III-V solar cells. The only thin compound semiconductor layers also cause fewer environmental problems. Compared to solar cells made of crystalline silicon, the efficiency is improved. For example, single-crystalline silicon wafers are used as substrates, which were produced according to the Czochralski or the "floating zone" process. The substrates should have a (100) orientation and, with a uniform orientation, can also be polycrystalline.

To support the epitaxy, a smooth surface of the substrate is required, which should also be oxide-free.

For the epitaxial growth of the highly absorbent

Layer, gas phase epitaxy is preferred, for example a MOVPE method in which the components forming the compound semiconductor are provided in the form of vapors of organometallic compounds. Furthermore, the highly absorbent layer can also be applied by means of molecular beam and liquid phase epitaxy. However, the gas phase processes are cheaper and faster to carry out. In addition, a process that is not in equilibrium can only be controlled with the gas phase epitaxy. In this way, non-ideal layers can also be produced, which is not possible with liquid phase epitaxy.

The mismatch of the crystal lattice of silicon and III-V compound semiconductors requires a buffer layer for heteroepitaxy, over which the epitaxial layer can grow in high quality. The buffer layer is highly tensioned due to the mismatch, which is also believed to be the reason for its high absorption, which is up to three orders of magnitude higher than that of crystalline silicon. If a MOVPE method is used, the buffer layer can be grown, for example, at a first, lower temperature, while an ideal wax-up temperature is then maintained for the further, higher-order semiconductor layer, which is above the one mentioned above.

The pn semiconductor junction is preferably located in the silicon substrate as in a known solar cell. The vast majority Part of the substrate body has weak doping of a first conductivity type, while an emitter layer heavily doped with dopants of the second conductivity type is formed as a thin layer and lies below the epitaxially grown layer. The substrate is preferably p- and the emitter layer is n ⁺ -doped. This has the advantage that silicon atoms which diffuse into the compound semiconductor and produce an n-doping there need not be overcompensated by an increased addition of p-dopants.

In an arrangement with a p ⁺ emitter layer, the compound semiconductor layer is preferably grown p ⁺ -doped.

In a further embodiment of the invention, the highly absorbent layer is an intrinsic compound semiconductor layer which is free of dopants. This results in a lower density of foreign atoms, so that the service life of the minority charge carriers in the highly absorbent layer increases further. In this embodiment, the charge carriers generated by the incident light reach the neighboring p / n junction by diffusion over the silicon emitter layer, where they are finally separated. However, the greatly reduced conductivity of the undoped compound semiconductor makes it necessary to change the current dissipation. For this purpose, front contacts designed as finger electrodes can be formed directly on the emitter layer, which is subsequently exposed by etching corresponding openings in the highly absorbing layer.

In a further embodiment of the invention, the silicon substrate has a doping of the first conductivity type, while the highly absorbent layer has a high doping of the second conductivity type. The pn junction of the solar cell therefore forms at the interface between the

Substrate and the compound semiconductor layer as a heterojunction. Since no emitter layer is formed in the substrate must be, this is the simplest embodiment of the invention.

The method for producing the solar cell according to the invention is explained in more detail below on the basis of exemplary embodiments and the associated four figures.

The figures show four embodiments of the invention on the basis of schematic cross sections through solar cells according to the invention.

Preparation of the substrates

The silicon substrates are oriented in the (100) direction and have a thickness guaranteeing mechanical stability of, for example, 300 μm. The substrates can be monocrystalline or polycrystalline, but because of the orientation they are preferably sawn from larger blocks that can be drawn or cast. The p-doped wafers customary in microelectronics are preferably used. According to known methods, a highly doped emitter layer of the opposite conductivity type can be produced, for example, by plasma-assisted diffusion of dopants.

In the next step, the substrates are freed of a superficial, natural oxide layer. This can be done by a tempering step at 950 ° C, with hydrogen, ASH3 or PH3 being selected as the tempering atmosphere. The most effective is an arsenic hydrogen environment. The substrate now has the smooth and oxide-free surface required for epitaxy.

If the epitaxy is carried out immediately after the diffusion of doping substances for the emitter layer, the substrate surface is already oxide-free, an additional step can be omitted. Epitaxial deposition of the compound semiconductor indium phosphide

The crystalline quality and morphology of an indium phosphide layer deposited epitaxially on silicon depends not only on the pretreatment of the silicon substrate, but also strongly on the properties of the indium phosphide buffer layer initially deposited. This is necessary in order to avoid the growth problems of the epitaxial layer resulting from the lattice mismatch between indium phosphide or other III-V semiconductors.

The buffer layer is grown on the substrate at a temperature of approximately 400 ° C., which is ideal for epitaxy. The starting materials for the organometallic gas phase epitaxy are gaseous phosphine and solid trimethyl indium, which is introduced into the reaction chamber with hydrogen as the carrier gas. In about 20 minutes, a typically 80 to 90 nm thick indi- umphosphide buffer layer is grown at the temperature.

If a thicker, highly absorbent layer is required, a further highly ordered layer is allowed to grow over the buffer layer under ideal epitaxial conditions. For this purpose, a temperature of, for example, 615 ° C. is selected, and, as in the present embodiment, a ratio by volume of the III: V components of 1: 112 is used. This results in a growth rate of approx.1.5 μm per hour.

By gradually changing the gas composition in the epi-taxing reactor, III-V semiconductors with different compositions and doping can be epitaxially grown on the buffer layer without excessive lattice mismatch occurring during growth. By adding arsine (ASH3 ₎ , for example, an InP _x Asι_ _x semiconductor is obtained, while by adding silane (SiH4) an n-type doping and by adding dimethyl zinc a p- Type doping can be generated in the epitaxial layer. By means of this continuous change in the semiconductor, the course of the energy bands and, via the band gaps, also the course of the absorption properties of the superabsorbent layer can be changed as a function of the location. This enables not only an optimal adaptation of the absorber layer to the sun spectrum, but also the generation of special potential profiles (for example back surface field) in the layer for better collection of the charge carrier pairs generated by incident light.

Production of a silicon solar cell with heterojunction (FIG. 1):

A (100) -oriented silicon substrate S has a doping of a first conductivity type (p or n). As already described, an indium phosphide buffer layer PS is applied over it, which receives a doping of the second conductivity type (n ⁺ by adding silane or p ⁺ with dimethyl zinc) during the growth by adding appropriate dopants. At the interface between substrate S and the buffer layer PS, a heterojunction is formed with a space charge zone in which the charge carrier pairs generated by incident light are separated. By further growth of III-V compounds over the indium phosphide buffer layer PS, the optical properties of the highly absorbent layer AS can be adapted to the solar spectrum.

To contact the highly absorbent layer, a metallic finger contact (grid) FK is applied, which creates an ohmic contact of the highly absorbent layer and consists, for example, of a gold / titanium alloy. On the substrate side, contact is preferably made over the entire surface, for example with a silver layer (RK). A finally applied antireflection layer AR made of titanium oxide serves for optical adaptation and protects the absorber layer. FIG. 2 shows a solar cell which has a substrate S of the first conductivity type, a narrow, highly doped zone of the second conductivity type (emitter layer ES) and a highly absorbent layer AS which is highly doped with dopants of the second conductivity type. The growth of the absorber layer AS can take place as in the first example, as can the generation of the metallic finger contacts FK, the anti-reflective layer AR and the full-sided metallic back contact RK. The emitter layer can be produced directly before the epitaxy process by a conventional diffusion process. Phosphorus or boron are driven in as dopants at 870 ° C. or at 1000 ° C. for a few minutes. The emitter layer ES thereby has a thickness of less than 0.3 μm. Due to the spatial separation of the pn junction and the highly absorbent layer AS, the electrical properties of the pn junction can be optimized separately from the optical properties of the highly absorbent layer AS.

To produce a solar cell according to FIG. 3, a thin, highly doped emitter layer ES is passed through in a substrate S having a doping of the first conductivity type

Driving in dopants of a second conductivity type. A highly absorbing layer AS is deposited in a highly pure manner by means of gas phase epitaxy without the addition of dopants. This results in a lower density of foreign atoms, the service life of the minority charge carriers in the high-absorption layer AS increasing. The charge carriers generated by incident light then reach the emitter layer ES and the adjacent pn junction by diffusion, where they are finally separated. The contacting of this solar cell is advantageously applied directly above the emitter layer ES, for which purpose the highly absorbent layer AS is removed at certain locations by means of mask technology and wet chemical etching, and the emitter layer ES is exposed there. Finally, an ohmic finger contact FK is applied to these points. anti- Reflection layer AR and back contact RK complete the arrangement.

In the embodiment shown in FIG. 4, as in the previous exemplary embodiment, a pn junction is produced in the substrate and a highly absorbent layer AS is deposited on top of it without the addition of dopants. Using a combined mask / etching technique, gaps are created in the highly absorbent layer AS and the emitter layer ES is exposed therein. This can now serve as a seed for a subsequent epitaxial growth of a further silicon layer WS by means of gas phase epitaxy (for example MOVPE). If the highly absorbent layer consists of indium phosphide, the evaporation of phosphorus from the highly absorbent layer is effectively prevented if the silicon epitaxy is carried out at temperatures below 600 ° C. If the emitter layer ES is advantageously n ⁺ -conducting, then during the epitaxial deposition of the further silicon layer WS, an additional admixture of phosphine to the reaction gases can both prevent the evaporation of phosphorus from the highly absorbent layer and also for the desired n ⁺ - Doping of the epitaxial silicon layer. A prerequisite for the epitaxial growth of a further silicon layer is that at least the upper layer region of the highly absorbing layer is again designed as a buffer layer.

The physical advantage of this structure is that the charge carrier pairs generated in the highly absorbent layer AS can now be derived on both sides of the layer. Minority charge carriers that additionally diffuse out can diffuse through the further epitaxially produced silicon layer and the gaps in the highly absorbent layer to the pn junction and are separated there. The ohmic finger contacts FK are produced exactly over the gaps in the highly absorbent layer AS on the further epitaxial silicon layer WS and thus ensure one lower series resistance of the solar cell. A finally applied antireflection layer AR serves as optical adaptation and protection of the further epitaxial layer, while the back contact RK completes the solar cell.

In addition to the indium phosphide, another III-V compound semiconductor can also be selected for the highly absorbent layer AS and deposited epitaxially on the crystalline silicon (S, ES).

Claims

1. solar cell with

- A substrate (S) made of crystalline silicon

- An epitaxially grown over the substrate highly absorbent compound semiconductor layer (AS) of the system Inτ__ _x Ga _x AεyPτ__y

- a pn-semiconductor junction in the area of the interface between substrate (S) and highly absorbing layer (AS)

- A back contact (RK) on the substrate (S) and

- A finger electrode structure (FK) over the highly absorbent layer.

2. Solar cell according to claim 1, wherein the highly absorbent layer (AS) has at least one buffer layer (PS) and a further highly ordered layer.

3. Solar cell according to claim 1 or 2, wherein the substrate has a doping of a first conductivity type and a relatively thin highly doped emitter layer (ES) of a second conductivity type below the highly absorbing layer (AS).

4. Solar cell according to claim 3, in which the highly absorbent layer (AS) is intrinsic and free of dopants.

5. Solar cell according to claim 4, in which a further epitaxially grown highly doped silicon layer (WS) of the second conductivity type is arranged above the intrinsic highly absorbing layer.

6. Solar cell according to claim 1 or 2, in which the substrate (S) has a doping of the first conductivity type and the highly absorbent layer (AS) has a high doping of the second conductivity type, so that there is at the phase boundary between substrate (S) and highly absorbent layer (AS) forms a heterojunction.

7. Solar cell according to one of claims 1 to 6, in which the highly absorbing layer (AS) has a thickness of 50 to 200 nm.

8. Solar cell according to claim 7, in which the highly absorbing layer (AS) has a thickness of 50 to 80 nm.

9. Solar cell according to one of claims 1 to 8, in which the superabsorbent layer has a composition that continuously changes in the direction of the layer thickness and a continuously changing band gap, and this falls in the direction of the substrate (S) and there with the Bandgap of the silicon matches.

10. Solar cell according to one of claims 1 to 9, in which the silicon substrate (S) has a (100) orientation. .

11. A method for producing a solar cell provided with a highly absorbent layer, comprising the steps

- Preparation of a substrate (S) made of crystalline silicon with (100) orientation

- Epitaxial growth at a first temperature of a buffer layer (PS) of a III-V semiconductor of the system Inι_ _x Ga _x As _y Pι_ _y epitaxially growing over the buffer layer at a second higher temperature of a further, highly ordered layer of the III-V semiconductor, and

- Generation of a finger electrode structure (FK) over the III-V semiconductor layer (AS) and a rear side electrode (RK) on the substrate.

12. The method according to claim 11, in which the epitaxial growth takes place from the gas phase.

13. The method according to claim 11 or 12, in which a bandgap profile is set within the growing high-absorption layer (AS) during the epitaxial growth by continuously changing the semiconductor composition.

14. The method as claimed in one of claims 11 to 13, in which the silicon substrate used has a pn junction, the epitaxially produced layers are waxed free of doping substances and openings in the epitaxial layers are produced by masking and etching, in which the substrate is exposed.

15. The method according to claim 14, in which the finger electrode structure (FK) is produced in the openings on the substrate (S).

16. The method according to claim 14, in which a silicon layer is epitaxially grown over the epitaxial layers of the III-V semiconductor (AS), the substrate exposed in the openings serving as a crystallization seed.