WO1993015464A1

WO1993015464A1 - Computer backplane having line switches

Info

Publication number: WO1993015464A1
Application number: PCT/GB1993/000166
Authority: WO
Inventors: Ralph Harold Kelly; Arthur Kenneth Porter
Original assignee: Ralph Harold Kelly
Priority date: 1992-01-30
Filing date: 1993-01-26
Publication date: 1993-08-05
Also published as: AU3456093A

Abstract

A backplane (10) for a computer or like system has a bus and a plurality of slots. To control the connectability of the slots in various clusters, each slot is connected to the bus by a variable condition switch array, which can be in the form of a one-to-two line demultiplexer in the form of an integrated circuit (26) having input lines (34) of the bus and two sets of output lines (35, 36) connected by switch groups (37, 38) whose conditions variable by a switch interface (39) controlled by a control bus (40).

Description

_Computer backplane having line switches

This invention relates to a backplane for a PC or other computer system.

In such a computer system a backplane is used as a base for effecting general connection between a plurality of plugged in units, usually in the form of circuit boards. In order that the boards can be interconnected the backplane has a succession of spaced columns of plug or socket connectors (usually socket) which can be divided into a sixteen bit section and an eight bit section. Each such column be it of two sections or not will be referred to, hereafter as a "slot". There can be any number of slots on a backplane but fourteen is a common number. A backplane is itself in the nature of a printed circuit board and on its rear has a plurality of printed tracks which unite the sockets of each slots to the corresponding sockets of other slots in the backplane.

When a plurality of circuit boards are connected to the backplane they will all be connected together via the tracks on the back of the board and they can therefore communicate with each other. In the configuration just described, wherein all the blocks are connected to each other, the full complement of (perhaps 14) boards are connected together and operate together. However, in many applications it can be desired that the slots are arranged in groups, for example a group of six together with a group of eight. In each group all the slots are interconnected by the tracks, but the two groups are not connected. Once the system has been installed and the various boards connected to the backplane re-configuration is not easy. If the entire board is connected and it is desired to create a new group of one or more slots it is necessary to isolate that new group of slots from the rest. This can be done either by purchasing and installing a new backplane (with the expense and disruption to use) or by physical breaking of the tracks between the new group and the remainder of the backplane. This is something of a hit and miss affair involving the use of a knife or the like to break the tracks on the rear of the backplane. However, as a mere breaking of tracks is relatively easy it is often practised rather incur the expense and complication of buying a new specially configured backplane to replace the original.

However, such a simple cutting of the tracks has its disadvantages. Firstly, although tracks can be cut they cannot be joined without rather careful and unreliable hand soldering.

This would not be acceptable in telecommunication or comparable communication systems. Thus, if a board of totally united slots is re-configured into a group of (say) 6 and 8 slots that configuration can not be further changed except to further sub divide either of the original groups. If it were to be decided that one group should be reduced to 5 slots and the other increased to 9 this would not be possible.

As an additional problem, before the required cutting of the tracks can be effected the whole backplane and its connected boards must be disconnected from the power supply and therefore must be inoperative. In the case of a communication system wherein communication of a large organisation may be being handled by such a unit, for the whole unit to be down for a considerable period while the backplane is cut and/or replaced is unacceptable.

Fig 1 illustrates a typical situation in practice wherein a process or organisation is being controlled by means of a computer system. The process being controlled can be an industrial process as illustrated, but it can easily be a communication system. For example in a head office of a company there may be communication systems connecting with the local communication organisers such as the Post Office, Telecommunications Corporations, as well as the company's own internal communication arrangements between its various offices in a particular country or its offices overseas. All such systems will usually be in the form of a backplane having a plurality of slots with which various boards are engaged. Each board, or a cluster of boards together, will run a particular aspect of the operation and may need to communicate with other boards in their own cluster and also possibly with boards outside their cluster. As mentioned in the earlier patent applications, (the contents whereof are hereby incorporated by reference) , the problem of changing the configuration of a backplane after it has been determined are significant. In even a small area of the backplane, because of the danger of surges and other interruptions, if a board has to be changed, or if a particular cluster has to be changed the entire backplane has to be shut down in order that such modification can be carried out without danger to the functioning of the other boards on the backplane. Whilst a backplane can be divided relatively easily (in the case of single layer boards) by a simple cutting of all the component lines of the main bus on the board leaving each individual cluster self contained and unconnected, further reconnection or reconfiguration is not usually possible. This is particularly true where different boards and different clusters have different bus architectures.

As mentioned, Fig 1 shows a typical situation wherein a backplane (10) connected to one or more central processing units such as CPU (11) is used to control a process generally indicated at (12) and for convenience represented as a chemical process having three stages comprising mixing (13) , reaction (14) and separation (15). Each of the three stages (13), (14) and (15) is controlled by a respective cluster (16) , (17) , (18) of boards engaging slots (19) of the backplane (10) . It will be seen that cluster (16) has two boards, cluster (17) has seven boards, and cluster (18) has five boards. Cluster (16) controls the mixing, cluster (17) controls the reaction and cluster (18) controls the separation stage. Each of the three stages (13) , (14) and (15) will, individually, be complex and involve many sensors, actuators, pipes, computers, temperature sensors and all the usual actuators, sensors and recorders associated with a chemical process. However, usually because of their nature, and possibly because of their adoption from previous systems or from different manufacturers, the computer control arrangements for each of the three stages will very often be different. For this reason the computer boards controlling that stage have to be arranged in a separate cluster on the backplane. Thus, whilst interface lines between any two of the boards even if in different clusters must continue to connect, if variations in a particular stage need to be made by altering any one of the boards on the backplane this cannot presently be done without interfering with the other processes.

Unfortunately, if it is required to replace or alter a board, it is necessary, usually, either that it be removed from the backplane, or that procedures be carried out on it whilst it is mounted on the backplane. If it not switched off, there is always the possibility that any work on that board within a particular cluster can result in damage to or undesirable reaction from a board in the same or other clusters.

In some situations it can be acceptable to shut down the entire backplane so that all the boards become inoperative during such testing and/or modification. In many installations, however, most of the installation will require to continue acting whilst a single board or cluster is offered or replaced. For example, in a communication system serving a large organisation if a particular cluster dealt with transmission of speech, whilst a separate cluster dealt with the transmission of telefax (in such a system there would undoubtedly be desirable connection between the telefax and speech systems) it might be necessary in certain circumstances to shut down entirely the telefax service whilst a new system is installed or whilst important alterations were carried out. If, in such circumstances it became necessary to disconnect all telephone or other verbal communication, even for a short time, the imposition upon the organisation would be significant.

As has been previously discussed in the aforesaid earlier applications, the present invention addresses the problem of providing a reconfigurable backplane wherein the flexibility is imparted to computer systems of the nature described. The invention provides a backplane having a plurality of lines constituting a bus extending therealong, a plurality of slots connecting with said lines and providing connections with a similar plurality of boards, there being provided a condition- variable switch array between the lines and each slot.

The switch array can be mechanical, electrical, or electronic. In fibre optic systems, of course, the switch array could be an optical arrangement.

The invention also provides a backplane having a plurality of slots and a bus extending along the backplane, each slot being connectable to the bus by a body of switches.

The switches can be arranged in an individual array.

The switches can be part of an integrated circuit.

Desirably the switches are arranged to have their conditions variable by applied signals. To this end each switch can have an address and a switch database can be provided to connect the switches with a central processor or a director circuitry. The director circuitry can be a data processor capable of despatching signals in order to alter the conditions of the switches.

The main bus can have a power portion and a signal portion. The power portion and the data portion can be accommodated within a single switch array. Desirably however, there is a separate switch arrangement for the power portion and the signal portion.

The power portion lines in the bus can have individual power switches influenceable from a power switch controller or processor.

The power portion lines can have power switches arranged in an integrated circuit influenceable by a controller.

The data portion of the bus can have a plurality of switches incorporated in an integrated circuit.

The invention also provides a backplane incorporating a plurality of slots and a main bus, a multichannel one to two line switching arrangement being associated with each slot.

The invention also provides a reconfigurable backplane, including an integrated circuit in the form of a multichannel one to two line demultiplexer, having a plurality of inputs siteable plurality of output.

The integrated circuit can be an N-channel integrated circuit, wherein N is greater than or equal to 64. The integrated circuit for use with some backplane arrangements desirably has N greater to or equal to 96.

The integrated circuit can have a processor/controller interface. The integrated circuit can include an address decoder for unique selection of that circuit in a plurality of other circuits.

The power dissipation capability per switch of the integrator circuit is desirably less than or equal to 5 x 10 - 3 watts.

The integrated circuit can have about 200 switches and a total power dissipation of about or less than 1.00 watt.

The integrated circuit can be of the type wherein each switch has a switching capacity equal to or less than 25 milliamps in the HIGH state and 15mm in the LOW state

The invention wil- be described further, by way of example, with reference to the accompanying drawings wherein:

Fig l is a schematic diagram illustrating a possible situation in which the backplane/chip of the present invention can be usable, fig 1 being a description of either the prior art or the present invention;

Fig 2 is a schematic view of preferred backplane of the invention; Fig 3 is a schematic view of a preferred integrated circuit of the invention, and

Fig 4 is a more detailed diagram of the integrated circuit of fig 3.

Referring to the drawings. Fig 2 shows a preferred backplane (20) of the invention. Although the backplane (20) is only shown schematically, it will be appreciated to those skilled in the art that the backplane (20) comprises a generally plane or body of a basically insulating material within which are embodied a plurality, perhaps up to four or more, layers of (dis)continuous conducting tracks providing a plurality of interconnections between various components on the board. In its actual construction the base of the backplane (20) can be considered as a multilayer printed circuit board. Mounted on the backplane are a plurality of board receiving formations (21) . Each formation (21) (hereinafter referred to as a ^λslot'), comprises an array of first connector halves provided on the backplane (20) . Normally, the first connector halves will be in the form of a plurality of sockets which can be engaged by pins (not shown) on an inserted computer board, particularly on a distal edge of a computer board. However, it will be appreciated that this system is merely conventional, and is not relevant to this particular invention. If each slot were to comprise a plurality of plugs then each board would comprise a plurality of sockets. A mixed arrangement of both plugs and sockets on slot and board could be provided and might be advantageous in some circumstances to provide polarity or to guard against incorrect insertion. Zero insertion force connectors can be desirable. It must be emphasised, however, that the invention is relevant to any particular form of interconnection between an edge of a board and its associated slot. For convenience, however, each individual connector portion of each slot will be referred to as a ^λsocket'.

As has been previously mentioned, normally each socket in each slot will be connected to one line of a multiple line bus which bus would extend across the full width of the backplane (20) .

In the present application, however, the sockets in each slot are connected into a plurality of data sockets, indicated at (22) and (23) in fig 2. It will be appreciated that the sockets (22) and (23) are merely examples of, for example, sockets nos one and ninety six in a typical main bus. Data sockets (22) and (23) are connected by lines (24) and (25) (again examples only of, for example ninety six lines) to an individual integrated circuit (26) which comprises an array of switches.

Extending across the board from a single, or many portioned central processing unit (27) , is a main bus (28) which, in a backplane which was not in accordance with the invention would be the signal bus extending the length of the backplane. Although the bus (28) is shown as merely two lines indicated (1) and (96) , it will be appreciated that the number of lines in the bus can be ninety six or any other different suitable number. The position of the integrated switching circuit (26) can be as shown. Other circuits can be provided in any convenient form to fit into the architecture of the backplane. The bus (28) extends between all the integrated switch circuits (26) and in accordance with the conditions of the switches within the arrays (26) selected ones of the components of the bus (28) can be connected to selected ones of the sockets (22) to (23) .

Each switching circuit (26) can incorporate or have connected thereto an interface (29) which is connected to a switch signal bus (30) which can be connected to the processor card/connector (27) or a separate director or a part of a common processing arrangement.

Ideally, the switching of both signal lines and power lines in the backplane bus would be accompanied by a single array (26) at each slot. However, if it is desired to separate out the power switching facilities, either because their presence in a chip could significantly increase the power consumption thereof, or because it is convenient to separate them, they can be incorporated as a separate item. In one way of doing this as indicated in Fig. 2 power/ground lines can extend across the full length of the board and be connected directly to the various slots in accordance with conventional and various accepted arrangements of power and ground lines (effectively providing a power bus) . In such a situation each power connection between the power bus and its associated slot can be by means of a power switch (32) , which power switch can be connected to a control unit (39) connectable to a central controller or power controller (27) enabling the condition of that switch to be altered in accordance with the desirability of the connection or disconnection of that particular power/ground terminal.

Alternatively, the ground/power circuitry is incorporated in a separate power bus extending from the processing unit (27) , or a separate or individual unit and extending the full length of the backplane (20) .

The power bus (31) connects with a plurality of power switch arrays (32) which contain a plurality of switches which determine which of the numerous members of the power bus collection (31) are connected to the various power/ground sockets of the relevant slot. The number of lines within the power bus (31) will be significantly less than the number of lines in the signal bus (28) and therefore the structure of the power switch array (32) can be significantly simplified and smaller than the signal switch array (26) . However, the power switch array (32) will usually be constructed and arranged to dissipate a greater power than the signal switches (26) , possibly through the use of individual power switches between each slot, as indicated.

As indicated in figs 3 and 4, a preferred switching array (26) is suitable for use as the switching array (26) in the backplane of the invention, but also has the possibility of use in other equipment.

The array (33) has inputs for a number N of digital signal lines

(34) and possible outputs for a comparable number of signal lines

(35) and (36) . Schematically described the input (34) can pass along line (34A) and be diverted either along line (35A) or (36A) or both, depending upon the position of its respective switch in that arrangement.

Lines in the bus (34) are connected to the lines in buses (35) and (36) by an array of switches which are divided into two sets of ninety six, the sets being indicated at (37) and (38) in fig 4.

The switches (not individually shown) are electronic switches whose condition can be altered by the application of an incoming signal. Each switching array has an address and is connected (by wiring) to a processor interface (39) which is connected to a processor/control bus (40) which is controlled either by from a separate computer circuitry or from a section of, or directly from the main processing unit (27) . Signals passed along the bus (40) are identified in the interface (39) and directed to appropriate ones of the switches during setting up and configuring of the backplane. At this stage the position of all the switches within the two sets (37) and (38) is determined and therefore the relative conditions of interconnections between each of the slots and the bus (28) is determined by such configuring. After configuring, the condition of the interconnection remains unchanged, during normal operation until modification is desired.

Each switch unit has its own address which can be transmitted along the bus (40) along with appropriate programming instructions and therefore the condition of each switch can be determined during alteration.

For use in a system using light signals as or as part of the signalling medium, selected ones of the buses, the boards, the backplane and the switch arrays can be optical in character, or can be connected to other parts in the system by optical/electronic transducers.

It will be appreciated that the present invention gives massive flexibility to a backplane and allows a wide number of different cluster configurations to be provided within a backplane allowing the backplane to be reconfigured.

Of course, the use of a separate power switch for each slot does have advantages outside the field of selective configuration and does stand as an invention in its own right.

Claims

1. A backplane having a plurality of lines constituting a bus extending therealong, a plurality of slots connecting with said lines and providing connections with a similar plurality of boards, there being provided a condition- variable switch array between the lines and each slot.

2. A backplane having a plurality of slots and a bus extending along the backplane, each slot being connectable to the bus by a body of switches.

3. A backplane as claimed in claim 1 or 2 wherein the switch array is mechanical, electrical, electronic or an optical arrangement.

4. A backplane as claimed in claims 1, 2 or 3 wherein the switches are arranged in an individual array.

5. A backplane as claimed in any of claims 1 to 4 wherein the switches are in an integrated circuit.

6. A backplane as claimed in any preceding claim, wherein the switches are arranged to have their conditions variable by applied signals.

7. A backplane as claimed in claim 6, wherein each switch has an address.

8. A backplane as claimed in claim 6 or 7 wherein a switch data bus is provided to connect the switches with director circuitry.

9. A backplane as claimed in claim 8 wherein the director circuitry is a data processor capable of despatching signals in order to alter the conditions of the switches.

10. A backplane as claimed in any preceding claim, wherein the main bus can have a power portion and a signal portion.

11. A backplane as claimed in claim 10 wherein the power portion and the data portion are accommodated within a single switch array.

12. A backplane as claimed in claim 10 wherein there are separate switch arrangements for the power portion and the signal portion.

13. A backplane as claimed in claim 12, wherein the power portion lines in the bus have individual power switches influenceable from a power switch controller.

14. A backplane as claimed in claim 12, wherein the signal portion of the bus has a plurality of switches incorporated in an integrated circuit.

15. A backplane incorporating a plurality of slots and a main bus, a multichannel one to two line switching arrangement being associated with each slot.

16. A backplane as claimed in claim 16, wherein the arrangement is an integrated circuit in the form of a multichannel one to two line demultiplexer, having a plurality of inputs and an plurality of outputs.

17. A backplane as claimed in claim 16, wherein the integrated circuit is an N-channel integrated circuit wherein N is greater than or equal to 64.

18. A backplane as claimed in claim 17 wherein the integrated circuit has N greater than or equal to 96.

19. A backplane as claimed in claim 15, 16 or 17 wherein the integrated circuit includes an address decoder for unique selection of switches in a plurality of switches.

20. A backplane as claimed in any of claims 15 to 19 wherein the power dissipation capability per switch of the integrated circuit is less than or equal to 5 x 10 - 3 watts.

21. A backplane as claimed in claim 20 wherein the integrated circuit has about 200 switches and a total power dissipation of about or less than 1.00 watt.

22. A backplane as claimed in any of claims 15 to 21 wherein the integrated circuit is of the type wherein each switch has a switching capacity equal to or less than 25 milliamps in the HIGH state and 15 milliamps in the LOW state.

23. A backplane substantially as described with reference to the accompanying drawings.