WO1993010595A1 - Current control circuit for converter - Google Patents

Current control circuit for converter Download PDF

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Publication number
WO1993010595A1
WO1993010595A1 PCT/US1992/010045 US9210045W WO9310595A1 WO 1993010595 A1 WO1993010595 A1 WO 1993010595A1 US 9210045 W US9210045 W US 9210045W WO 9310595 A1 WO9310595 A1 WO 9310595A1
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WO
WIPO (PCT)
Prior art keywords
signal
polarity
carrier
positive
circuit
Prior art date
Application number
PCT/US1992/010045
Other languages
French (fr)
Inventor
Hirokazu Sakiya
Hirofumi Sugiura
Original Assignee
Otis Elevator Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Otis Elevator Company filed Critical Otis Elevator Company
Publication of WO1993010595A1 publication Critical patent/WO1993010595A1/en

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output

Definitions

  • This invention relates to a current-controlling circuit for controlling the current flowing in the converter of an inverter device.
  • Fig. 4 illustrates the main circuit configuration of a common inverter device.
  • the main circuit of the inverter device is equipped with a converter (A) having multiple control elements (gate elements) , a smoothing circuit (B) , and an inverter (C) .
  • the converter (A) and inverter (C) By performing the current control or the voltage control function of the converter (A) and inverter (C) in the control circuit (omitted in the figure) , the three-phase input voltage (R) , (S) , and (T) input via the coil (ACL) is first converted to direct current, and then converted to a three-phase output voltage of predetermined frequency (U) , (V) , and (W) for output.
  • This invention is applied to the control system for the current flowing in the converter (A) .
  • the carrier comparison system and the hysteresis comparator system have been known as the systems which perform current control of converters.
  • Fig. 5 illustrates the constitution of the current- controlling circuit of the carrier comparison system. Referring to this figure, the current command signal
  • the difference signal is first amplified by the proportional amplifier (or proportional integral amplifier) (11) , and then is input to the second signal comparison means.
  • the second signal comparison means consists, for example, of the second adder (13) and the comparator (14) .
  • the amplified difference signal is input into the positive input of this second adder (13) .
  • a carrier signal a waveform having positive and negative symmetry of a predetermined pulse height, is input from the carrier signal generator (12) .
  • the second adder (13) outputs a signal of negative polarity when the difference signal is larger than this carrier signal, and when it is smaller, it outputs a signal of positive polarity.
  • This signal is input to the comparator (14) , and here, a gate signal whose time width and a change in polarity dependent on the level difference between the input signals is formed. This gate signal is output to the control element of the converter, and by this means, the current flowing in the converter is controlled.
  • Fig. 6 illustrates the constitution of the current- controlling circuit by hysteresis comparator system. It is the same as the aforementioned carrier comparison system in that the current command signal (i*) to the positive input and the current detection signal (i) negatively fed back are compared at the first adder (10) to obtain the difference signal. It is different in that this standard signal is directly input to the hysteresis comparator (16) exhibiting hysteresis characteristics to obtain the gate signal. In this system, there is the effect that a current waveform with a maximum phase difference can be follow-up controlled in a minimum amount of time.
  • the carrier signal is a positively and negatively symmetrical waveform
  • the output of the proportional amplifier (11) i.e. , the amplified difference signal
  • the gate signal with alternating positive polarity (ON) and negative polarity (OFF) will be output.
  • the converter does not have a voltage source on the input side (i.e. , a three-phase input voltage) , even if it is controlled by this type of gate signal, the mean value of the output voltage and the current will near the zero value, and no specific problem will occur.
  • the purpose is to offer a current-controlling circuit which enables stable current control of the converter even when the difference signal of the current command signal (i*) and the current detection signal (i) nears zero asymp ⁇ totically.
  • Fig. 1 is a block diagram of the current-controlling circuit for a converter of the first application example of this invention.
  • Fig. 2 is an explanatory figure illustrating the process of generating a gate signal of the first application example of this invention.
  • Fig. 3 is a block diagram of current-controlling circuit for a converter of the second application example of this invention.
  • Fig. 4 is a schematic diagram of main circuit of inverter device to which this invention is applied.
  • Fig. 5 is a block diagram of current-controlling circuit for the conventional carrier comparison system.
  • Fig. 6 is a block diagram of current-controlling circuit by conventional hysteresis comparator system.
  • An object of this invention is to achieve a carrier signal having a single polarity.
  • the polarity discriminator which distinguishes the polarity of the difference signal output from the first signal comparison means and outputs a signal of a certain polarity depend ⁇ ing on whether the polarity is classified positive or negative
  • the carrier signal polarity switching circuit which switches the carrier signal to either a positive or negative polarity corresponding to the polarity signal and inputs it to the second signal comparison means are provided.
  • the change in polarity of the gate signal output from the second signal comparison means will thus be synchronized with the change in polarity of the difference signal.
  • an absolute value conver ⁇ sion circuit which inputs the difference signal and inputs its absolute value to the second signal comparison means, the polarity discriminator which distinguishes the polarity of the said difference signal and outputs a polarity signal depending on whether it is positive or negative, and the gate signal polarity switching circuit which switches the gate signal output from the second signal comparison means to either a positive or negative polarity corresponding to the polarity signal and outputs it to the converter.
  • the change in polarity of the gate signal output from the said gate signal polarity switching circuit is thus synchronized with the change in polarity of the difference signal.
  • the polarity discriminator recognizes this fact, and outputs, a signal of positive polarity to the carrier signal polarity switching circuit.
  • the single polarity carrier signal generated at the carrier signal generating circuit is switched, for example, to positive polarity, depending on the presence of this positive polarity signal, and inputs it to the second signal comparison means.
  • the polarity discrim ⁇ inator outputs, for example, a signal of negative polarity, and the carrier signal is switched to the negative polarity at the carrier signal polarity switching circuit and is input to the second signal comparison means.
  • the second signal comparison means when the carrier signal has a positive polarity, a gate signal of positive polarity is formed, and when the carrier signal has a negative polarity, a gate signal of negative polarity is formed; these signals will be output to the converter.
  • the change in polarity of the gate signal synchronizes with the change in polar- ity of the difference signal, and even if the signal level of the latter nears zero asymptotically, as long as the polarities are identical, the polarity of the former will not change.
  • the difference signal converted to the absolute value signal at the absolute value conversion circuit and the carrier signal of single polarity, for example, positive polarity, are input to the second signal comparison means to form a gate signal of positive polarity having a time width corresponding to the difference in level of both signals.
  • the polarity discriminator either a positive or negative polarity of the difference signal is recognized, for example, and a signal of positive polarity or of negative polarity is output to the gate signal polarity switching circuit.
  • the gate signal polarity switching circuit when the positive polarity-signal is input, for example, the gate signal output from the second signal comparison means is output as is to the converter.
  • the negative polarity signal is input, the polarity of the said gate signal is switched and output.
  • the change in polarity of the gate signal output from the gate signal polarity switching circuit synchronizes with the change in polarity of the difference signal.
  • the signal level of the latter nears zero asymp ⁇ totically, as long as the polarities are identical, the polarity of the former will not change.
  • this invention is an improvement in the current-controlling circuit by the conventional carrier comparison system.
  • the components identical to those in the conven ⁇ tional system are coded similarly and an explanation of their functioning is omitted.
  • Fig. 1 is a block diagram of the current-controlling circuit for the converter of the first application example of this invention, In the figure, (1) indicates the carrier generating circuit, (2) indicates the polarity discriminator, and (3) indicates the carrier signal polarity switching circuit.
  • the current command signal (i*) transmitted from the external control circuit (not illustrated in the figure) and the current detection signal (i) fed back from the load side are input to the positive input and the negative input, respectively, of the adder (10) which is the first signal comparison means to obtain the difference signal, and that this difference signal is first amplified at the proportional amplifier (or proportional integral amplifier) (11) , and then input to the positive input of the second adder (13) , which has the constitution of the second signal comparison means.
  • the characteristic points of this application example lie in that besides the carrier signal of predetermined pulse height and of single polarity generated from the carrier signal generating circuit (1) , the polarity discriminator (2) which distinguishes the polarity of the difference signal and outputs a polarity signal depending on whether it is the positive or negative, and the carrier signal polarity switching circuit (3) which switches the single polarity carrier signal to either a positive or negative polarity corresponding to the said polarity signal and inputs it to the negative input of the second adder (13) are provided.
  • a triangular waveform or a sawtooth waveform of positive polarity which repeats a level change between zero and a predetermined pulse height is generated.
  • the predetermined pulse height here is the signal level in which the peak value is a little larger than the maximum value of the difference signal amplified by the proportional amplifier (11) .
  • the polarity discriminator (2) is a type of compar ⁇ ison circuit, and outputs a signal of positive polarity or negative polarity selectively to the carrier signal polarity switching circuit (3) when the polarity of the difference signal is positive or negative, respectively.
  • the carrier signal polarity switching circuit (3) has a carrier signal bypass circuit (3-(X)) which outputs a positive polarity carrier signal input from the carrier signal generating circuit (1) as is, and the carrier signal reversing circuit (3 2 (-X)) which inverts the polarity of the input carrier signal and outputs it.
  • the first switch (3-..) is inserted; it conducts only when the polarity signal input from the polarity discriminator (2) is, for example, a signal of positive polarity.
  • the second switch is inserted (3 21 ) ; it conducts only when the polarity signal is negative.
  • the polarity discriminator (2) outputs a signal of positive polarity to the carrier signal polarity switching circuit (3) , closing the first switch (3.,) , and inputting the positive polarity carrier signal to the negative input of the second adder (13) .
  • this carrier signal and the difference signal are added, and output to the comparator (14) which is another component of the second signal comparison means.
  • the comparator (14) as illustrated in the lower left side of the operational figure of Fig.
  • the positive polarity gate signal which is rising only while the difference signal is larger than the carrier signal, is formed and output to the converter.
  • the polarity discriminator (2) outputs a signal of negative polarity to the carrier signal polarity switching circuit (3) , closing the second switch (3 2 ) , and inputting the negative polarity carrier signal to the negative input of the second adder (13) .
  • this carrier signal, and the difference signal are added and output to the comparator (14) .
  • the comparator (14) as illustrated in the lower right side of the operational figure of Fig. 2, the negative polarity gate signal, which is rising only while the difference signal is smaller than the carrier signal, is formed and output to the converter.
  • the change in polarity of the gate signal output from the comparator (14) synchronizes with the change in polarity of the difference signal.
  • the desired current follow- up gain can be obtained by adjusting the degree of amplification of the proportional amplifier (11) and the level of the carrier signal together.
  • the hysteresis comparator system current-controlling circuit which generates current ripple does not have to be used, and current control with superior switching properties will be possible.
  • Fig. 3 is a block diagram of the current-controlling circuit of the second application example of this invention. This application example represents a partial change from the constitution of the first application example. Thus, the identical components are coded similarly for the explanation.
  • (1) and (2) are the carrier signal generating circuit and the polarity discriminator identical to the first application example.
  • (4) is the absolute value converter, and (5) is the gate signal polarity switching circuit.
  • the difference signal amplified by the proportional amplifier (11) is first converted to an absolute value signal at the absolute value converter (4) , and then input to the positive input of the second adder (13) .
  • the positive polarity carrier signal is input from the carrier signal generat- ing circuit (1) . This signal is added with the absolute value signal of the difference signal and is output to the comparator (14) .
  • the positive polarity gate signal which is rising only when the absolute value signal is larger than the carrier signal, is formed is output to the gate signal polarity switching circuit (5) .
  • the gate signal polarity switching circuit (5) has the bypass circuit (5.,) which outputs the positive polarity gate signal output from the comparator (14) as is, and the NOT gate (5 2 ) which inverts the polarity of this gate signal and outputs it.
  • the third switch (5--) which will conduct only when the polarity signal input from the polarity discriminator (2) is, for example, a positive polarity signal, is inserted.
  • the fourth switch (5 21 ) which will conduct only when the polarity signal is, for example, a negative polarity signal, is inserted.
  • the polarity discriminator (2) when the polarity of the difference signal is positive, the polarity discriminator (2) outputs a signal of positive polarity to the gate signal polarity switching circuit (5) to close the third switch (5--) , and the positive polarity gate signal is output to the converter as is. Meanwhile, when the polarity of the difference signal is negative, the fourth switch (5 21 ) will conduct via the negative polarity signal output from the polarity discriminator (2) , and the polarity of the gate signal is inverted and output to the converter.
  • the change in polarity of the gate signal output from the output signal polarity switching circuit (5) synchronizes with the change in polarity of the difference signal, and similar results as in the first application example can be achieved.
  • an explanation was made for the case in which the absolute value signal converted at the absolute value converter (4) and the positive polarity carrier signal are matched at the second signal comparison means to form the positive polarity gate signal, and this gate signal is switched over correspond ⁇ ing to the polarity of the difference signal at the gate signal polarity switching circuit (5) .
  • a similar result to this application example can be obtained as long as the constitution is such that the single polarity gate signal is switched over corre ⁇ sponding to the polarity of the difference signal.
  • the polarity setting of each signal is not necessarily limited to that of this application example.
  • the carrier signal has a single polarity
  • the gate signal obtained by the comparison of this carrier signal and the difference signal will have a single polarity.
  • the change in polarity of this gate signal synchronizes with the change in polarity of the difference signal.
  • the gate signal will not repeat alternating the positive polarity (ON) and the negative polarity (OFF) even when the difference signal nears zero asymptotically, which was the case in the current-controlling circuit by the conventional carrier comparison system. Therefore, regardless of the driving mode, or the regenerative mode, stable current control of the converter unit of the main circuit will be possible.
  • the signal level of the carrier signal and the difference signal can be amplified together as desired, as compared to the case in which the conven- tional carrier signal of positive and negative symmetry is used, the current follow-up gain can be increased.
  • the desired current follow-up gain can be obtained without using the hysteresis comparator system, stable current control is possible where the consideration of neither the current ripple nor the decrease in the switching property is necessary.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Power Conversion In General (AREA)
  • Inverter Devices (AREA)

Abstract

A carrier signal has a single polarity. Moreover, the polarity discriminator (2) which distinguishes the polarity of the difference signal output from the first signal comparison means and outputs a signal of a certain polarity depending on whether the polarity is classified positive of negative, and the carrier signal polarity switching circuit (3) which switches the carrier signal to either positive or negative polarity corresponding to the polarity signal and inputs it to the second signal comparison means are provided. The change in polarity of the gate signal output from the second signal comparison means will thus be synchronized with the change in polarity of the difference signal.

Description

CURRENT CONTROL CIRCUIT FOR CONVERTER
TECHNICAL FIELD
This invention relates to a current-controlling circuit for controlling the current flowing in the converter of an inverter device.
BACKGROUND ART
Fig. 4 illustrates the main circuit configuration of a common inverter device. Referring to this figure, the main circuit of the inverter device is equipped with a converter (A) having multiple control elements (gate elements) , a smoothing circuit (B) , and an inverter (C) . By performing the current control or the voltage control function of the converter (A) and inverter (C) in the control circuit (omitted in the figure) , the three-phase input voltage (R) , (S) , and (T) input via the coil (ACL) is first converted to direct current, and then converted to a three-phase output voltage of predetermined frequency (U) , (V) , and (W) for output. This invention is applied to the control system for the current flowing in the converter (A) . Conventionally, the carrier comparison system and the hysteresis comparator system have been known as the systems which perform current control of converters.
Fig. 5 illustrates the constitution of the current- controlling circuit of the carrier comparison system. Referring to this figure, the current command signal
(i*) transmitted from the external control circuit (not illustrated in the figure) , and the current detection signal (i) fed back from the load side are input into the positive input and the negative input of the first adder (10) which is the first signal comparisonmeans to obtain the difference signal. This difference signal is first amplified by the proportional amplifier (or proportional integral amplifier) (11) , and then is input to the second signal comparison means. The second signal comparison means consists, for example, of the second adder (13) and the comparator (14) . The amplified difference signal is input into the positive input of this second adder (13) . To the negative input, a carrier signal, a waveform having positive and negative symmetry of a predetermined pulse height, is input from the carrier signal generator (12) . The second adder (13) outputs a signal of negative polarity when the difference signal is larger than this carrier signal, and when it is smaller, it outputs a signal of positive polarity. This signal is input to the comparator (14) , and here, a gate signal whose time width and a change in polarity dependent on the level difference between the input signals is formed. This gate signal is output to the control element of the converter, and by this means, the current flowing in the converter is controlled.
Fig. 6 illustrates the constitution of the current- controlling circuit by hysteresis comparator system. It is the same as the aforementioned carrier comparison system in that the current command signal (i*) to the positive input and the current detection signal (i) negatively fed back are compared at the first adder (10) to obtain the difference signal. It is different in that this standard signal is directly input to the hysteresis comparator (16) exhibiting hysteresis characteristics to obtain the gate signal. In this system, there is the effect that a current waveform with a maximum phase difference can be follow-up controlled in a minimum amount of time.
However, in the conventional carrier comparison system, because the carrier signal is a positively and negatively symmetrical waveform, if the output of the proportional amplifier (11) , i.e. , the amplified difference signal, nears the zero value at a duty cycle of approximately 50%, the gate signal with alternating positive polarity (ON) and negative polarity (OFF) will be output. In this case, if the converter does not have a voltage source on the input side (i.e. , a three-phase input voltage) , even if it is controlled by this type of gate signal, the mean value of the output voltage and the current will near the zero value, and no specific problem will occur. However, the converter (A) in the main circuit configuration of Fig. 4 where this invention is applied has a three-phase input voltage (R) , (S) , and (T) . Moreover, the value of this voltage (R) , (S) , and (T) continuously varies with a constant phase difference, thus, the mean value of the voltage and the current will never be zero. Thus, because the input current flows into the converter (A) at a duty cycle of approximately 50%, current control in the driving mode will be difficult. Especially, in the regenerative mode, there is the problem that the current control itself of the converter (A) is incapacitated.
In the hysteresis comparator system, there is the disadvantage that the ripple current increases as current with a maximum phase difference is follow-up controlled in minimum amount of time. To suppress this effect, it is necessary to increase the gate signal frequency. However, there is the problem that if the gate signal frequency is increased too high, the switching frequency will vary at random and cannot be specified; thus, the switching property will be extremely unstable.
The purpose is to offer a current-controlling circuit which enables stable current control of the converter even when the difference signal of the current command signal (i*) and the current detection signal (i) nears zero asymp¬ totically.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a block diagram of the current-controlling circuit for a converter of the first application example of this invention. Fig. 2 is an explanatory figure illustrating the process of generating a gate signal of the first application example of this invention.
Fig. 3 is a block diagram of current-controlling circuit for a converter of the second application example of this invention.
Fig. 4 is a schematic diagram of main circuit of inverter device to which this invention is applied.
Fig. 5 is a block diagram of current-controlling circuit for the conventional carrier comparison system.
Fig. 6 is a block diagram of current-controlling circuit by conventional hysteresis comparator system.
DISCLOSURE OF THE INVENTION
An object of this invention is to achieve a carrier signal having a single polarity. Moreover, the polarity discriminator which distinguishes the polarity of the difference signal output from the first signal comparison means and outputs a signal of a certain polarity depend¬ ing on whether the polarity is classified positive or negative, and the carrier signal polarity switching circuit which switches the carrier signal to either a positive or negative polarity corresponding to the polarity signal and inputs it to the second signal comparison means are provided. The change in polarity of the gate signal output from the second signal comparison means will thus be synchronized with the change in polarity of the difference signal.
In order to achieve the purpose, besides making the carrier signal of single polarity and inputting it to the second signal comparison means, an absolute value conver¬ sion circuit which inputs the difference signal and inputs its absolute value to the second signal comparison means, the polarity discriminator which distinguishes the polarity of the said difference signal and outputs a polarity signal depending on whether it is positive or negative, and the gate signal polarity switching circuit which switches the gate signal output from the second signal comparison means to either a positive or negative polarity corresponding to the polarity signal and outputs it to the converter, are provided. The change in polarity of the gate signal output from the said gate signal polarity switching circuit is thus synchronized with the change in polarity of the difference signal.
For example, when the difference signal has a positive polarity, the polarity discriminator recognizes this fact, and outputs, a signal of positive polarity to the carrier signal polarity switching circuit. At the carrier signal polarity switching circuit, the single polarity carrier signal generated at the carrier signal generating circuit is switched, for example, to positive polarity, depending on the presence of this positive polarity signal, and inputs it to the second signal comparison means. On the other hand, if the difference signal has a negative polarity, the polarity discrim¬ inator outputs, for example, a signal of negative polarity, and the carrier signal is switched to the negative polarity at the carrier signal polarity switching circuit and is input to the second signal comparison means. At the second signal comparison means, when the carrier signal has a positive polarity, a gate signal of positive polarity is formed, and when the carrier signal has a negative polarity, a gate signal of negative polarity is formed; these signals will be output to the converter. By this means, the change in polarity of the gate signal synchronizes with the change in polar- ity of the difference signal, and even if the signal level of the latter nears zero asymptotically, as long as the polarities are identical, the polarity of the former will not change.
The difference signal converted to the absolute value signal at the absolute value conversion circuit and the carrier signal of single polarity, for example, positive polarity, are input to the second signal comparison means to form a gate signal of positive polarity having a time width corresponding to the difference in level of both signals. Meanwhile, at the polarity discriminator, either a positive or negative polarity of the difference signal is recognized, for example, and a signal of positive polarity or of negative polarity is output to the gate signal polarity switching circuit. At the gate signal polarity switching circuit, when the positive polarity-signal is input, for example, the gate signal output from the second signal comparison means is output as is to the converter. When the negative polarity signal is input, the polarity of the said gate signal is switched and output. By this means, the change in polarity of the gate signal output from the gate signal polarity switching circuit synchronizes with the change in polarity of the difference signal. Thus, even if the signal level of the latter nears zero asymp¬ totically, as long as the polarities are identical, the polarity of the former will not change.
BEST MODE FOR CARRYING OUT THE INVENTION
The application examples of this invention will be explained with reference to Figs. 1-3 as follows: this invention is an improvement in the current-controlling circuit by the conventional carrier comparison system. Thus, the components identical to those in the conven¬ tional system are coded similarly and an explanation of their functioning is omitted.
Fig. 1 is a block diagram of the current-controlling circuit for the converter of the first application example of this invention, In the figure, (1) indicates the carrier generating circuit, (2) indicates the polarity discriminator, and (3) indicates the carrier signal polarity switching circuit.
It is the same as the conventional system in that the current command signal (i*) transmitted from the external control circuit (not illustrated in the figure) and the current detection signal (i) fed back from the load side are input to the positive input and the negative input, respectively, of the adder (10) which is the first signal comparison means to obtain the difference signal, and that this difference signal is first amplified at the proportional amplifier (or proportional integral amplifier) (11) , and then input to the positive input of the second adder (13) , which has the constitution of the second signal comparison means. The characteristic points of this application example lie in that besides the carrier signal of predetermined pulse height and of single polarity generated from the carrier signal generating circuit (1) , the polarity discriminator (2) which distinguishes the polarity of the difference signal and outputs a polarity signal depending on whether it is the positive or negative, and the carrier signal polarity switching circuit (3) which switches the single polarity carrier signal to either a positive or negative polarity corresponding to the said polarity signal and inputs it to the negative input of the second adder (13) are provided.
More concretely at the carrier signal generating circuit, a triangular waveform or a sawtooth waveform of positive polarity which repeats a level change between zero and a predetermined pulse height is generated. The predetermined pulse height here is the signal level in which the peak value is a little larger than the maximum value of the difference signal amplified by the proportional amplifier (11) .
The polarity discriminator (2) is a type of compar¬ ison circuit, and outputs a signal of positive polarity or negative polarity selectively to the carrier signal polarity switching circuit (3) when the polarity of the difference signal is positive or negative, respectively. The carrier signal polarity switching circuit (3) has a carrier signal bypass circuit (3-(X)) which outputs a positive polarity carrier signal input from the carrier signal generating circuit (1) as is, and the carrier signal reversing circuit (32(-X)) which inverts the polarity of the input carrier signal and outputs it. Between the output side of the carrier signal bypass circuit (3*,(X)) and the second adder (13), the first switch (3-..) is inserted; it conducts only when the polarity signal input from the polarity discriminator (2) is, for example, a signal of positive polarity. Between the carrier signal reversing circuit (32) and the second adder (13) , the second switch is inserted (321) ; it conducts only when the polarity signal is negative.
To explain the operation of the current-controlling circuit of the constitution; next, when the polarity of the difference signal amplified by the proportional amplifier (11) is positive, the polarity discriminator (2) outputs a signal of positive polarity to the carrier signal polarity switching circuit (3) , closing the first switch (3.,) , and inputting the positive polarity carrier signal to the negative input of the second adder (13) . At the second adder (13) , this carrier signal and the difference signal are added, and output to the comparator (14) which is another component of the second signal comparison means. At the comparator (14) , as illustrated in the lower left side of the operational figure of Fig. 2, the positive polarity gate signal, which is rising only while the difference signal is larger than the carrier signal, is formed and output to the converter. Meanwhile, when the polarity of the difference signal becomes negative, the polarity discriminator (2) outputs a signal of negative polarity to the carrier signal polarity switching circuit (3) , closing the second switch (32) , and inputting the negative polarity carrier signal to the negative input of the second adder (13) . At the second adder (13) , this carrier signal, and the difference signal are added and output to the comparator (14) . At the comparator (14) , as illustrated in the lower right side of the operational figure of Fig. 2, the negative polarity gate signal, which is rising only while the difference signal is smaller than the carrier signal, is formed and output to the converter. By this means, the change in polarity of the gate signal output from the comparator (14) synchronizes with the change in polarity of the difference signal. Thus, even if the signal level of the latter nears zero asymp¬ totically, as long as the polarity does not change, the polarity of the former will not change.
Therefore, in this application example, the current introduction caused by the polarity of the gate signal being alternately output to the converter can be prevented. Stable current control not only in the driving mode but also in the regenerative mode will be possible.
Also, in this application example, because the carrier signal and the difference signal are matched with those of identical polarity, the desired current follow- up gain can be obtained by adjusting the degree of amplification of the proportional amplifier (11) and the level of the carrier signal together. Thus, even when current control in a short period of time is required, the hysteresis comparator system current-controlling circuit which generates current ripple does not have to be used, and current control with superior switching properties will be possible.
In this application example, the explanation was made assuming that the carrier signal is of positive polarity. However, the similar effect to this applica¬ tion example can be obtained as long as it is the constitution in which a single polarity carrier signal is switched corresponding to the polarity of the difference signal and is input to the second adder (13) . Thus, the polarity setting of each signal is not necessarily limited to those of this application example. Fig. 3 is a block diagram of the current-controlling circuit of the second application example of this invention. This application example represents a partial change from the constitution of the first application example. Thus, the identical components are coded similarly for the explanation.
In the figure, (1) and (2) are the carrier signal generating circuit and the polarity discriminator identical to the first application example. (4) is the absolute value converter, and (5) is the gate signal polarity switching circuit.
Referring to Fig. 3, in the current-controlling circuit of this application example, the difference signal amplified by the proportional amplifier (11) is first converted to an absolute value signal at the absolute value converter (4) , and then input to the positive input of the second adder (13) . To the negative input of the second adder (13) , the positive polarity carrier signal is input from the carrier signal generat- ing circuit (1) . This signal is added with the absolute value signal of the difference signal and is output to the comparator (14) . At the comparator (14) , the positive polarity gate signal, which is rising only when the absolute value signal is larger than the carrier signal, is formed is output to the gate signal polarity switching circuit (5) .
The gate signal polarity switching circuit (5) has the bypass circuit (5.,) which outputs the positive polarity gate signal output from the comparator (14) as is, and the NOT gate (52) which inverts the polarity of this gate signal and outputs it. To the output side of the bypass circuit (5.) , the third switch (5--) which will conduct only when the polarity signal input from the polarity discriminator (2) is, for example, a positive polarity signal, is inserted. To the output side of the NOT gate (52) , the fourth switch (521) which will conduct only when the polarity signal is, for example, a negative polarity signal, is inserted.
Next, to explain the operation of the current- controlling circuit with the constitution, when the polarity of the difference signal is positive, the polarity discriminator (2) outputs a signal of positive polarity to the gate signal polarity switching circuit (5) to close the third switch (5--) , and the positive polarity gate signal is output to the converter as is. Meanwhile, when the polarity of the difference signal is negative, the fourth switch (521) will conduct via the negative polarity signal output from the polarity discriminator (2) , and the polarity of the gate signal is inverted and output to the converter. By this means, the change in polarity of the gate signal output from the output signal polarity switching circuit (5) synchronizes with the change in polarity of the difference signal, and similar results as in the first application example can be achieved. In this application example, an explanation was made for the case in which the absolute value signal converted at the absolute value converter (4) and the positive polarity carrier signal are matched at the second signal comparison means to form the positive polarity gate signal, and this gate signal is switched over correspond¬ ing to the polarity of the difference signal at the gate signal polarity switching circuit (5) . However, a similar result to this application example can be obtained as long as the constitution is such that the single polarity gate signal is switched over corre¬ sponding to the polarity of the difference signal. Thus, the polarity setting of each signal is not necessarily limited to that of this application example.
As can be clearly seen from the explanation above, in the current-controlling circuit of the converter of this invention, the carrier signal has a single polarity, and the gate signal obtained by the comparison of this carrier signal and the difference signal will have a single polarity. Moreover, the change in polarity of this gate signal synchronizes with the change in polarity of the difference signal. Thus, the gate signal will not repeat alternating the positive polarity (ON) and the negative polarity (OFF) even when the difference signal nears zero asymptotically, which was the case in the current-controlling circuit by the conventional carrier comparison system. Therefore, regardless of the driving mode, or the regenerative mode, stable current control of the converter unit of the main circuit will be possible.
Also, because the signal level of the carrier signal and the difference signal can be amplified together as desired, as compared to the case in which the conven- tional carrier signal of positive and negative symmetry is used, the current follow-up gain can be increased. Moreover, because the desired current follow-up gain can be obtained without using the hysteresis comparator system, stable current control is possible where the consideration of neither the current ripple nor the decrease in the switching property is necessary.
It shouid be understood by those skilled in the art that various changes, omissions, and additions may be made herein without departing from the spirit and scope of the invention.

Claims

1. A type of current control circuit of a converter, comprising: a first signal comparison means which compares a current command signal i* and a current detection signal i and outputs an error signal of either a positive or negative polarity; a carrier generation circuit which can generate a carrier signal with a prescribed magnitude; a second signal comparison means which compares said error signal and said carrier signal and outputs a gate signal with a time width corresponding to the difference in the level between said error and carrier; the gate signal is then used for controlling the control element of the converter; a polarity determining circuit which makes the carrier signal generated by the carrier signal generator circuit unipolar and determines the polarity of said error signal and outputs said polarity signal with polarity corresponding to the polarity, positive or negative, of said error signal, and a carrier signal polarity switching circuit which switches the polarity of said carrier signal to either positive or negative, corresponding to said polarity signal, and sends said carrier signal to the input side of said second signal comparison means such that the change in the polarity of the gate signal is made to synchronize with the change in the polarity of the error signal.
2. The current control circuit of a converter as claimed in claim 1, comprising: an absolute value conversion circuit which takes the carrier signal generated at said carrier signal as a unipolar signal and sends it to the input side of said second signal comparison means, and which has the absolute value signal of said error signal input to it sent to the other input side of said second signal comparison means; a polarity determining circuit which determines said error signal's polarity and outputs a polarity signal depending on whether the polarity is positive or negative; and a gate signal polarity switching circuit which switches the gate signal output from the second signal comparison means to a polarity corresponding to the polarity signal and outputs it to the converter, with the variation in the polarity for the gate signal being synchronized with the variation in the polarity of said error signal.
PCT/US1992/010045 1991-11-22 1992-11-23 Current control circuit for converter WO1993010595A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9564291U JPH0548590U (en) 1991-11-22 1991-11-22 Converter current control circuit
JP3/95642 1991-11-22

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Publication Number Publication Date
WO1993010595A1 true WO1993010595A1 (en) 1993-05-27

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2054285A (en) * 1979-06-25 1981-02-11 Asea Ab Electrical converter equipment
US4603425A (en) * 1984-08-31 1986-07-29 Raytheon Company Interpolation pulse duration modulation circuit
US4730242A (en) * 1986-09-25 1988-03-08 Wisconsin Alumni Research Foundation Static power conversion and apparatus having essentially zero switching losses
US4779183A (en) * 1986-07-25 1988-10-18 Hitachi, Ltd. Method and apparatus for selectively controlling an operation mode of a PWM inverter between an asychronous mode and a synchronous mode modulation
DE4001260A1 (en) * 1989-03-29 1990-10-04 Gen Electric Circuit breaker driver circuit
EP0420628A2 (en) * 1989-09-29 1991-04-03 Wisconsin Alumni Research Foundation AC to DC to AC power conversion apparatus with few active switches and input and output control

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2054285A (en) * 1979-06-25 1981-02-11 Asea Ab Electrical converter equipment
US4603425A (en) * 1984-08-31 1986-07-29 Raytheon Company Interpolation pulse duration modulation circuit
US4779183A (en) * 1986-07-25 1988-10-18 Hitachi, Ltd. Method and apparatus for selectively controlling an operation mode of a PWM inverter between an asychronous mode and a synchronous mode modulation
US4730242A (en) * 1986-09-25 1988-03-08 Wisconsin Alumni Research Foundation Static power conversion and apparatus having essentially zero switching losses
DE4001260A1 (en) * 1989-03-29 1990-10-04 Gen Electric Circuit breaker driver circuit
EP0420628A2 (en) * 1989-09-29 1991-04-03 Wisconsin Alumni Research Foundation AC to DC to AC power conversion apparatus with few active switches and input and output control

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