WO1993005208A1 - Enhanced heteroepitaxy - Google Patents

Enhanced heteroepitaxy Download PDF

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Publication number
WO1993005208A1
WO1993005208A1 PCT/US1992/007618 US9207618W WO9305208A1 WO 1993005208 A1 WO1993005208 A1 WO 1993005208A1 US 9207618 W US9207618 W US 9207618W WO 9305208 A1 WO9305208 A1 WO 9305208A1
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Prior art keywords
substrate
substance
product
iii
epitaxial
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PCT/US1992/007618
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French (fr)
Inventor
Henry I. Smith
Khalid E. Ismail
Nasser Karam
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Massachusetts Institute Of Technology
Spire Corporation
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Publication of WO1993005208A1 publication Critical patent/WO1993005208A1/en

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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/42Gallium arsenide

Definitions

  • III-V materials are crystalline semiconductors formed from elements of columns III and V of the periodic-table.
  • III-V materials of interest include binary compounds, e.g., GaAs, AlAs, and InSb, which have the "zinc blend" crystalline structure, as well as a wide range of III-V ternary and quaternary alloys, e.g. , AlGaAs and GalnAsP.
  • the present invention features a method for the epitaxial deposition of a substance, preferably a III-V material, e.g., GaAs, Ge, or an alloy of Si and Ge, onto a substrate, preferably a single crystal substrate, e.g., a Si crystal.
  • a substance preferably a III-V material, e.g., GaAs, Ge, or an alloy of Si and Ge
  • the method includes: providing a sawtooth-profile relief structure, preferably with a repeat distance of less than 500 nm, on a surface of the substrate; and depositing the substance onto the sawtooth-profile relief structure.
  • the substance and the substrate are crystallographically unmatched.
  • the dislocation density in the deposited epitaxial layer of the substance is lower than the dislocation density of an epitaxial layer of the substance deposited on a substrate that is substantially similar to the substrate except that its surface is planar.
  • the method includes: creating a grating of an etch resistant substance on the surface, the period of the grating lines being equal to the period of the sawtooth-profile relief structure, the grating lines being aligned with the lines formed by the intersection of the surface planes forming the teeth of the sawtooth structure; exposing the substrate to an etching agent, the exposure being sufficient to form sharply pointed sawteeth; and removing said grating to expose said sawteeth.
  • the surface planes of the sawteeth are coplanar with (111) planes of the substrate.
  • depositing the substance includes: growing a film of the substance on the sawtooth structure and heating the film sufficiently to reduce the density of faults in the crystal structure of the film.
  • the surface of the substrate is cut on a ⁇ 100 ⁇ plane or is cut off a ⁇ 100 ⁇ plane, e.g., approximately 2, or approximately 4, degrees off a ⁇ 100 ⁇ plane.
  • the invention features epitaxial composites made by the above described methods.
  • the substance and the substrate are crystallographically unmatched; and a layer of a III-V material, e.g., GaAs, is epitaxially deposited onto a Si single crystal.
  • a III-V material e.g., GaAs
  • the invention features an epitaxial composite including a substrate, the surface of the substrate including a sawtooth relief structure, and an epitaxially deposited layer of a III-V material on top of the sawtooth relief.
  • the substance and the substrate are crystallographically unmatched, the substrate is single crystal Si; the deposited layer is GaAs; and the III-V material layer has a dislocation density which is lower than the dislocation density of a layer of similar III-V material deposited on a surface substrate similar to the substrate except that it is planar.
  • a relief structure is created on the surface of a substrate.
  • a film of GaAs, another III-V material (or alloy thereof) , or a material having the so-called diamond structure is grown on top of the substrate, by any of several processes, e.g., metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) .
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • the invention provides a substrate e.g., a Si substrate, with a surface configuration which minimizes the dislocation density in a single-crystal film of a crystallographically unmatched material, e.g., a III-V material, grown on the substrate.
  • a substrate e.g., a Si substrate
  • a crystallographically unmatched material e.g., a III-V material
  • Single crystal Si substrates upon which III-V materials are grown can serve as the substrate for conventional electronic circuits, such as are commonly made in the integrated circuits industry.
  • the III-V materials can serve as the base for fabricating optoelectronic devices such as lasers.
  • the invention allows electronic and optoelectronic devices to be integrated on the same substrate.
  • FIG. 1A is a fragmentary cross-sectional view of an epitaxy substrate suitable for receiving a sawtooth relief structure.
  • FIG. IB is a fragmentary cross-sectional view of an epitaxy substrate with a grating in the photoresist layer.
  • FIG. 1C is a fragmentary cross-sectional view of an epitaxy substrate showing shadowing angles.
  • FIG. ID is a fragmentary cross-sectional view of an epitaxy substrate after etching of the anti-reflective coating.
  • FIG. IE is a fragmentary cross-sectional view of an epitaxy substrate after etching of the Si 3 N 4 layer.
  • FIG. IF is a fragmentary cross-sectional view of an epitaxy substrate after removal of the anti-reflective coating.
  • FIG. 1G is a fragmentary cross-sectional view of an epitaxy substrate after etching of the wafer substrate.
  • FIG. 1H is a fragmentary cross-sectional view of an epitaxy substrate with a sawtooth relief structure.
  • FIG. II is a fragmentary cross-sectional view of an epitaxy substrate with incompletely etched sawteeth.
  • FIG. 1J is a fragmentary cross-sectional view of an epitaxy substrate with incompletely etched sawteeth.
  • a sawtooth- profile relief structure of deep-submicron periodicity is etched anisotropically into a Si substrate such that the facets of the sawtooth are substantially (111) planes.
  • GaAs or another III-V material is grown by MBE, MOCVD or other means and annealed at moderate temperatures. Thereafter, the dislocation density in the resulting III-V single-crystal film is substantially reduced over the density present in films grown on planar surfaces of Si.
  • FIG. 1A shows a fragmentary cross-sectional view of epitaxy substrate 10 including Si wafer substrate 20, silicon nitride (Si 3 N 4 ) layer 30, anti-reflection coating 40, and photoresist layer 50.
  • Epitaxy substrate 10 was produced by depositing, by methods known to those skilled in the art, Si 3 N 4 to a thickness of about 30 nm on both sides (only the front side is shown in FIG. 1) of Si wafer substrate 20.
  • Anti-reflection coating 40 which includes a polyimide heavily loaded with a dye active in the near ultraviolet, was then deposited on the Si 3 N 4 layer 30 by conventional spinning methods.
  • a suitable anti-reflective coating can be produced with ARC-XL, available from Brewer Scientific.
  • the photoresist layer 50 was then deposited on the anti-reflective layer 40 by conventional spinning methods known to those skilled in the art.
  • a suitable photoresist layer can be produced with products such as Microposit S1805, available from Shipley Corp.
  • the photoresist layer 50 was then exposed using holographic lithography (see, for example, Ph.D. Thesis, MIT, May 1988 by E.H. Anderson, entitled “Fabrication and Electromagnetic Applications of Periodic Nanostructures” hereby incorporated by reference) , and developed to produce a 200 nm-period grating 60 in the photoresist, as shown in FIG. IB.
  • the photoresist was then "shadowed". Shadowing is accomplished by evaporating a material such as MgF 2 or Si0 2 at two oblique angles ( ⁇ 40°), as depicted in FIG. lC.
  • the arrows in FIG. 1C represent the approximate angles of shadowing.
  • the epitaxy substrate 10 was then placed in a reactive-ion-etching system filled with oxygen gas, and the polymeric material (anti- reflective coating 40) was etched in a vertical manner, as depicted in FIG. ID.
  • the gas in the reactive-ion- etching chamber was then changed to CHF 3 , and the thin Si 3 N layer 30 etched, as depicted in Fig. IE.
  • the polymeric material (anti-reflective coating 40) was removed to yield a 200-nm period grating of Si 3 N 4 stripes 70 on top of the Si wafer substrate 20, as shown in FIG. IF.
  • the Si wafer substrate 20 was then etched in KOH. KOH etches Si rapidly in [100] and [110] directions, but very slowly in [111] directions. The result is the sawtooth-profile grating, 80, depicted in FIG. 1G.
  • the Si 3 N 4 stripes 70 protect the Si of Si wafer substrate 20 from the KOH etchant and hence, whether a perfect sawtooth, as depicted in FIG. 1H, or a sawtooth with flat tops, as depicted in FIG. II and FIG. 1J, is achieved depends on how well the Si and the Si 3 N 4 stripes are oriented relative to the crystallographic axes (precise alignment being desired) , and on how carefully the KOH etching is monitored and controlled.
  • the Si 3 N 4 stripes are precisely aligned with the line at which (111) planes intersect to form a sawtooth, the Si wafer substrate 20 is extracted from the KOH etchant at exactly the point where the two (111) planes intersect and the Si 3 N 4 stripe is fully "undercut".
  • the residual Si 3 N 4 can be removed, either in concentrated HF or hot phosphoric acid, by methods known to those skilled in the art.
  • the samples were cleaned by degreasing in a sequence of boiling solvents (trichloroethane, acetone, and methanol) , immersed in a mixture of NH OH:H 2 0 2 :H 2 0, and dipped in 10% HF.
  • boiling solvents trichloroethane, acetone, and methanol
  • This invention takes advantage of some information that other researchers have gained in growing GaAs on Si. For example, it has been shown that growing GaAs on Si whose surface is oriented 2-4 degrees off of the precise (100) plane minimizes a type of defect known as anti ⁇ phase domains (see S.F. Fang, et al., Journal of Applied Physics, vol. 68, p. R33 (1990) , hereby incorporated by reference) . As such, although not central or intrinsic to, or required by, the invention, it is preferable to use a silicon wafer whose surface is oriented 2 degrees off the precise (100) plane.
  • GaAs can be carried out by methods known to those skilled in the art, e.g., by MOCVD or MBE.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • MBE Metal Organic Chemical Vapor Deposition
  • the sample was outgassed at 300°C in the preparation chamber for 30 minutes, introduced into the growth chamber, and heated to 900°C for 5 minutes. The temperature was then reduced to 350°C and growth started with an As/Ga flux ratio of 25:1 and a growth rate of 0.2 ⁇ m/h.
  • the diffraction pattern produced by reflecting a high energy electron beam off the surface indicated that the initial layer of GaAs was amorphous.
  • the growth initiates in the grooves at a faster rate than on flat portions of the substrate.
  • the growth was stopped and the sample heated to 640°C under As overpressure. At about 600°C, the 2x4 surface reconstruction started to become observable, indicating crystallation of the initial amorphous layer.
  • MOCVD-experiments the sample, typically after a short high tempertive bake out at approximately 1000°C, was heated to between approximately 390-450°C, typically to approximately 430° C, and an initial layer deposited. As in MBE, the growth was mainly confined to the groove areas, and the initial layer is amorphous. This amorphous layer is not typical of MOCVD growth of GaAs on flat Si substrates.
  • the atypical growth may be due to a few-monolayer-thick amorphous silicon oxide at the Si/GaAs interface which was observed by transmission electron microscopy.
  • This oxide layer which most likely results from the method of cleaning and sample preparation, is always removed by in-situ cleaning in conventional growth methods.
  • In-situ cleaning at high temperature in the presence of H 2 gas to remove silicon oxide or by growing and then removing at high temperature in vacuum an oxide layer (conventional in MBE growth) may round off the sharp profile of the sawtooth structure.
  • an oxide layer is considered deleterious in conventional growth, it may be a key factor in obtaining high quality material in the methods described herein.
  • the temperature was raised to between approximately 600-800°C, typically to approximately 675°C, and a 1-2 ⁇ m-thick layer of GaAs grown. Satisfactory deposition conditions for conventional GaAs growth at 0.1 atm reactor pressure are 675°C, a V/III ratio of 100, and a growth rate of 4A/second. Without having to resort to the growth of strained superlattices or annealing techniques, the as-grown layers already indicate a dramatically low density of threading dislocations. However, a high density of twins and stacking faults was observed. Such crystalline defects can be removed by annealing.
  • annealing techniques Two annealing techniques were used: the first was in-situ temperature cycling in the MOCVD reactor (which typically includes several (typically 3-10) repetitions of a deposition-anneal- cooldown cycle to bring total film thickness into the range of 1.5-2.5), and the second was ex-situ thermal annealing at 900°C for 20 seconds. Both approaches were quite successful in dramatically reducing the twins and the stacking faults, with the latter giving a factor to two lower density.
  • the method of depositing materials having the "zinc blend" crystal structure onto a single-crystal Si substrate in which a sawtooth-profile relief structure has been etched can also be applied to materials having the so-called “diamond structure” e.g., diamond, Ge, Si, and the alloys of Si and Ge. Both Ge and the alloys of Si and Ge are of great practical interest. Although they do not match Si in crystal lattice parameter, the methods according to the invention reduce the problems of dislocation when they are grown on si.

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Abstract

A method for the epitaxial deposition of a substance onto a substrate (20) including providing a sawtooth-profile relief structure (80) on a surface of the substrate and depositing the substance (70) onto the sawtooth-profile relief structure.

Description

- ι -
Enhanced Heteroepitaxy This invention was made with government support under DAAL 03-89-C-0001 awarded by the Joint Services Electronics Program. The government has certain rights in the invention.
This invention relates to growing high quality GaAs and other III-V materials on single-crystal substrates. The III-V materials are crystalline semiconductors formed from elements of columns III and V of the periodic-table. III-V materials of interest include binary compounds, e.g., GaAs, AlAs, and InSb, which have the "zinc blend" crystalline structure, as well as a wide range of III-V ternary and quaternary alloys, e.g. , AlGaAs and GalnAsP.
Many investigators have grown crystalline GaAs on Si. However, this combination of materials is not well matched in a crystallographic sense (i.e., the distance between corresponding crystallographic planes is different in the two materials) and hence a high density of dislocations forms at the GaAs/Si interface. Upon epitaxial deposition these dislocations propagate into the growing GaAs layer. Dislocations are highly detrimental to the operation of optoelectronic devices such as lasers, and hence GaAs-on-Si is inhibited from the widespread commercial application that it would otherwise enjoy.
Smith U.S. Patent No. 4,333,792, entitled Enhancing Epitaxy and Preferred Orientation, and progeny patents and publications discloses the use of oriented artificial relief features or point defects embraced by parallel planes on a substrate to influence the orientation of solid films during the course of thier growth on the substrate surface. In general, the present invention features a method for the epitaxial deposition of a substance, preferably a III-V material, e.g., GaAs, Ge, or an alloy of Si and Ge, onto a substrate, preferably a single crystal substrate, e.g., a Si crystal. The method includes: providing a sawtooth-profile relief structure, preferably with a repeat distance of less than 500 nm, on a surface of the substrate; and depositing the substance onto the sawtooth-profile relief structure. In specific embodiments the substance and the substrate are crystallographically unmatched.
In other specific embodiments the dislocation density in the deposited epitaxial layer of the substance is lower than the dislocation density of an epitaxial layer of the substance deposited on a substrate that is substantially similar to the substrate except that its surface is planar.
In other specific embodiments the method includes: creating a grating of an etch resistant substance on the surface, the period of the grating lines being equal to the period of the sawtooth-profile relief structure, the grating lines being aligned with the lines formed by the intersection of the surface planes forming the teeth of the sawtooth structure; exposing the substrate to an etching agent, the exposure being sufficient to form sharply pointed sawteeth; and removing said grating to expose said sawteeth.
In other specific embodiments the surface planes of the sawteeth are coplanar with (111) planes of the substrate.
In other specific embodiments depositing the substance includes: growing a film of the substance on the sawtooth structure and heating the film sufficiently to reduce the density of faults in the crystal structure of the film. In other specific embodiments the surface of the substrate is cut on a {100} plane or is cut off a {100} plane, e.g., approximately 2, or approximately 4, degrees off a {100} plane. In another aspect, the invention features epitaxial composites made by the above described methods.
In specific embodiments of the epitaxial composites the substance and the substrate are crystallographically unmatched; and a layer of a III-V material, e.g., GaAs, is epitaxially deposited onto a Si single crystal.
In another aspect, the invention features an epitaxial composite including a substrate, the surface of the substrate including a sawtooth relief structure, and an epitaxially deposited layer of a III-V material on top of the sawtooth relief.
In specific embodiments the substance and the substrate are crystallographically unmatched, the substrate is single crystal Si; the deposited layer is GaAs; and the III-V material layer has a dislocation density which is lower than the dislocation density of a layer of similar III-V material deposited on a surface substrate similar to the substrate except that it is planar. In the methods of the invention a relief structure, the cross section of which is substantially sawtooth, is created on the surface of a substrate. A film of GaAs, another III-V material (or alloy thereof) , or a material having the so-called diamond structure, is grown on top of the substrate, by any of several processes, e.g., metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE) . Thereafter, the material is heated to remove any crystalline stacking faults or residual non-crystalline regions. The invention provides a substrate e.g., a Si substrate, with a surface configuration which minimizes the dislocation density in a single-crystal film of a crystallographically unmatched material, e.g., a III-V material, grown on the substrate. Single crystal Si substrates upon which III-V materials are grown can serve as the substrate for conventional electronic circuits, such as are commonly made in the integrated circuits industry. The III-V materials can serve as the base for fabricating optoelectronic devices such as lasers. Thus the invention allows electronic and optoelectronic devices to be integrated on the same substrate.
The formation of an epitaxial layer of a III-V material, e.g., GaAs, on a single-crystal Si substrate according to the invention allows integration, on the same substrate, of the optoelectronic circuits which are realizable in III-V semiconductors with the electronic circuits that are implemented so effectively on Si. Other features, objects, and advantages will become apparent from the following detailed description when read in connection with the accompanying drawings in which:
FIG. 1A is a fragmentary cross-sectional view of an epitaxy substrate suitable for receiving a sawtooth relief structure.
FIG. IB is a fragmentary cross-sectional view of an epitaxy substrate with a grating in the photoresist layer.
FIG. 1C is a fragmentary cross-sectional view of an epitaxy substrate showing shadowing angles.
FIG. ID is a fragmentary cross-sectional view of an epitaxy substrate after etching of the anti-reflective coating.
FIG. IE is a fragmentary cross-sectional view of an epitaxy substrate after etching of the Si3N4 layer. FIG. IF is a fragmentary cross-sectional view of an epitaxy substrate after removal of the anti-reflective coating.
FIG. 1G is a fragmentary cross-sectional view of an epitaxy substrate after etching of the wafer substrate.
FIG. 1H is a fragmentary cross-sectional view of an epitaxy substrate with a sawtooth relief structure.
FIG. II is a fragmentary cross-sectional view of an epitaxy substrate with incompletely etched sawteeth. FIG. 1J is a fragmentary cross-sectional view of an epitaxy substrate with incompletely etched sawteeth. In embodiments of the invention a sawtooth- profile relief structure of deep-submicron periodicity is etched anisotropically into a Si substrate such that the facets of the sawtooth are substantially (111) planes. Thereupon, GaAs or another III-V material is grown by MBE, MOCVD or other means and annealed at moderate temperatures. Thereafter, the dislocation density in the resulting III-V single-crystal film is substantially reduced over the density present in films grown on planar surfaces of Si.
FIG. 1A shows a fragmentary cross-sectional view of epitaxy substrate 10 including Si wafer substrate 20, silicon nitride (Si3N4) layer 30, anti-reflection coating 40, and photoresist layer 50. Epitaxy substrate 10 was produced by depositing, by methods known to those skilled in the art, Si3N4 to a thickness of about 30 nm on both sides (only the front side is shown in FIG. 1) of Si wafer substrate 20. Anti-reflection coating 40, which includes a polyimide heavily loaded with a dye active in the near ultraviolet, was then deposited on the Si3N4 layer 30 by conventional spinning methods. A suitable anti-reflective coating can be produced with ARC-XL, available from Brewer Scientific. The photoresist layer 50 was then deposited on the anti-reflective layer 40 by conventional spinning methods known to those skilled in the art. A suitable photoresist layer can be produced with products such as Microposit S1805, available from Shipley Corp.
The photoresist layer 50 was then exposed using holographic lithography (see, for example, Ph.D. Thesis, MIT, May 1988 by E.H. Anderson, entitled "Fabrication and Electromagnetic Applications of Periodic Nanostructures" hereby incorporated by reference) , and developed to produce a 200 nm-period grating 60 in the photoresist, as shown in FIG. IB. The photoresist was then "shadowed". Shadowing is accomplished by evaporating a material such as MgF2 or Si02 at two oblique angles (±40°), as depicted in FIG. lC. The arrows in FIG. 1C represent the approximate angles of shadowing. The epitaxy substrate 10 was then placed in a reactive-ion-etching system filled with oxygen gas, and the polymeric material (anti- reflective coating 40) was etched in a vertical manner, as depicted in FIG. ID. The gas in the reactive-ion- etching chamber was then changed to CHF3, and the thin Si3N layer 30 etched, as depicted in Fig. IE. The polymeric material (anti-reflective coating 40) was removed to yield a 200-nm period grating of Si3N4 stripes 70 on top of the Si wafer substrate 20, as shown in FIG. IF.
The Si wafer substrate 20 was then etched in KOH. KOH etches Si rapidly in [100] and [110] directions, but very slowly in [111] directions. The result is the sawtooth-profile grating, 80, depicted in FIG. 1G. The Si3N4 stripes 70 protect the Si of Si wafer substrate 20 from the KOH etchant and hence, whether a perfect sawtooth, as depicted in FIG. 1H, or a sawtooth with flat tops, as depicted in FIG. II and FIG. 1J, is achieved depends on how well the Si and the Si3N4 stripes are oriented relative to the crystallographic axes (precise alignment being desired) , and on how carefully the KOH etching is monitored and controlled. That is, to achieve a perfect sawtooth, the Si3N4 stripes are precisely aligned with the line at which (111) planes intersect to form a sawtooth, the Si wafer substrate 20 is extracted from the KOH etchant at exactly the point where the two (111) planes intersect and the Si3N4 stripe is fully "undercut". After forming the sawtooth structure, the residual Si3N4 can be removed, either in concentrated HF or hot phosphoric acid, by methods known to those skilled in the art. The samples were cleaned by degreasing in a sequence of boiling solvents (trichloroethane, acetone, and methanol) , immersed in a mixture of NH OH:H202:H20, and dipped in 10% HF.
This invention takes advantage of some information that other researchers have gained in growing GaAs on Si. For example, it has been shown that growing GaAs on Si whose surface is oriented 2-4 degrees off of the precise (100) plane minimizes a type of defect known as anti¬ phase domains (see S.F. Fang, et al., Journal of Applied Physics, vol. 68, p. R33 (1990) , hereby incorporated by reference) . As such, although not central or intrinsic to, or required by, the invention, it is preferable to use a silicon wafer whose surface is oriented 2 degrees off the precise (100) plane.
Growth of GaAs can be carried out by methods known to those skilled in the art, e.g., by MOCVD or MBE. In experiments where MBE was used, the sample was outgassed at 300°C in the preparation chamber for 30 minutes, introduced into the growth chamber, and heated to 900°C for 5 minutes. The temperature was then reduced to 350°C and growth started with an As/Ga flux ratio of 25:1 and a growth rate of 0.2 μm/h. The diffraction pattern produced by reflecting a high energy electron beam off the surface (the so-called RHEED pattern) indicated that the initial layer of GaAs was amorphous. The growth initiates in the grooves at a faster rate than on flat portions of the substrate. After sufficient growth to produce a 40 nm-thick amorphous GaAs layer, the growth was stopped and the sample heated to 640°C under As overpressure. At about 600°C, the 2x4 surface reconstruction started to become observable, indicating crystallation of the initial amorphous layer. In MOCVD-experiments the sample, typically after a short high tempertive bake out at approximately 1000°C, was heated to between approximately 390-450°C, typically to approximately 430° C, and an initial layer deposited. As in MBE, the growth was mainly confined to the groove areas, and the initial layer is amorphous. This amorphous layer is not typical of MOCVD growth of GaAs on flat Si substrates. The atypical growth may be due to a few-monolayer-thick amorphous silicon oxide at the Si/GaAs interface which was observed by transmission electron microscopy. This oxide layer, which most likely results from the method of cleaning and sample preparation, is always removed by in-situ cleaning in conventional growth methods. In-situ cleaning at high temperature in the presence of H2 gas to remove silicon oxide (conventional process in MOCVD) or by growing and then removing at high temperature in vacuum an oxide layer (conventional in MBE growth) may round off the sharp profile of the sawtooth structure. Whereas the presence of an oxide layer is considered deleterious in conventional growth, it may be a key factor in obtaining high quality material in the methods described herein. After depositing the initial amorphous layer in the MOCVD reactor, the temperature was raised to between approximately 600-800°C, typically to approximately 675°C, and a 1-2 μm-thick layer of GaAs grown. Satisfactory deposition conditions for conventional GaAs growth at 0.1 atm reactor pressure are 675°C, a V/III ratio of 100, and a growth rate of 4A/second. Without having to resort to the growth of strained superlattices or annealing techniques, the as-grown layers already indicate a dramatically low density of threading dislocations. However, a high density of twins and stacking faults was observed. Such crystalline defects can be removed by annealing. Two annealing techniques were used: the first was in-situ temperature cycling in the MOCVD reactor (which typically includes several (typically 3-10) repetitions of a deposition-anneal- cooldown cycle to bring total film thickness into the range of 1.5-2.5), and the second was ex-situ thermal annealing at 900°C for 20 seconds. Both approaches were quite successful in dramatically reducing the twins and the stacking faults, with the latter giving a factor to two lower density.
Other embodiments are within the following claims, e.g., the method of depositing materials having the "zinc blend" crystal structure onto a single-crystal Si substrate in which a sawtooth-profile relief structure has been etched (as described herein) can also be applied to materials having the so-called "diamond structure" e.g., diamond, Ge, Si, and the alloys of Si and Ge. Both Ge and the alloys of Si and Ge are of great practical interest. Although they do not match Si in crystal lattice parameter, the methods according to the invention reduce the problems of dislocation when they are grown on si.
What is claimed is:

Claims

Claims
1. A method for the epitaxial deposition of a substance onto a substrate comprising, forming a sawtooth-profile relief structure on a surface of said substrate, and epitaxially depositing said substance onto said sawtooth-profile relief structure.
2. A product made by the method of claim 1, further characterized in that said substance and said substrate are crystallographically unmatched and the dislocation density in the deposited epitaxial layer of said substance is lower than the dislocation density of an epitaxial layer of said substance deposited on a substrate that is substantially similar to said substrate except that its surface is planar.
3. The product of claim 2, wherein the surface planes of said sawteeth are coplanar with (111) planes of said substrate.
4. The method of claim 1, wherein depositing said substance comprises growing a film of said substance on said sawtooth structure, and exposing said film to sufficient heat to reduce the density of faults in the crystal structure of said film.
5. The product of claim 2, wherein said substrate is a single crystal.
6. The product of claim 5, wherein said single crystal comprises Si.
7. The product of claim 6, wherein said substance comprises a III-V material.
8. The product of claim 6, wherein said III-V material comprises GaAs.
9. The product of claim 6, wherein said substance comprises Ge.
10. The product of claim 6, wherein said substance comprises an alloy comprising Si and Ge.
11. The product of claim 2, wherein said relief structure has a repeat distance of less than 500 nm.
12. The product of claim 2, wherein the surface of said substrate is cut on a {100} plane.
13. The product of claim 2, wherein said surface of said substrate is cut off a {100} plane.
14. The product of claim 13, wherein the surface of said substrate is cut 2 degrees off a {100} plane.
15. An epitaxial composite made by the method of claim 1.
16. The epitaxial composite of claim 15, further characterized in that said substance and said substrate are crystallographically unmatched.
17. The epitaxial composite of claim 16, comprising a layer of a III-V material epitaxially deposited onto a Si single crystal.
18. The epitaxial composite of claim 16, wherein said III-V material is GaAs.
19. An epitaxial composite comprising a substrate, the surface of said substrate comprising a sawtooth relief structure, and an epitaxially deposited layer of III-V material on top of said sawtooth relief.
20. The epitaxial composite of claim 19, further characterized in that said substance and said substrate are crystallographically unmatched.
21. The epitaxial composite of claim 19, wherein said substrate comprises single crystal Si.
22. The epitaxial composite of claim 19, wherein said deposited layer comprises GaAs.
23. The epitaxial composite of claim 19, wherein said III-V material layer has a dislocation density which is lower than the dislocation density of a III-V material layer deposited on a surface substrate similar to said substrate except that it is planar.
PCT/US1992/007618 1991-09-10 1992-09-09 Enhanced heteroepitaxy WO1993005208A1 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677336A (en) * 1985-02-04 1987-06-30 Hitachi, Ltd. Piezoelectric transducer and process for its production

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677336A (en) * 1985-02-04 1987-06-30 Hitachi, Ltd. Piezoelectric transducer and process for its production

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