WO1993003542A1

WO1993003542A1 - Amplifier

Info

Publication number: WO1993003542A1
Application number: PCT/GB1992/001418
Authority: WO
Inventors: Malcolm Omar John Hawksford
Original assignee: Wivenhoe Technology Limited
Priority date: 1991-08-01
Filing date: 1992-07-31
Publication date: 1993-02-18
Also published as: GB9116656D0

Abstract

An amplifier having an integrator with a forward path of gain A and arranged to have simultaneously voltage and differential current derived feedback. The feedback signal thus contains a component dependent upon a voltage in the forward path forward of the integrator and a component dependent on the first derivative of a current in the forward path forward of the integrator.

Description

AMPLIFIER

This invention relates broadly to amplifiers. In particular embodiments, the broad principles of the invention are applied to electronic or solid-state amplifiers, usually jointly referred to as electronic.

In accordance with the invention there is provided an amplifier having a forward path including an integrator and a feedback path arranged to feedback a signal containing a component dependent on a voltage in the forward path forward of the integrator and a component dependent on the first derivative of a current in the forward path forward of the integrator.

The new arrangement has advantages in a number of applications. For example, component values can be chosen so that the output impedance of the amplifier is substantially zero, despite a unite forward path gain for the integrator.

The feedback path preferably comprises a feedback network connected between a node forward of the integrator in the forward path and an input to the integrator to provide the voltage derived component; and the network then includes one or more secondary turns mutually coupled with one or more primary turns carrying the said current in the forward path so that a voltage is generated in the secondary turn(s) dependent on the first derivative of the current in the primary turn(s) to provide the said component dependent on the first derivative of the forward path current. The feedback network can be simply and inexpensively implemented as a current transformer in which a magnetic circuit loosely couples two windings. For example, a toroidal ferrite has a few secondary turns wound tightly thereon and a conductor carrying the forward path current passes through the toxoid to provide a single primary turn.

In an amplifier in which the forward gain of the integrator is relatively linear, and which includes a high current gain stage, of which the voltage gain is relatively non-linear, forward of the integrator in the forward path, a bypass network is preferably included around the high current gain stage, current in the bypass network being carried by the primary turn(s).

This arrangement can be balanced so that the error due to the non-linearity of the high current gain stage is substantially desensitised by the loop gain and the output impedance is reduced towards zero. In practice, the voltage gain of the amplifier is frequency dependent, approximating to a first order lag.

In order to achieve balance, it may be preferable to include one or more further primary turns mutually coupled with the same or further secondary turns in the feedback network, the further primary turn(s) carrying the current output of the high current gain stage and/or the sum of the current output of the high current gain stage and the current in the bypass network.

An arrangement to compensate for the non-linear effect of finite input impendance in the high current gain stage includes further primary turns mutually coupled with secondary turns in the feedback network, the further primary turns carrying the current input of the high current gain stage and the current in the bypass network.

In order to further reduce the sensitivity to output stage non-linearity, the amplifier preferably includes one or more nested additional integrator stages, there being a bypass network round the or all the stages forward of each integrator stage and associated therewith, and a feedback network connected between a node forward of the high current gain stage in the forward path and an input to each integrator stage to provide a voltage derived component of a respective feedback signal; and wherein each feedback network includes one or more secondary turns mutually coupled with one or more primary turns carrying the current associated bypass network so that a voltage is generated in the secondary turn(s) dependent on the first derivative of the current in the primary turn(s) to provide a component of the respective feedback signal dependent on the first derivative of the current in the associated bypass network.

Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:

Fig. 1 shows schematically a current sensor used in embodiments of the invention;

Fig. 2 is a generalised circuit diagram of an amplifier embodying the invention;

Fig. 3 is a generalised circuit diagram of an amplifier embodying the invention and having a non-linear high current gain stage;

Fig. 4 is a circuit diagram illustrating measurement of mutual inductance;

Fig. 5 is a generalised circuit diagram of a circuit embodying the invention with which the practical effect of output impedance in the integrator will be explained;

Fig. 6 is a generalised circuit diagram of an amplifier embodying the invention in which the integrator is realised as two transconductance stages and in which the effect of the output impedance of the integrator will be further explained;

Fig. 7 is a generalised circuit diagram of an amplifier embodying the invention with which the effects of the practical impedance of the current transformer will be explained;

Fig. 8 is a generalised circuit diagram of an amplifier embodying the invention in which the feed back signal is obtained using conventional solid state components without a current transformer;

Fig. 9 is a generalised circuit diagram of the invention embodied in a current dumping amplifier; and

Fig. 10 shows a generalised circuit diagram of an amplifier embodying the invention and incorporating nested feedback loops.

The current sensor is in effect a current transformer which consists of a magnetic circuit and two loosely coupled windings. For the purpose of definition, the winding carrying the current to be sensed is the primary while the winding used to derive a voltage proportional to the rate of change of the primary current is the secondary winding. A basic current sensing element is shown in Fig. 1 where a toroidal construction (such as a small ferrite toroid or cylinder) is used for the magnetic circuit.

The primary winding is loosely coupled to the transformer and is only required to pass through the toroid where the path is essentially non critical. As shown in Fig. 1, the primary forms a loosely coupled single turn, whereas the secondary consists of N turns of wire tightly wound over the surface of the toroid with windings that link N times through the toroid centre.

To analyse the toroidal sensor, the following parameters are defined:

R, mean radius of toroid; metre

A, mean cross-sectional area of toroid; metre²

μ_o, permeability of free space; henry/metre μ_r, relative permeability of ferrite (or other magnetic material)

B_R, means circumferential magnetic flux density at radius R; tesla

H_R, magnetising field at radius R; ampere/metre

Φ, total magnetic flux within toroid; weber

Applying Ampere's circuital law ( curl

. . . 1.1

where C is a contour enclosing the primary current I also, . . . 1.2

Considering the contour C to be a circumferential path within the toroid and of mean radius R, then equation 1.1 approximates to

I_P = H_R2πR

and from equation 1.2,

If the mean flux density is calculated over the cross-sectional area A, the total flux within the toroid φ is derived as,

Considering a N turn, close-wound coil that is linked by the flux φ, then from Faraday the open-circuit secondary voltage e₃ is, ... 1.3

whereby a mutual inductance L is defined for the transformer as . . . 1.4

. . . 1.5

Equation 1.3 shows that providing the internal flux varies synchronously at all points within the toroid then the open-circuit secondary emf is proportional to the rate of change of primary current. Also since the primary coil forms a loosely coupled, single turn the effective primary inductance is small.

In Fig. 2, a basic amplifier topology is shown that has simultaneous voltage and differential current derived feedback (DCDF). The system incorporates an amplifier of forward gain A and open-loop output impedance Z_o together with a load impedance Z_L and dual voltage and DCDF paths. For simplicity, unity-gain feedback is used that includes a floating voltage generator whose terminal potential is proportional to the rate of change of output current I_o, where using the Laplace operator s, this is described as sL_oI_o (the notation used in this specification is to\ give the same subscript to the mutual inductance L_χ and corresponding current to be sensed I_x).

Analysis: Observing the voltages in Fig. 2,

noting, then rearranging

. . . 2.1

The numerator shows a closed-loop dependence on Z_L, however by aligning inductance L_o such that sL_oA = Z₁ ... 2.2 then equation 2.1 reduces to,

. . . 2.3 and is independent of the load impedance Z_L.

Equation 2.2 represents a condition to reduce the amplifier's closed-loop output impedance to zero, where this can be realised by forcing the forward gain A to take the form, . . .2.4

whereby form equations 2.2 and 2.4,

L_o = Z₁ T_o .. . 2.5

Equation 2.5 reveals that providing Z₁ is resistive and the gain-bandwidth product (2πT_o)^-1 is constant the inductance L_o is also real and constant allowing the use of the

toroidal current sensor described earlier.

Although a DCDF enhanced amplifier can achieve zero output impedance with a finite forward-path gain, it is only realised if the output impedance Z₁ has a constant resistance and the current transformer and amplifier's transfer functions are aligned. In practice and especially for high-output current amplifiers, the impedance Z. is dynamically modulated by changing output-transistor parameters and produces output distortion as equation 2.5 is set only for one value.

In the circuit illustrated in Fig. 3, the technique is extended to accommodate amplifiers with non-linear output impedance and as such, enables an effective error correction strategy to be implemented.

Consider a linear amplifier of transfer function A that has a constant value output resistance R₁ where an appropriate level of DCDF makes the closed-loop output impedance zero. If a non-linear resistor is now coupled to the amplifier output, then because of the zero output impedance, the output voltage remains undistorted assuming the correct balance condition for DCDF is maintained. This observation can be further generalised by considering a non-linear stage N (where N» 1 and at this stage of discussion has a very high input impedance) connected across the resistor R₁ as shown in Fig. 3. The stage N can now contribute to the total output current but because the system has a theoretical output impedance of zero, the amplifier closed-loop gain remains independent of the non-linear gain N even when loaded by a finite (and possibly non-linear) load impedance.

To establish a more rigorous foundation for this topology, the system in Fig. 3 is evaluated, where to generalise the analysis three current sensing paths are incorporated and feedback the differentials of I₁, I₂ and I_o respectively. The forward-path amplifier is assumed at this stage to have both a zero output resistance and the same voltage transfer function A as defined previously in equation 2.4.

Analysis

Observing the output node, I_o = l₁1 + l₂ ... 3.1

Defining V_a as the output voltage of amplifier A (see Fig. 3),

V a = A[ V₁ - sL_oI_o + sL₁I₁ - sL₂l₂ - V_o ] also the current in l₁ is given by, l₁R₁ = V_a - V_o substituting for V_a, I₂ and rearranging,

... 3.2

To make equation 3.2 independent of current I₁ and thus independent of internal and non-linear parameters,

R₁ = s A (L₁- L₂) . .. 3.3

Under optimal balance (ie. equation 3.3 applies), equation 3.2 reduces to,

... 3.4

that is, the closed-loop output impedance Z_out is given by,

.. . 3.5a

Substituting the first-order approximation For A defined by equation 2.4, yields

.. . 3.5b

that is the output impedance can be modelled as an inductance (L_o + L₁) henry is parallel with a resistance of (L_o + L₂)/T_o ohm.

Equations 3.3 and 3.5a,b identify three scenarios depending upon the relative values of L_o, L_1, L₂:

(i) L_o, L₁, L₂ all finite:

In general Z_out is finite as defined by equation 3.5b, however for the special case of L_o = - L₂ then Z_out = 0. This condition can be formed by a single sensing toroid that is simultaneously linked by I_o and l₂ but flowing in opposite directions.

(ii) L_o or L₂ set zero:

Balance remains possible but the output impedance is finite.

(iii) L_o and L₂ zero, only l₁ sensed:

Under optimal balance Z_out = 0 and toroid flux is

minimised as in general l₁ < < l₂ for N≈ 1.

For practical amplifiers condition (iii) appears most suitable and only requires a single sensor. Also the expression for V₀ given by equation 3.4 is independent of the non-linear network N both in terms of the output impedance and voltage transfer function of N. It is also intersting to observe that a theoretical distortion null is achieved without using a series summation network in the amplifier output circuit even, though in practice a small inductor (~ 1 μH) in series with the output remains desirable.

An overall expression for gain can be determined by considering the network N to have an output voltage V₀, whereby,

Hence substituting l₁ from equation 3.6 into equation 3.2, for L₀ = L₂ = 0, gives

Defining an error function E(s) where G(s) is the actual gain and for N=1, G_t(s) is the target gain,

Λ /

where, assuming, ( \

Equation 3.9 shows that the error function has two zeros that are further desensitised by the loop gain (1 + A). Although N = 1 is unrealisable for a non-linear and finite bandwidth stage, the balance condition defined by equation 3.3 does establish a condition that minimises output distortion due to non-linearity within the stage N.

However, the present analysis has assumed the amplifier A to have a zero output impedance so that the closed-loop gain is not modulated by the non-linear currents I₁ and I_n. In Fig. 5 a more general current sensing technique is shown that extends the correction scheme to accommodate non-linear loading on the A amplifier and therefore minimise the principal distortions associated with the output stage N.

The system diagram in Fig. 5 shows a basic correction scheme that can accommodate a finite output impedance in amplifier A designated Z_o. The significance of Z_o is that the input current of the stage N (ie. I_n) and the current in impedance Z₁ (ie. I₁) introduce nonlinear signal components into the overall feedback loop which in turn produce distortion in the output signal. The proposed correction procedure is to use individual differential-current sensors for both currents I n and I.1.

Analysis

The voltage across Z₁ is given by,

I₁ Z₁ = V_a - (l₁ + l_n) Z_o - V_o where,

V_a = A[V₁+s(I_nL_n +I₁L₁)-V_o] substituting for V_a, l₁Z₁+l₁z_o+l_nZ_o-sA(l_nL_n+I₁L₁) = A(V₁- V_o)-V_o

Error correction is achieved when the left-hand side (LHS) is equated to zero, whereby,

and for independence for both l₁ and I_n

For the special case of A defined by equation 2.4 and for Z_o and Z₁ resistive (ie. R_o and R₁), equation 3.11 and 3.12 become frequency independent,

L₁ = (R_o+R₁)T_o ... 3.14

... 3.15

L_n = R_oT_o However, although the approximation for A can be made accurate, in most circuits Z is frequency dependent as A is formed by a frequency-dependent feedback amplifier based upon two cascaded transconductance stages and therefore requires the more general analysis described in relation to Fig. 6.

The DCDF error correction scheme can be extended to an amplifier using internal transconductance stages with local voltage-derived, frequency negative feedback where a basic schematic is shown in Fig. 6. The topology consists of twocascaded transconductance amplifiers g₁, g₂ where g₂ has local feedback via Z₀ and a local load impedance Z₂. The second stage also drives the non-linear output stage N and supplies current to the feedforward bypass impedance Z₁. As before a dual DCDF scheme is used as a means of correcting both voltage-transfer error in N and the non-linear loading o f the frequency dependent output impedance of the second state.

Analysis

Following a procedure similar to that used in relation to Fig. 5, the system equations are, l₁ Z₁ = V_a - V_o

i₁ + i₂ = I_n + I₁ + Z2

i₁ Z_o = - V

i₁ =g₁ (V_o- s (L_n I_n + L₁ l ₁) - V₁)

defining α = , then

|

Equating the LHS of equation 3.16 to zero, (i) Eliminating l₁

(ii) Eliminating I_n ,

that is,

To simplify the expression make, 0

and put Z₁ = R₁, Z₂ = R₂, whereby if,

Equation 3.17 and 3.18 reduce to,

In a practical circuit R₂ is the output impedance of the second transconductance stage which can be made large by using either a grounded base stage or an enhanced cascode topology [2], whereby R₂g₁ g₂ > > R₁ and equation 3.21 then reduces to,

Providing the core cells g₁, g₂ exhibit a wide bandwidth with constant transconductance then the expressions for calculating the current feedback parameters L₁, L_n determine conditions for minimising the non-linear distortion of the overall amplifier whereon equation 3.16 reduces to,

which simplifies further using equation 3.20 and the condition for large Z₂ to,

that is, the amplifier adheres to a simple, first-order response even under large signal conditions. Also, providing g₂ Z₂ > > 1 then the closed-loop gain under balance is independent of g₂. In practice the stage g₁, would use local negative feedback possibly augmented by local error correction to achieve a relatively low transconductance and thus exhibit both wide bandwidth and low distortion. The distortion correction performance of DCDF depends in the limit upon the frequency response of the current transformer adhering to that of a differentiator, that is a gain α/with a phase of 90°. In practice, a transformer is bandlimited where due to interturn capacitance and coil inductance, a high-frequency resonance results. Fig. 7 shows an amplifier with DCDF where the current-transformer bandwidth is modelled by a second- order resonant circuit. An analysis of this topology for an ideal current transformer yields a transfer function G_n(s), Λ u

To modify equation 3.26 for a non-ideal current transformer that has a second-order, high frequency resonance we use the transformation,

ς

Applying this transformation to equation 3.26 in association with the optimum low-frequency balance condition A = R₁/s L₁ the closed-loop gain is,

f

To determine system sensitivity to D₁₂(s) under optimum low-frequency balance, an error function E (s) is defined,

whereby,

and substituting for D₁₂(s) from equation 3.29

Equation 3.32 shows the advantage of designing a transformer with largely which should ideally be greater than the amplifier gain-bandwidth product. Also, it should be observed that the configuration of Fig. 7 has a balance condition that is independent of feedback factor k as the floating voltage source (secondary of the current transformer) can be introduced as a series element after k and therefore is not subject to attenuation within the feedforward path.

The analysis procedure using the transformation in 3.28 is applicable to any DCDF configuration once an expression for closed-loop gain based upon an ideal current transformer is derived. An evaluation of an error function (as in equation 3.31, 3.32) then yields a measure of sensitivity to non-ideal transformer parameters. It should also be observed that in current dumping (see later for comparisons with DCDF) a similar resonant limitation can occur in the output coil where the problem is exacerbated by requiring a coil of greater value due to the inclusion of the feedback factor in the balance equation.

As a test aid for the current transformer the following analysis links the transfer function of the resistor-coil assembly to the gain-bandwidth product of the amplifier. The test circuit is shown in Fig. 4 where the primary winding uses the same resistor R₁ as in the circuit of Fig. 3. For a sinussoϊdal excitation, the open-circuit secondary voltage E₂ of the coil and the generator voltage E₁ are linked as,

However, the balance condition of equation 3.3 for the case of L₂ = OH shows that R₁/₁=sA whereby,

That is, at the frequency wherelAl = 1, the voltage transfer function E₂/E₁ is also unity. Consequently, providing the gain-bandwidth product of A is known, then the coil (L₁) and resistor (R₁) combination can be designed such that the measurement scheme of Fig.4 achieves a unity-gain result at the unity-gain frequency of amplifier A.

The class A stage of a current dumping amplifier delivers current to both the output transistors and the feedforward impedance Z₁ and since these currents are non-linear function of the input signal, distortion is introduced into the loop when the class A amplifier has a finite output impedance Z_a. A basic scheme is illustrated in Fig. 9 where a current dumping amplifier is enhanced by DCDF that senses both l₁ (the current in Z₁) and I_n (the non-linear input current to the output stage N).

Analysis

Defining V_a as the output voltage of the class A stage, then

V_S=A[V₁ -V_{o + S} (L_nl_n +L₁ I₁) - (I_o -I₁) Z₂] V_a =V_o + (l₁ + l _n) Z_a + l₁ Z₁

Equating terms in I₁ and substituting Z₂ = sL₂,

while equating terms in I_n

that is, L_n= (L ₁ + L₂)

Equation 4.7 represents the balance equation for the conventional current dumping amplifier when I_n = 0 while equation 4.8 and 4.9 give an extended balance condition when DCDF via L_n is incorporated. Although in this scheme both l₀ and I₁ are sensed, in the Walker Albinson current dumping amplifier L₁ = 0 because of the inclusion of Z₂, thus only a single low-current sensor for I_n is required.

An amplifier based upon two cascaded transconductance stages was shown in Fig. 6. The topology in Fig. 9 can be adapted to this topology by comparing A and Z_a to the transconductance core cells g₁, g₂ together with the associated circuitry; where using a Norton-to-Thevenin transformation.

also applying equation 3.20 where g₂ r_o = 1,

whereby the balance conditions for the transconductance configuration follow from equation 4.7, 4.9, 4.11 and 4.12 as,

These results demonstrate that providing the core of the second transconductance cell g₂ (without local negative feedback) exhibits a broad bandwidth, a satisfactory balance can be achieved that accommodates both output stage non-linearity and the non-linear loading of the output stage upon the forward-path amplifier, which in this configuration must have a finite output impedance.

The DCDF correction technique, can readily be extended to a system of order m that incorporates m, first-order amplifiers and m DCDF correction paths using m feedforward resistors. The advantage of this new structure over earlier nested-amplifier proposals, is the ability to generate m transmission zeros in the non-linear error function which is further desensitised by the product of the amplifier gains A₁.A₂.A₃....A_m. Also, the DCDF loops aid the design of a stable amplifier system where under optimal balance the closed-loop gain takes the form A_m/(1 +A_m), that is for an ideal system only one amplifier determines stability, although practical circuitry will lead to a more complicated result. A consequence of this enhanced procedure is the means of reducing further the sensitivity to output-stage non-linearity which is particularly attractive under sub-optimal balance.

The DCDF system of order m is shown in Fig. 10. The inner amplifier loop (designated by a gain N₁) is identical in form to that already discussed in relation to Figs. 3 and 5 and includes dual correction systems for both output-stage voltage transfer and current transfer non-linearities. A second amplifier with a forward-path gain A₂, in association with N₁, then forms a second feedback amplifier system, where a further feedforward resistor R₂ and differential-current transformer realise the second correction path. For this second amplifier it is assumed unnecessary to incorporate current correction as the input current to amplifier A₁ is generally both linear and negligible, hence only one correction transformer is required. As indicated in Fig. 10, this method of nesting correction amplifier systems can be systematically extended to a composite topology of general order m.

The overall transfer function of the m™-order amplifier and its associated error function with respect to non-linear gain N₀ are derived as follows:

Consider the inner amplifier loop formed by A₁, N₀, R₁, Z₀₁, L₁ and L _n which is also depicted in Fig, 5 where A=A,, N=N₀ and Z_o=Z_o1. To enable an expression for I_n in terms of the output voltage V_o, the output-stage N₀ is given a non-linear input impedance Z_n0 (which is partially output load dependent) whereby,

The output voltage V_χ of amplifier A₁ may be expressed as follows, current in Z₀₁, R₁

and via amplifier A₁,

V_X= A₁(V₁- k ₁ V_o + s L_n l_n + s L₁ l₁)

defining,

and,

Q₁ = 1 + A₁ (k₁- 1) . . . 6.3 then the closed-loop transfer function N₁ of the inner-most amplifier loop is given by,

The expression for λ ₁, λ _n are the balance equations enabling independence of N₀ and Z_no in the closed-loop transfer function N₁, where under optimal balance,

The above equation may be extended to the m™ amplifier loop, however we assume here that for all amplifiers in the nest other than N₁ that Z_{n(m -1)} is infinite, consequently the corresponding terms inλ_n do not appear.

Hence, the closed-loop gain for the n™ amplifier loop is, / Γ

where,

and,

Q_m = 1 +A_m (._m - 1) . . . 6.7 Equation 6.5 can be used to determine expressions for N_m-1, N_m-2, etc down to N₁ while equation 6.4 completes the analysis down to the output stage, N_o.

Using this m -stage iterative analysis, the closed-loop gain N_m of the m -stage nest follows as,

. . . 6.8

Also, the corresponding error function E_m, where the target gain is derived from N_m where N_o= l andλ_n=0, is,

where it is noted from equations 6.5, 6.6 and 6.7 that N_m is approximately l/k_m.

To illustrate the expanded structure more clearly of equations 6.8 and 6.9, an expression for a third-order nest is presented, ie.

Equation 6.9 reveals that the dependence upon N_o and the input-current artifacts of the output stage are reduced not only by the product of the m forward-path amplifier gains but also by the product of the m zeros involving the balance condition lambda functions. It is also clear from equation 6.8, that assuming optimal alignment of the m balance conditions that the expression for N_m reduces to,

where by stability is dependent (in this idealised case), only upon A_m and k_m.

Claims

1. An amplifier having a forward path including an integrator and a feedback path arranged to feedback a signal containing a component dependent on a voltage in the forward path forward of the integrator and a component dependent on the first derivative of a current in the forward path forward of the integrator.

2. An amplifier as claimed in claim 1, wherein the feedback path comprises a feedback network connected between a node forward of the integrator in the forward path and an input to the integrator to provide the voltage derived component; and wherein the network includes one or more secondary turns mutually coupled with one or more primary turns carrying the said current in the forward path so that a voltage is generated in the secondary turn(s) dependent on the first derivative of the current in the primary turn(s) to provide the said component dependent on the first derivative of the forward path current.

3. An amplifier as claimed in claim 2, wherein the forward gain of the integrator is relatively linear, and including a high current gain stage, of which the voltage gain is relatively non-linear, forward of the integrator in the forward path, and including a bypass network around the high current gain stage, current in the bypass network being carried by the primary turn(s).

4. An amplifier as claimed in claim 3, including one or more further primary turns mutually coupled with the same or further secondary turns in the feedback network, the further primary turn(s) carrying the current output of the high current gain stage and/or the sum of the current output of the high current gain stage and the current in the bypass network.

5. An amplifier as claimed in claim 3, including further primary turns mutually coupled with secondary turns in the feedback network, the further primary turns carrying the current input of the high current gain stage and the current in the bypass network.

6. An amplifier as claimed in claim 3 or 5, including one or more nested additional integrator stages, there being a bypass network round the or all the stages forward of each integrator stage and associated therewith, and a feedback network connected between a node forward of the high current gain stage in the forward path and an input to each integrator stage to provide a voltage derived component of a respective feedback signal; and wherein each feedback network includes one or more secondary turns mutually coupled with one or more primary turns carrying the current associated bypass network so that a voltage is generated in the secondary turn(s) dependent on the first derivative of the current in the primary turn(s) to provide a component of the respective feedback signal dependent on the first derivative of the current in the associated bypass network.