WO1992019047A1

WO1992019047A1 - Apparatus for filtering and amplifying an oscillator

Info

Publication number: WO1992019047A1
Application number: PCT/US1992/002370
Authority: WO
Inventors: Alexander W. Hietala
Original assignee: Motorola, Inc.
Priority date: 1991-04-15
Filing date: 1992-03-24
Publication date: 1992-10-29
Also published as: JPH05508526A; CA2078231A1; GB2261143A; GB9225669D0; DE4291072T1

Abstract

A radiotelephone (208) for use in a radiotelephone system, the radiotelephone including an oscillator (203) and a buffer amplifier (211) and a transmitter (206). The transmitter (206) is pulsed, causing audio frequency voltage variations in the power supply (207). The radiotelephone (208) generates power and a bias signal for the oscillator (203). The buffer amplifier (211) and the oscillator (203) are in a 'stacked' configuration. The buffer amplifier (211) diminishes the audio frequency voltage variations caused by the pulsed transmitter in the power and bias signals generated for the oscillator (203).

Description

Apparatus for Filtering and Amplifying an

Oscillator

Field of the Invention

This invention generally relates to oscillators and more specifically to reducing supply voltage noise to voltage controlled oscillators (VCO) used in radiotelephones.

Background of the Invention

The current trend in radiotelephones is toward smaller and more portable radiotelephones. Portable phones require the use of batteries for power. Batteries limit the amoimt of current and voltage available for use by the radiotelephone, therefore, efficient use of electrical current and voltage is a very important part of the design of a radiotelephone.

A Time Division Multiple Access (TDMA) radiotelephone system contains a fixed site transceiver 209 which serves a coverage area populated by portable and mobile radiotelephones 208. Each radio frequency (RF) channel used by the fixed site transceiver 209 can handle multiple phone calls to/from the radiotelephones 208 by dividing the (RF) channel in time and assigning different time slots to each radiotelephone 208. The time slots allow a designer to reduce the power consumption of the radiotelephone by pulsing its transmitter 206 on and off at the known intervals at which the transmitter 206 needs to send data. This pulsing can reduce the power consumption of the transmitter 206 significantly as compared to leaving the transmitter on 100% of the time. However, pulsing the transmitter on and off creates a large current drain pulse on the power supply 207 for the radiotelephone which causes a large voltage swing in the power supplied to other parts of the radiotelephone 208. The use of a VCO 203 in radiotelephones 208 is well known. The VCO 203 contained within the radiotelephone 208 is very sensitive to the variations in the voltage of the power supply since a change in the voltage of the supply can change the frequency of the VCO 203, resulting in undesirable modulation sidebands on the VCO output. In order to relieve the VCO of the problem caused by the voltage variations in the power supply 207, several known techniques have been used including the use of low pass filters and/or voltage regulators. The use of low pass filters in a radiotelephone is well known and is effective. The frequency of the transmitter pulse is typically less than 200 Hz. The physical size of the resistors and capacitors contained within the low pass filter necessary to filter this low frequency will be very large. As radiotelephones become smaller, the size constraints of the individual components becomes tighter, therefore the use of low pass filters is impractical.

The voltage regulators consume power and create a voltage drop at the output of the regulator. Since the power supply in a portable radiotelephone has a limited voltage range typically not greater than 7.2 volts, each drop across the voltage regulator is significant and several voltage regulators are needed to alleviate the fluctuating voltage of the VCO supply. The drop across each regulator results in a smaller effective supply voltage from which the VCO 203 can operate.

Therefore, these voltage regulators in the path between the power supply and the VCO 203 must be limited.

FIG. 1 is a block diagram of an apparatus containing a VCO 101 which is known in the art. The VCO supply 110 has multiple regulators 107, 108, 106, in its path to the VCO 101 thus reducing the voltage range available to the VCO 101. The VCO 101 and buffer amplifier 102 are in a "stacked" configuration which is known in the art. The "stacked" configuration in this instance, is used to reduce the overall current supply by reusing the buffer amplifier current to power the oscillator 101. This configuration results in considerable power savings, but limits the range of the supply voltage substantially. The number of voltage regulators is determined by the desired supply rejection which must be maintained to remove any voltage variations in the power supply.

Therefore, a need exists for a VCO circuit for use in a portable radiotelephone and a TDMA radiotelephone system which can operate successfully without requiring additional power supply voltage or unreasonably large size components.

Summary of the Invention

The present invention encompasses a radiotelephone including an oscillator and a buffer amplifier. The radiotelephone comprises means for generating power, means for supplying a bias signal to the oscillator derived from said means for generating power, and means for diminishing audio frequency noise in said means for supplying said bias signal to the oscillator.

Brief Description of the Drawings

FIG. 1 is a block diagram of a "stacked" VCO and buffer amplifier as known in the art.

FIG. 2 is a block diagram of a radiotelephone communications system which may employ the present invention.

FIG. 3 is a block diagram of a "stacked" VCO and buffer amplifier which may employ the present invention.

FIG. 4 is a circuit diagram of a "stacked" VCO and buffer amplifier circuit which may employ the present invention.

FIG. 5A is an illustration of a simulated response from a power supply to the VCO for an implementation of the block diagram in FIG.1.

FIG. 5B is an illustration of a simulated response from the power supply to the VCO for an implementation of the block diagram in FIG.3 which may employ the present invention. Description of a Preferred Embodiment

FIG. 2 is a block diagram of a radio frequency transmission system. The fixed site transceiver 209 transmits and receives radio frequency signals from the portable radiotelephone 208 when the portable radiotelephone 208 is within the coverage area of the transceiver 209. The portable radiotelephone 208 contains a power supply 207, a transmitter 206, a receiver 205, an antenna 210, a VCO 203, a buffer amplifier 211, a synthesizer 202, control logic for the synthesizer 204 and a reference oscillator 201. The RF signals transmitted between the portable radiotelephone 208 and the transceiver 209 are at a frequency selected by the system from among many available. The frequency is generated within the radiotelephone 208 with the reference oscillator 201. The frequency generated from the reference oscillator 201 is changed with the synthesizer 202, then it is input into the VCO 203. The control logic 204 feeds the synthesizer 202 with the frequency information necessary to convert the frequency of the reference oscillator 201 into the desired VCO frequency. The power supply 207 is coupled to all of the devices contained within the radiotelephone 208. The output of the VCO 203 is fed into the buffer amplifier 211 and the output of the buffer amplifier 211 is input into the transmitter 206 and the receiver

205. The frequency input into the receiver 205 allows the receiver 205 to demodulate the radio frequency signals received from transceiver 209 and coupled by the antenna 210. The electrical radio frequency signals are demodulated and converted into a recognizable data format for use by the rest of the radiotelephone 208. The frequency fed from the buffer amplifier 211 into the transmitter 206 is used to modulate data which is input into the transmitter 206. The output from the transmitter 206 is coupled to the antenna 210 which converts the electrical radio frequency signals into radio frequency signals for use in the fixed site transceiver 209.

FIG. 3 is a general block diagram of a configuration including a power supply 310 a VCO 301 and a buffer amplifier 302 in a "stacked" configuration which may employ the present invention. The use of a "stacked" buffer amplifier 302 and a VCO 301 as a power efficient configuration is not new. Here, as a feature of the present invention, the "stacked" configuration is further used to isolate the power supply 310 from the VCO 301.

The configuration of the preferred embodiment contains a power supply 310, at least three voltage regulators 307, 308, and 306, note that 306 is actually regulator no.N-1 which relates back to FIG. 1 which contains regulator no.l, regulator no.2 and regulator no.N, thus, we note that the configuration in

FIG.3 has one less voltage regulator than the configuration in FIG. 1. Fig. 3 also contains the buffer amplifier 302, the VCO 301, resistors 303, 304, 305 and capacitor 309. The power supply signal has passed through regulator no.l 307, regulator no.2 308, and regulator no.N-1 306. The power supply signal is routed through two paths to the VCO 301.

The first path is directly into the buffer amplifier 302 which is used to power the buffer amplifier 302. Then, the power supply signal is tapped off the buffer amplifier 302 and fed into the VCO 301 to supply the VCO 301 with power. The second path in FIG. 3 for the power supply signal are the bias signals for both the buffer amplifier 302 and the VCO 301. The power supply signal is fed into resistor 305 and capacitor 309 is attached in parallel between the voltage supply signal at the output of resistor 305 and electrical ground. A bias signal for the buffer amplifier is tapped off of the power supply signal at the output of resistor 305. The output of resistor 305 is also input into resistor 304. The output of resistor 304 is input into resistor 303 which is tied to electrical ground. The bias signal for the VCO 301 is tapped off of the output of resistor 304.

The difference between FIG. 1 and FIG. 3 is the reduction of one voltage regulator no.N and the addition of capacitor 309. With the addition of capacitor 309 the combination of resistor 305 and capacitor 309 form a large RC time constant, this RC time constant will act to reject higher frequency components from passing through the second path and by choosing the proper RC constant the second path can be designed to reject the voltage variations caused by the pulsing of the transmitter 206. FIG. 3 is a general block diagram, it is not limited to a specific buffer amplifier 302 or a specific VCO 301 and the RC biased network formed by resistor 305 and capacitor 309 can be tuned for any transmitter pulse rate which does not exceed 10 kHz. FIG. 4 is a circuit diagram of a specific implementation of the general embodiment illustrated in FIG. 3. In this example, the buffer amplifier 302 is a double cascode buffer amplifier, determined by transistors 401, 402, 403. These transistors 401,402,403 provide good rejection of noise components at the TDMA pulsing rate which in this embodiment is approximately 200 Hz. The output of transistor 403 feeds the supply for the VCO 301 after the rejection of the power supply variation. The second path of the power supply signal is generated by power supply 407 for the bias signals of the buffer amplifier 302 and the VCO 301. The bias signal for the buffer amplifier 302 is created by the voltage divider involving resistor 405 and resistor 411. The bias signal for the VCO 301 is formed by a series of dividers including resistors 413, 415, 417 and 419. Capacitor 406 is added to provide in conjunction with resistor 405 an RC time constant to reject frequencies contained on the bias signals greater than 100 Hz so that the variance of the power supply 407 caused by the transmitter pulses will be properly damped for the bias input into the VCO 301, therefore, stabilizing the frequency output from the VCO 301 for proper operation within the radiotelephone system. In this embodiment capacitor 406 has a value of 4.7 uF and resistor 405 has a value of 560 Ohms.

FIG. 5A is an illustration of a frequency response of the power supply 407 running through resistor 405 which supplies the buffer amplifier 302 and the VCO 301 with their respective bias signals. This configuration has capacitor 406 removed from the circuit shown in FIG. 4. Notice that the frequency is approximately 3 dB down from its highest point at approximately 9 kHz. FIG. 5B is an illustration of the same supply signal from the power supply 407 to the bias signal of the buffer amplifier 302 and the VCO 301. In this configuration the capacitor 406 with a value of 4.7 uF was included in the circuit illustrated in FIG.4. Notice that the frequency 3 dB down from its maximum value at 503 is approximately 40 Hz and at the transmitter pulsing rate of 200 Hz 505 is approximately 20 dB down from its maximum value, thus, the addition of capacitor 406 gives an additional 20 dB of noise rejection at the transmitter pulse frequency.

What is claimed is:

Claims

1. A radiotelephone including an oscillator, the radiotelephone comprising:

means for generating power;

means, derived from said means for generating power, for supplying a bias signal to the oscillator; and

means for substantially diminishing audio frequency noise in said means for supplying said bias signal to the oscillator.

2. A radiotelephone in accordance with claim 1 wherein the radiotelephone further comprises:

a buffer amplifier;

means for supplying power from said means for generating power to the buffer amplifier;

means for supplying power to the oscillator derived from buffer amplifier power; and

means for diminishing audio frequency noise in said means for supplying power to the oscillator .

3. A radiotelephone in accordance with claim 1 wherein the oscillator comprises a voltage controlled oscillator.

4. A radiotelephone in accordance with claim 1 wherein said buffer amplifier comprises a double ended cascode amplifier.

5. A radiotelephone in accordance with claim 1 wherein the radiotelephone further comprises a time division multiple access (TDMA) radiotelephone.

6. A radiotelephone in accordance with claim 1 wherein said audio frequency noise is substantially less than 10 KHz.

7. An apparatus including a power supply and a transmitter, the transmitter pulsing at a predetermined frequency less than lOKHz which loads the power supply and causes a voltage variance at the predetermined frequency, the apparatus comprising:

a buffer amplifier;

means for supplying power to said buffer amplifier from the power supply;

an oscillator;

means for supplying a bias signal derived from the power supply to said oscillator and said buffer amplifier;

means, coupled to said buffer amplifier, for supplying power to said oscillator;

means for diminishing the voltage variance from said means for supplying a bias signal to said oscillator; and

means for diminishing the voltage variance from said means for supplying power to said oscillator.

8. An apparatus in accordance with claim 7 wherein said means for diminishing the voltage variance from said means for supplying said bias signal further comprises at least one resistor and at least one capacitor forming a network with a roll off frequency not exceeding 10 KHz contained on a first path within said buffer amplifier between the power supply and said oscillator.

9. An apparatus in accordance with claim 7 wherein said means for diminishing the voltage variance from said means for supplying power further comprises at least one transistor contained within said buffer amplifier on a second path between the power supply and said oscillator.

10. An apparatus in accordance with claim 8 wherein said at least one resistor and at least one capacitor further comprises one resistor having a first and a second end and one capacitor having a first and a second end, said first end of said resistor coupled to a first output of the power supply, said first end of said capacitor coupled to said second end of said resistor and to a first input of said oscillator, and said second end of said capacitor coupled to an electrical ground.