WO1991019205A1

WO1991019205A1 - Fault detection apparatus

Info

Publication number: WO1991019205A1
Application number: PCT/US1990/004752
Authority: WO
Inventors: Thomas J. Jonozzo; John C. Paine; Arthur Wild
Original assignee: Caterpillar Industrial Inc.
Priority date: 1990-06-04
Filing date: 1990-08-23
Publication date: 1991-12-12
Also published as: AU6288390A

Abstract

The present invention pertains to an apparatus (100) for determining a frame fault condition in an industrial lift truck. The apparatus (100) includes a microprocessor (110) for producing a clock signal. A charging circuit (115) receives the clock signal, responsively charges a first capacitor (120) to a voltage level determined by the frame resistance and produces a responsive capacitor voltage signal. A reference circuit (125) scales a voltage on the vehicle frame (101) and produces a frame voltage signal. A first comparator (195) receives the capacitor voltage signal and the frame voltage signal and compares the magnitude of the signals. If effective frame resistance is less than a predetermined level, then the capacitor voltage signal is greater than the frame voltage signal and the first comparator (195) produces a first command signal indicating a fault condition. The apparatus (100) continuously monitors the vehicle for a frame fault condition and operates without the need for adjustments.

Description

FAULT DETECTION APPARATUS

Technical Fj.eld

This invention relates generally to an apparatus for detecting a resistance between a vehicle battery terminal and a vehicle frame and, more particularly, to an apparatus for detecting the resistance between both the negative and positive battery terminals and the vehicle frame, and producing a command signal responsive to the resistance reaching a predetermined level.

Background Art

The power for a battery powered vehicle passes from a battery to various vehicle components through two cables, battery positive and battery negative. According to present-day practice the vehicle frame must be isolated and must not form any part of the power supply. Today the circuits of battery powered industrial vehicles and electric vehicles are deliberately isolated from the vehicle frame. Any leakage from the power supply to the metal frame is regarded as a frame fault.

One isolated frame fault is not harmful. The danger comes when a second fault occurs. Then there is a high probability that a return circuit is established so that a fault current flows. The danger is that the first fault goes undetected until the second fault occurs. This could result in uncontrolled operation of the vehicle or damage to the vehicle. For example, suppose that the positive line to the electric traction motor has inadvertently made contact with the vehicle frame. Nothing adverse happens. Then a maintenance engineer touches the metal battery box from the negative battery terminal with an hand tool. Immediately, there is a short circuit condition. This condition could cause damage to the battery, the motor, or the vehicle.

Recognizing that damage can result from frame fault conditions, manufactures have devised methods of detecting fault conditions. One approach is to use the fault current to trigger additional circuitry to disconnect the power supply from the vehicle. However, this method is not completely reliable, as fault current is not easily measured.

Therefore, manufactures have defined a new definition of a frame fault. A frame fault, according to the industry, is the resistance between the power supply and the vehicle frame, where this resistance is less than a predetermined value. In order to detect a frame fault, this resistance must be measured. One method of measuring the resistance of the battery to the vehicle frame is to do so manually. For instance, a multi-meter is used to measure the resistance between any part of the power supply wiring and the frame. However, using a manual approach, a fault could occur without the knowledge of the fault until it is measured by a maintenance engineer. This problem is overcome by continuous monitoring with the vehicle in action. This gives the operator a visual indication when any frame faults exists.

For example, one method for detecting frame faults continuously is to use the effective frame resistance in conjunction with a series of potentiometers, one connected across the battery, another connected between the negative battery terminal and the vehicle frame, and another connected between the positive battery terminal and the vehicle frame. Circuitry is used to detect the voltage on different points on the potentiometer across the battery. The voltage should be zero if the frame resistance is greater than a predetermined value indicating an absence of a fault.

The basic problem with this method is that potentiometers do not have a great degree of tolerance and are found to be inaccurate. Therefore, the potentiometers have to be adjusted constantly. Such failure to do so will result in failure of the detecting mechanism. Consequently, it is desirable to provide an accurate frame fault detection device that operates independently to any adjustments.

The present invention is directed to overcoming one or more of the problems as set forth above.

Disclosure of the Invention

In one aspect of the present invention an apparatus for detecting a resistance between a vehicle battery terminal and a vehicle frame and producing command signals in response to the frame resistance reaching a predetermined level is provided. The apparatus includes a timing circuit for producing a clock signal. A charging circuit receives the clock signal, responsively charges a first capacitor to a voltage level determined by the frame resistance and produces a responsive capacitor voltage signal. A reference circuit scales a voltage on the vehicle frame and produces a frame voltage signal. A logic device receives the capacitor voltage signal and the frame voltage signal, compares the magnitude of the signals and produces a first command signal in response to the compared signals. In another aspect of the present invention, a method for detecting a resistance between a vehicle battery terminal and a vehicle frame and producing a first command signal in response to the frame resistance reaching a predetermined level is provided. The method includes the steps of producing a clock signal, receiving the clock signal, responsively charging a first capacitor to a voltage level determined by the frame resistance and producing a responsive capacitor voltage signal, and scaling a voltage on the vehicle frame and producing a frame voltage signal. The capacitor voltage signal and the frame voltage signal are received and compared, and the first command signal is produced in response to the compared signals. The present invention provides an accurate fault detection apparatus that operates independently to any adjustments.

Brief Description of the Drawings For a better understanding of the present invention, reference may be made to the accompanying drawings, in which:

Fig. 1 is a schematic of an electrical circuit incorporating an embodiment of the present invention;

Fig. 2 is a schematic of an electrical circuit incorporating a second aspect of the embodiment of Fig. 1; and

Fig. 3 is a schematic of an electrical circuit incorporating an alternative embodiment of the circuit of Fig. 2.

Best Mode for Carrying Out the Invention

Fig. 1 depicts an apparatus 100 for detecting a resistance between a vehicle battery terminal and a vehicle frame 101. In the exemplary embodiment, the battery (not shown) is a heavy-duty storage battery having a nominal voltage of 48 volts for use in an industrial lift truck. A timing means 105 produces a clock signal. For example, the timing means 105 includes a programmed microprocessor 110, and the clock signal is incorporated within the microprocessor 110. Similarly, the timing means 105 could include any type of device that produces a waveform such as a crystal oscillator, which is well known in the art. A charging circuit means 115 receives the clock signal, responsively charges a charging capacitor 120 to a voltage level determined by the frame resistance and produces a responsive capacitor voltage signal. A reference means 125 scales a voltage on the vehicle frame 101 and produces a frame voltage signal. A logic means 130 receives the capacitor voltage signal and the frame voltage signal, compares the magnitude of the signals and produces a first command signal in response to the compared signals. A discharging circuit means 135 receives the clock signal and responsively discharges the charging capacitor 120.

The charging capacitor 120 is connected between the vehicle frame 101 and ground. The discharging circuit means 135 includes an inverter means 140 for receiving the clock signal and producing an inverted signal, and a first semiconductor switch 145. More particularly, the first semiconductor switch 145 is of a conventional npn type construction and is similar to that supplied by Motorola as part number MPSA42. The first semiconductor switch 145 has a base connected to an output terminal of the inverter means 140 through a first base resistor 150 and is adapted to receive the inverted signal, a collector connected to the charging capacitor 120 through a discharging resistor 155, and an emitter connected to ground. The inverter means 140 is a comparator, designed to invert the clock signal in a manner that is well known in the art. In the preferred embodiment all of the comparators discussed are contained in a quad package, are open collector circuits with a 1 Kilo ohm resistor connected from the collector to a 15 volt power supply, and are of construction similar to that supplied by Motorola as part number LM 239. The comparators construction will not be discussed any further.

The charging circuit means 115 includes a second semiconductor switch 160, which is of a construction similar to that of the first semiconductor switch 145, with a base connected to the timing means 105 through a second base resistor 165 and adapted to receive the clock signal, a collector connected to the vehicle frame 101 through a pair of series connected resistors 170, and an emitter connected to ground. A biasing resistor 175 is also connected to the base of the second semiconductor switch 160 and to ground. The charging circuit means 115 also includes a third semiconductor switch 180. More particularly, the third semiconductor switch 180 is of a conventional pnp type construction and is similar to that supplied by Motorola as part number MPSA92. The third semiconductor switch 180 has a base connected between the pair of series connected resistors 170, a collector connected to the charging capacitor 120, and an emitter connected to the vehicle frame 101. A short circuit resistor 181 is connected between the collector of the third semiconductor switch 180 and the charging capacitor 120. The reference means 125 includes a first reference resistor 185 connected from the vehicle frame 101 through a first diode 190 and in series through a second reference resistor 191 to ground, and a reference capacitor 192 connected in parallel with the second reference resistor 191. A pull-up resistor 193 is connected between a power supply 194 and the reference capacitor 192. Preferably, the pull-up resistor 193 has a one million ohm value selected as to not interfere with normal operation. Typically, the power supply 194 is of conventional construction and is used primarily for suppling energy to the integrated circuits.

The logic means 130 includes a first comparator 195. The first comparator 195 has a first input terminal adapted to receive the frame voltage signal, a second input terminal adapted to receive the capacitor voltage signal, and an output terminal adapted to produce the first command signal. The first input terminal is a negative input terminal and is connected to the junction between the reference capacitor 192 and the pull-up resistor 193. The second input terminal is a positive input terminal and is connected to the junction between the charging capacitor 120 and the short circuit resistor 181 through a overload resistor 196. A clipping diode 197 is connected between the power supply 194 and the positive input terminal in a normally reverse biased manner. In Fig. 2, a circuit 200 for detecting a resistance between a vehicle battery negative terminal and the vehicle frame 101 is shown. An oscillating means 201 produces a regulating signal. In the preferred embodiment, the oscillating means 201 is a crystal oscillator; however, the oscillating means 201 can assume an alternative embodiment such as a microprocessor. A first circuit means 205 produces a negative voltage signal in response to detecting a voltage less than a predetermined value on the frame 101. A second circuit means 210 produces a reference voltage signal. A comparing means 215 receives the negative voltage signal and the reference voltage signal, compares the magnitude of the signals and produces a second command signal in response to the compared signals.

The comparing means 215 includes a second comparator 220 with a first input terminal, which is the negative input terminal, adapted to receive the negative voltage signal, a second input terminal, which is the positive input terminal, adapted to receive the reference voltage signal, and an output terminal adapted to produce the second command signal.

The first circuit means 205 includes a blocking diode 225 with a cathode connected to the vehicle frame 101 and an anode connected to the negative terminal of the second comparator 220, and a scaling resistor 230 connected between the first terminal and a voltage source 235.

The first circuit means 205 further includes a switching means 237 for connecting and disconnecting the voltage source 235 to the scaling resistor 230, responsive to the regulating signal. In the preferred embodiment, the switching means 237 is a pnp semiconductor switch similar to that supplied by Motorola as part number 2N3906.

The switching means 237 is connected between the voltage source 235 and the scaling resistor 230 and has an input terminal connected to the oscillating means 201 adapted to receive the regulating signal. The second circuit means 210 includes a voltage divider 240 connected between the voltage source 235 and the positive terminal of the second comparator 220. An alternative embodiment 200" of the circuit 200 is depicted in Fig. 3. In the comparing means 215' the second comparator 220 is replaced by a NAND gate 305 with a first input terminal adapted to receive the negative voltage signal, a second input terminal adapted to receive the reference voltage signal, and an output terminal adapted to produce the second command signal. For example, the NAND gate 305 is similar to that supplied by Motorola as part number 4011. The first circuit means 205" includes a blocking diode 225 with a cathode connected to the vehicle frame 101 and an anode connected to the first terminal of the NAND gate 305, and a scaling resistor 230 connected between the first terminal and the voltage source 235.

The first circuit means 205' further includes the switching means 237 for connecting and disconnecting the voltage source 235 to the scaling resistor 230, responsive to the regulating signal. The switching means 237 is connected between the voltage source 235 and the scaling resistor 230 and has an input terminal connected to the oscillating means 201 adapted to receive the regulating signal. The second circuit means 210" includes the voltage source 235 connected to the second input terminal through the switching means 237. Industrial Applicability

Operation of the apparatus 100 is best described in conjunction with its use in a typical industrial vehicle such as an electrical lift truck. In a typical power supply circuit, the battery provides a substantially continuous supply of direct current to the rest of the circuit with no leakage or more particularly no frame fault conditions. A frame fault condition arises when the resistance from either terminal of the power supply or battery to the vehicle frame 101 is less than a predetermined value. The purpose of the instant invention is to detect when this resistance is less than a predetermined value. The operation of the apparatus 100 is as follows.

The microprocessor 110 produces a clock signal with a predetermined duty cycle. The base of the second semiconductor switch 160 receives the clock signal. A ^,,high^M pulse turns "on" the second semiconductor switch 160 and the current received by the switch is limited by the first base resistor 165. The gain of the second semiconductor switch 160 produces a collector current which responsively produces a base current in the third semiconductor switch 180, driving it into saturation. Responsively, the charging capacitor 120 charges by the vehicle frame's voltage through the effective frame resistance. A short circuit resistor 181 is included for short circuit protection in the event that the frame resistance is very small. After the charging capacitor 120 has charged for a predetermined amount of time responsive to the "high" pulse of the clock signal, the microprocessor 110 produces a "low" signal. This "low" signal is received by the base of the second semiconductor switch 160 and stops conducting. Additionally, the third semiconductor switch 180 stops conducting and the charging capacitor 120 stops charging. The "low" pulse is also received by the inverter means 140 which responsively inverts the "low" pulse producing a "high" pulse. The base of the first semiconductor switch 145 receives the "high" signal and turns "on" the first semiconductor switch 145. Accordingly, the charging capacitor 120 discharges through the discharging resistor 155 and the first semiconductor switch 145 to ground for a preselected time period determined by the microprocessor 110.

Typically, the duty cycle of the clock signal is such that the majority of the time the charging capacitor 120 is not charging and the frame voltage remains at its normal level. Assuming that the frame voltage is greater than one volt, the first diode 190 conducts. The first and second reference resistors 185,191 act as voltage dividers. The voltage on the reference capacitor 192 is the same as across the second reference resistor 191. This particular voltage is a predetermined ratio of the actual frame voltage. When the charging circuit 115 initiates the charging capacitor 120 to start charging, the apparent frame voltage drops to a very low level due to the charging capacitor 120 draining a high level of current. At this point, the reference capacitor 192 remains charged to the preselected ratio of the original frame voltage due to the first diode 190 being reversed biased and the reference capacitor 192 holding the proper reference.

The negative terminal of the first comparator 195 receives the voltage stored on the reference capacitor 192; additionally, the positive terminal receives the voltage stored on the charging capacitor 120. The overload resistor 196 and the clipping diode 197 are used to protect the first comparator 195 from high voltage conditions. If the voltage of the charging capacitor 120 is greater than the power supply 194, the clipping diode 197 conducts and keeps the positive input at a preselected level. Since it is possible to obtain a frame voltage of nearly 100 volts which results in damage to most integrated circuits, the operating voltages for the circuits are reduced to approximately 15 volts.

The pull-up resistor 193 is included in the reference means 125 to provide a sufficient amount of voltage to the negative terminal of the first comparator 195 to prevent false readings in the event that the frame voltage is very low. For example, if the frame voltage is less than one volt, then essentially no voltage appears on the positive terminal of the first comparator 195. In this case, the pull-up resistor 193 is used to deliver a small voltage to the negative terminal of the first comparator 195 to avoid false indications.

During a frame fault condition, the effective frame resistance is less than a predetermined value. Since the charging rate of the charging capacitor 120 is based on the clock signal, the duty cycle is such that the charging capacitor 120 charges to a level of potential greater than the potential across the reference capacitor 192 if the frame resistance is less than a predetermined value. For example, the duty cycle of the clock signal is based on the theory that given a particular RC time constant, a capacitor charges to the same percentage of its final voltage in the same amount of time assuming that this capacitor always starts with a negligible charge. Therefore, the charging capacitor -13-

120 should charge to a particular percentage value of the frame voltage in a particular amount of time if the effective frame resistance is at a predetermined value. Consequently, the microprocessor 110 is programmed to allow the clock signal's duty cycle to charge the charging capacitor 120 through the charging circuit 115 for a predetermined amount of time allowing the charging capacitor 120 to charge to a predetermined value of the frame voltage - assuming that the frame resistance is at a predetermined value.

Meanwhile, the charging capacitor 120 produces a capacitor voltage signal which is delivered to the first comparator 195 which compares the capacitor voltage signal to the frame voltage signal produced by the reference capacitor 192. If the frame resistance is less than a predetermined value signifying a frame fault, then the charging capacitor 120 charges to a voltage level greater than the reference capacitor 192, wherein the first comparator 195 produces a command signal. Alternately, if the frame resistance is greater than a predetermined value, then the charging capacitor 120 charges to a voltage level less than the reference voltage, indicating the absence of a fault condition. At the end of the charging cycle, the microprocessor 110 disables the charging circuit 115 and enables the discharging circuit 135. The charging capacitor 120 discharges for a preselected amount of time allowing it to completely discharge to a negligible level.

The embodiment shown in Fig. 1 is useful if the frame voltage is greater than a predetermined level. If the voltage on the frame is less than a predetermined level then the second aspect of the embodiment contained in Fig. 2 is used. The operation of the circuit 200 is as follows. The oscillating means 201 produces a regulating signal with a predetermined duty cycle. The switching means 237 receives the regulating signal. A "low" pulse enables the switching means 237 and responsively connects the voltage source 235 to the first circuit means 205 and the second circuit means 210. A "high" pulse disables the switching means 237 and responsively disconnects the voltage source 235 from the first circuit means 205 and the second circuit means 210. This allows the vehicle frame 101 to be electrically isolated from the circuit 200 for a preselected period of time responsive to the duty cycle.

When the regulating pulse is "low", the first circuit means 205 simply uses the effective frame resistance as the bottom portion of a voltage divider. The divided voltage is delivered onto the negative terminal of the second comparator 220. The positive terminal has a preselected value on it as determined by the voltage divider 240. The blocking diode 225 is included in the first circuit means 205 to isolate the apparatus 200 if the frame voltage is greater than a predetermined value.

If the frame resistance is less than a predetermined value, then the voltage on the negative terminal is less than the voltage on the positive terminal. Therefore, the second comparator 220 responsively produces a second command signal indicating that a frame fault has occurred. If the frame resistance is greater than a predetermined value then the negative input is greater than the positive input terminal indicating the absence of a fault condition.

Fig. 3 functions in a similar manner to the circuit 200 contained in Fig 2. The main difference is that the second comparator 220 is replaced by the NAND gate 305. Therefore, the first circuit means 205' simply uses the effective frame resistance as the bottom portion of a voltage divider. The divided voltage is delivered onto the first terminal of the NAND gate 305. The second terminal has a preselected value on it as determined by the voltage source 235. The blocking diode 225 is included in the first circuit means 205' to isolate the circuit 200' if the frame voltage is greater than a predetermined value.

If the frame resistance is less than a predetermined value, then the first input terminal obtains a "logic low" voltage value contrasting to the "logic high" voltage value on the second input terminal. Due to the NAND gate's 305 inherent switching level, the NAND gate 305 responsively produces a second command signal indicating that a frame fault has occurred. If the frame resistance is greater than a predetermined value, then the first input terminal corresponds to the same "logic high" voltage value as the second input terminal, indicating the absence of a fault condition.

Other aspects, objects, advantages, and uses of this invention can be obtained from a study of the drawings, the disclosure, and the appended claims.

Claims

1. An apparatus (100) for detecting a resistance between a vehicle battery terminal and a vehicle frame (101) and producing command signals in response to the frame resistance reaching a predetermined level, comprising: timing means (105) for producing a clock signal; charging circuit means (115) for receiving said clock signal, responsively charging a charging capacitor (120) to a voltage level determined by said frame resistance and producing a responsive capacitor voltage signal; reference means (125) for scaling a voltage on said vehicle frame (101) and producing a frame voltage signal; and logic means (130) for receiving said capacitor voltage signal and said frame voltage signal, comparing the magnitude of said signals and producing a first command signal in response to said compared signals.

2. An apparatus (100) as set forth in claim l, including a discharging circuit means (135) for receiving said clock signal and responsively discharging said charging capacitor (120) .

3. An apparatus (100), as set forth in claim 2, wherein said charging capacitor (120) is connected between said vehicle frame (101) and ground, and said discharging circuit means (135) includes an inverter means (140) for receiving said clock signal and producing an inverted signal, and a first semiconductor switch (145) having a base connected to an output terminal of said inverter means (140) and adapted to receive said inverted signal, a collector connected to said charging capacitor (120) through a discharging resistor (155) , and an emitter connected to ground.

4. An apparatus (100), as set forth in claim 1, wherein said charging circuit means (115) includes a second semiconductor switch (160) having a base connected to said timing means (105) and adapted to receive said clock signal, a collector connected to said vehicle frame (101) through a pair of series connected resistors (170) , and an emitter connected to ground, and a third semiconductor switch (180) having a base connected between said pair of series connected resistors (170) , a collector connected to said charging capacitor (120) , and an emitter connected to said vehicle frame (101) .

5. An apparatus (100), as set forth in claim 1, wherein said reference means (125) includes a first reference resistor (185) connected from said vehicle frame (101) in series through a second reference resistor (191) to ground, and a reference capacitor (192) connected in parallel with said second reference resistor (191) .

6. An apparatus (100), as set forth in claim 1, wherein said logic means (130) includes a first comparator (195) , said first comparator (195) having a first input terminal adapted to receive said frame voltage signal, a second input terminal adapted to receive said capacitor voltage signal, and an output terminal adapted to produce said first command signal. -18-

7. An apparatus (100) , as set forth in claim 1, wherein the duty cycle of said clock signal is such that said capacitor voltage signal is greater than said frame voltage signal when said frame resistance is less than a predetermined value.

8. An apparatus (100), as set forth in claim 1, wherein the duty cycle of said clock signal is such that said capacitor voltage signal is less than said frame voltage signal when said frame resistance is greater than a predetermined value.

9. An apparatus (100), as set forth in claim 1, including: oscillating means (201) for producing a regulating signal; first circuit means (205, 205') for producing a negative voltage signal in response to detecting a voltage less than a predetermined value on said frame; second circuit means (210, 210') for producing a reference voltage signal; and comparing means (215, 215') for receiving said negative voltage signal and said reference voltage signal, comparing the magnitude of said signals and producing a second command signal in response to said compared signals.

10. An apparatus (100) , as set forth in claim 9, wherein said comparing means (215, 215') includes a first input terminal adapted to receive said negative voltage signal, a second input terminal adapted to receive said reference voltage signal, and an output terminal adapted to produce said second command signal.

11. An apparatus (100) , as set forth in claim 9, wherein said first circuit means (205, 205') includes a blocking diode (225) having a cathode connected to said vehicle frame (101) and an anode connected to said first terminal of said comparing means (215) , and a scaling resistor (230) connected between said first terminal and a voltage source (235) .

12. An apparatus (100), as set forth in claim 11, wherein said first circuit means (205) further includes a switching means (237) for connecting and disconnecting said voltage source (235) to said scaling resistor (230) responsive to said regulating signal.

13. An apparatus (100), as set forth in claim 12, wherein said switching means (237) is connected between said voltage source (235) and said scaling resistor (230) and has an input terminal connected to said oscillating means (201) adapted to receive said regulating signal.

14. An apparatus (100), as set forth in claim 9, wherein said second circuit means (210) includes a voltage divider (240) connected between said voltage source (235) and said second terminal of said comparing means (215, 215').

15. An apparatus (100), as set forth in claim 9, wherein said negative voltage signal is less than said reference signal when said frame resistance is less than a predetermined level. -20-

16. An apparatus (100), as set forth in claim 9, wherein said negative voltage signal is greater than said reference signal when said frame resistance is greater than a predetermined level.

17. A method for detecting a resistance between a vehicle battery terminal and a vehicle frame (101) and producing a first command signal in response to the frame resistance reaching a predetermined level, comprising the steps of: producing a clock signal; receiving said clock signal, responsively charging a charging capacitor (120) to a voltage level determined by said frame resistance and producing a responsive capacitor voltage signal; scaling a voltage on said vehicle frame (101) and producing a frame voltage signal; and receiving said capacitor voltage signal and said frame voltage signal, comparing the magnitude of said signals and producing said first command signal in response to said compared signals.

18. A method as set forth in claim 17, further including the step of: receiving said clock signal and responsively discharging said charging capacitor (120) .