WO1990009089A1 - A method of manufacturing a substrate for placement of electrical and/or electronic components - Google Patents
A method of manufacturing a substrate for placement of electrical and/or electronic components Download PDFInfo
- Publication number
- WO1990009089A1 WO1990009089A1 PCT/NO1990/000021 NO9000021W WO9009089A1 WO 1990009089 A1 WO1990009089 A1 WO 1990009089A1 NO 9000021 W NO9000021 W NO 9000021W WO 9009089 A1 WO9009089 A1 WO 9009089A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- dielectric layer
- substrate
- coating
- electrical
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/025—Abrading, e.g. grinding or sand blasting
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1147—Sealing or impregnating, e.g. of pores
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1333—Deposition techniques, e.g. coating
- H05K2203/1344—Spraying small metal particles or droplets of molten metal
Definitions
- the invention relates to a method of manufacturing a substrate for placement of electrical and/or electronic components in accordance with the preamble of claim 1.
- the method according to the present invention concerns the manufacturing of substrates with good thermal and mechanical properties and especially suited for use in hybrid modules for power electronics.
- a substrate of the above-mentioned type has the same function as a printed circuit board.
- Common printed circuit board for placement of electronic components are usually manufactured of an epoxy material on which is provided a predetermined electrical conducting pattern by means of electroplating.
- the conducting pattern is usually provided on both sides of the board and the electrical conducting connection between the conducting patterns on each side is provided by through-plated holes in the epoxy sub ⁇ strate.
- Such circuit boards are however best suited in electronic equipment where low voltages and small currents are used and the equipment further is not subjected to mechanical and thermal loads in any degree worth mentioning.
- Substrates for use in electrical engineering or electronics where high voltages and large currents are used and where the equipment further may be subjected to large mechanical and thermal loads are often based on the use of a metallic substrate, for instance in form of a sheet of steel and aluminium in order to achieve good thermal conduction and sufficient mechanical strength.
- Electrical isolation between the conducting pattern and the metal substrate is provided by coating with an isolating layer, for instance in the form of a enamel coating, alumina coating or combination of oxides, nitrides of carbonitrides.
- the isolation layer may also be generated by applying an epoxy resin layer to the metal substrate.
- the eletrical isolating layer may be applied on both sides of the metal substrate or only on one side, something which is common if the substrate for instance will be used in modules of power electronics, as the metal substrate in that case usually is provided with or forms cooling ribs on the other sides in order to transport heat away.
- the electrical isolated layer are provided with an electrical conduction pattern or current leads by means of different processes, for instance by chemical methods or by vapour deposition. Examples of circuit boards of this type are for instance disclosed in DE-PS 3447520 and DE-OS 2556826.
- GB-PS 2110475A there is further known the use of a substrate in the form of an alloy of Fe, Cr, Al and Yt where a ceramic surface layer is formed by the substrate being heated in an oxidizing atmosphere.
- the object of the present invention is thus to surmount the above-mentioned and other disadvantages, as the present invention provides a method for the manufaturing of substrates charaterized by high mechanical and dielectrical strength and well suited to sustain great thermal loads which possibly the same process may be used for coating a base, preferably of a metalic material, with both the electrical isolating and con ⁇ ducting layers.
- Fig. 1 shows a section of a substrate according to prior art.
- Fig. 2 shows schematically a plasma spray gun used with the method according to the present invention.
- Fig. 3 shows a section of a substrate manufactured according to the method of the present invention.
- Fig. 4 shows the application of an electrical conducting layer in the form of a conducting pattern.
- Fig. 5 shows in perspective and with partly exposed substrate a completed, mounted hybride module for power electronics.
- Fig. 1 there are shown a substrate according to prior art and with a transistor contact deployed on the conducting layer by means of a conducting adhesive or soldering. Many different layers which make up the substrate are applied by means of different processes and the isolation layer is for instance glued to the base, while the heat sink or the cooling body is a separate component.
- the thermal coating process used in the following example is plasma spraying.
- the base which may be a metal sheet, preferably of steel, aluminium or copper, is cleaned or degreased on that side of the surface which is to be coated with the isolating layer by being sprayed with the trichlorethen, aceton or the like. Then the surface is sandblasted in a first process step with alumina (AI2O3) , for instance "Metcolite” with grain size of 0,2-0,8um.
- alumina AI2O3
- Metalcolite with grain size of 0,2-0,8um.
- the process parameters used in this step may for instance be:
- the sandblasted surface must immediately thereafter be cleaned of dust by blasting with completely dry and greasefree compressed air or nitrogen gas.
- the surface is coated by a bonding layer by means of plasma spraying.
- the objective of the bonding layer is to function as a carrier for the ceramic layer which constitutes the dielectric coating.
- the bonding layer is preferably made of copper powder of the type PT2901, Metco 56 or the like.
- the cupper powder are sprayed in a plasma process with the use of plasma gun of the type that is shown schematically in Fig. 2.
- the substrate i.e. the work piece, or the pistol is moved with a velocity of 1 m/s.
- the plasma spray gun are continuously moved in a direction at right angle to the substrate with a speed of 5 mm pro pass.
- the bonding layer are applied to a thickness of 0,05-0,15 mm, the applied thickness in each pass being 15 ⁇ .
- the parameters used in this process step are:
- a dielectric layer of ceramic material is now applied in a consecutive process step immediately after the application of the bonding layer.
- the cermaic layer consists of an alumina alternatively mixed with 25% zirconia.
- the grain size is typically 10-110 urn, for instance by use of Metco 105 SFP. If the ceramic layer are spray coated with a metal layer, a composition of 25% by weight zirconia (Zr ⁇ 2) is used.
- the parameters used in this process step are:
- the temperature of the substrate must be between 50-150°C. This is easily achieved by the substrate being force-cooled with air.
- the ceramic layer is impregnated in order to achieve the desired dielectrical properties.
- the substrate temperature is below 50°C, but above the room temperature silicone oil, preferably of the type Baysilone 100 is applied with a suitable tool as a brush, spray gun etc. , to form a visible, shiny film which can be seen all over the surface.
- a suitable tool as a brush, spray gun etc.
- the silicon oil is absorbed into the ceramic layer, while excess silicon oil are removed from the surface for instance by use of a moisture absorbent, porous paper. This paper is pressed two to five times against the surface, so that in the end there are no visible silicon oil to be found.
- the dieletctric layer now is coated with a conducting pattern or a current lead pattern of copper and this must take place withn one hour after the plasma spraying of the ceramic material.
- a desired conducting pattern is achieved by plasma spraying a copper powder through a template of stainless steel in the form of a sheet of 2 to 3 mm thickness, wherein the desired conducting pattern beforehand has been cut by means of a laser. It is to be understood that the conducting pattern is determined by the electrical function to be realized by use of a substrate. The distance between the template and the ceramic layer must be between 0,5 and 1 mm.
- the substrate with the ceramic coating are preheated by means of plasma to about 50°C by using the same plasma gun which was used for spraying.
- the same copper powder is used for the conducting pattern, i»e.
- the electrical conducting layer as for the bonding layer, i.e. PT 2901, Metco 56 or the like.
- the parameters for the spraying velocity and the vertical feed are also the same as for the binding layer.
- the parameters used in this process step are: Current strength 300-500 A Voltage 50-65 V Distance 150 mm Argon gas feed 50-70 1/min Hydrogen gas feed 5 1/min Powder feed 50 g/min Passage thickness 0,05-0,15 mm Layer thickness 0, 1-1 mm
- the copper layer may be sprayed to the desired dimension or with an 0,1 mm excess.
- the layer are smoothed or made plane by grinding, milling or comparable processes.
- the substrate now shall be cleaned, as possible copper dust is removed. This is done by blasting with small glas spheres in a separate chamber in order to avoid silicon pollution of the conducting pattern. Care must be taken in this process, where the parameters used are:
- a substrate that is very well suited for use in the production of for instance hybride modules for power electronics is provided, but which also may be employed generally in electronics where substrates of high mechanical strength and excellent thermal and di ⁇ electric properties are desired. Further such substrates may be used in non-traditional applications in eletrical engineering and in that connection possibly included as an integrated part of a more comprehensive electronic and mechanical equipment.
- the metallic base may then for instance be a part of the construction itself and coated with the dielectric layer by means of plasma spraying in situ for later placement of electrical or electronic components.
- a substrate manufactured as specified above is very well suited for use in an automatic production process for the manufacturing of miniaturized hybrid circuit modules in the form of ready made packages.
- the achieved reduction of costs in this connection amounts to about 20% relative to traditional mounting methods and results by the manufacturing of a circuit package in a volume reduction of up to 70%.
- the manufacturing method is also well suited in the production of custom specified circuits and offers good possibilities for a possible optimization of the circuit module, while the specific demands for mechanical and thermal properties may be achieved. It has thus been shown that the method is well suited to small production volumes with a frequent change of the circuit pattern, as the initial costs are low.
- thermal coating process e.g. plasma spraying or jet coating.
- thermal coating processes in the mechanical industry for instance for coating metals with wear resistant coatings of ceramic material.
- the coating there may as stated be used different thermal processes. It has shown to be particularly advantageous to use plasma spraying for applying the ceramic coating. It is then formed a ceramic coating with 5% pore volume and 5% oxide (volume) . It is however desired that the conducting coating which cannot be impregnated, has greater density and lower oxide content. This is advantageously achieved by the con ⁇ ducting layer being applied by means of jet coating, for instance of the type Metco "Diamondjet" which produces a conducting layer with only 2% pore volume and 2% oxide volume. Moreover it will be obvious that by jet coating, where high speed jet combustion gases from the combustion of for instance propane are used, the parameters of current strength, voltage and gas feed given in the relevant process example do not apply.
- a substrate with a thermal resistance of 0,6°C/W (computed) , when a 10 mm base of aluminiumsheet is used, a volume resistivity of 25.10 12 ohm/m 2 with a thickness of the ceramic layer of 0,3 mm, a dielectric strength of 3000 V for the same thickness of the ceramic layer and an electrical conductivity of the plasma sprayed copper layer of 40 to 50% to that of pure copper, but which is 1000 times greater than the conductivity of a thickfilm paste.
- thermal process in the application of the ceramic coating has shown to be very well compatible with different base materials and when a thermal coating process also are used for applying conducting patterns, it may easily be integrated with various technologies and methods for the mounting of components.
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Inorganic Chemistry (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Coating By Spraying Or Casting (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2503026A JPH0758831B2 (en) | 1989-01-30 | 1990-01-30 | Method for manufacturing a substrate for electrical and / or electronic component placement |
AT90902852T ATE94016T1 (en) | 1989-01-30 | 1990-01-30 | PROCESS FOR MANUFACTURING A CARRIER FOR EQUIPMENT WITH ELECTRICAL AND/OR ELECTRONIC COMPONENTS. |
FI913562A FI913562A0 (en) | 1989-01-30 | 1991-07-25 | FOERFARANDE FOER FRAMSTAELLNING AV UNDERLAG FOER PLACERING AV ELEKTRISKA- OCH / ELLER ELEKTRONISKA KOMPONENTER. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NO890377 | 1989-01-30 | ||
NO890377A NO169570C (en) | 1989-01-30 | 1989-01-30 | PROCEDURE FOR MANUFACTURING SUBSTRATE FOR APPLICATION OF ELECTRICAL AND / OR ELECTRONIC COMPONENTS. |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1990009089A1 true WO1990009089A1 (en) | 1990-08-09 |
Family
ID=19891677
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/NO1990/000021 WO1990009089A1 (en) | 1989-01-30 | 1990-01-30 | A method of manufacturing a substrate for placement of electrical and/or electronic components |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP0455714B1 (en) |
JP (1) | JPH0758831B2 (en) |
CA (1) | CA2046615C (en) |
DE (1) | DE69003092T2 (en) |
FI (1) | FI913562A0 (en) |
NO (1) | NO169570C (en) |
WO (1) | WO1990009089A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140076525A1 (en) * | 2011-02-15 | 2014-03-20 | Andy Mantey | Temperature-control element and method for attaching an electronic component to the temperature-control element |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NO301915B1 (en) * | 1996-09-03 | 1997-12-22 | Svein Hestevik | commutator |
DE10331208A1 (en) * | 2003-07-10 | 2005-02-10 | Newspray Gmbh | Method for securing electric or electronic components, generating waste heat, to cooler of aluminum, or its alloy, with cooler enameled, at least in fastening region of components, |
DE102004058806B4 (en) * | 2004-12-07 | 2013-09-05 | Robert Bosch Gmbh | A method of fabricating circuit patterns on a heat sink and circuit structure on a heat sink |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4294009A (en) * | 1978-06-29 | 1981-10-13 | Le Material Telephonique | Method of manufacturing a hybrid integrated circuit |
EP0048992A2 (en) * | 1980-09-30 | 1982-04-07 | Kabushiki Kaisha Toshiba | Printed circuit board and method for fabricating the same |
SE437207B (en) * | 1983-12-13 | 1985-02-11 | Rolf Dahlberg | SAMPLE CARD WITH BEARING STRAIGHT IN THE FORM OF THERMAL DERIVATIVE METAL PLATE |
DE3527967A1 (en) * | 1985-08-03 | 1987-02-05 | Standard Elektrik Lorenz Ag | Method for the fabrication of printed-circuit boards |
DE3625087A1 (en) * | 1986-07-24 | 1988-01-28 | Ego Elektro Blanc & Fischer | ELECTRIC COMPONENT |
DE3641202A1 (en) * | 1986-12-03 | 1988-06-16 | Standard Elektrik Lorenz Ag | METAL CORE BOARD AS A CARRIER FOR HF AND MICROWAVE CIRCUITS |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5835375A (en) * | 1981-08-25 | 1983-03-02 | ホステルト・フオトマタ・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツンク | Drier |
JPS5835376A (en) * | 1981-08-26 | 1983-03-02 | 東海高熱工業株式会社 | Energy conservation type continuous heat treatment furnace |
JPS5835374A (en) * | 1981-08-28 | 1983-03-02 | 株式会社日立製作所 | Drier |
DE3335184A1 (en) * | 1983-09-28 | 1985-04-04 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PRODUCING SEMICONDUCTOR COMPONENTS |
-
1989
- 1989-01-30 NO NO890377A patent/NO169570C/en unknown
-
1990
- 1990-01-30 DE DE90902852T patent/DE69003092T2/en not_active Expired - Fee Related
- 1990-01-30 CA CA002046615A patent/CA2046615C/en not_active Expired - Fee Related
- 1990-01-30 EP EP90902852A patent/EP0455714B1/en not_active Expired - Lifetime
- 1990-01-30 WO PCT/NO1990/000021 patent/WO1990009089A1/en active IP Right Grant
- 1990-01-30 JP JP2503026A patent/JPH0758831B2/en not_active Expired - Lifetime
-
1991
- 1991-07-25 FI FI913562A patent/FI913562A0/en not_active Application Discontinuation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4294009A (en) * | 1978-06-29 | 1981-10-13 | Le Material Telephonique | Method of manufacturing a hybrid integrated circuit |
EP0048992A2 (en) * | 1980-09-30 | 1982-04-07 | Kabushiki Kaisha Toshiba | Printed circuit board and method for fabricating the same |
SE437207B (en) * | 1983-12-13 | 1985-02-11 | Rolf Dahlberg | SAMPLE CARD WITH BEARING STRAIGHT IN THE FORM OF THERMAL DERIVATIVE METAL PLATE |
DE3527967A1 (en) * | 1985-08-03 | 1987-02-05 | Standard Elektrik Lorenz Ag | Method for the fabrication of printed-circuit boards |
DE3625087A1 (en) * | 1986-07-24 | 1988-01-28 | Ego Elektro Blanc & Fischer | ELECTRIC COMPONENT |
DE3641202A1 (en) * | 1986-12-03 | 1988-06-16 | Standard Elektrik Lorenz Ag | METAL CORE BOARD AS A CARRIER FOR HF AND MICROWAVE CIRCUITS |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140076525A1 (en) * | 2011-02-15 | 2014-03-20 | Andy Mantey | Temperature-control element and method for attaching an electronic component to the temperature-control element |
Also Published As
Publication number | Publication date |
---|---|
EP0455714A1 (en) | 1991-11-13 |
CA2046615A1 (en) | 1990-07-31 |
NO169570C (en) | 1992-07-08 |
CA2046615C (en) | 1996-04-02 |
DE69003092T2 (en) | 1994-02-03 |
NO169570B (en) | 1992-03-30 |
EP0455714B1 (en) | 1993-09-01 |
NO890377D0 (en) | 1989-01-30 |
JPH0758831B2 (en) | 1995-06-21 |
NO890377L (en) | 1990-07-31 |
JPH04500584A (en) | 1992-01-30 |
FI913562A0 (en) | 1991-07-25 |
DE69003092D1 (en) | 1993-10-07 |
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