WO1990004266A1

WO1990004266A1 - Transistor devices

Info

Publication number: WO1990004266A1
Application number: PCT/GB1989/001178
Authority: WO
Inventors: Willem Jacobus Perold
Original assignee: The General Electric Company, Plc
Priority date: 1988-10-05
Filing date: 1989-10-04
Publication date: 1990-04-19
Also published as: GB8823399D0; GB2227388A; JPH03501911A; EP0400110A1

Abstract

A superconducting transistor of the Gray type comprises first and second superconducting layers (1, 2) which form the emitter and base electrodes, respectively. Those layers have substantially the same bandgap. A first insulating layer (4) is sandwiched between the first and second superconducting layers. A third superconducting layer (3), forming the collector electrode, is separated from the second superconducting layer by a second insulation layer (5). The insulating layers are sufficiently thin for tunnelling to take place therethrough. In a conventional Gray transistor the bandgap of the collector layer is the same as that of the emitter and base layers, and it is found that in such a transistor the current gain decreases sharply as the operating temperature of the device increases. In the present invention the collector layer is formed of a material having a larger bandgap than the emitter and base layers. A set of current gain/temperature characteristics having substantially flat regions is thereby obtained.

Description

Transistor Devices

This invention relates to transistor devices, and particularly to transistors formed of superconducting materials.

One of the first three-terminal superconducting devices to be devised was the Gray transistor. Figure 1 of the accompanying drawings shows, schematically, the configuration of such a transistor. It comprises three layers 1, 2 and 3 of aluminium with layers 4 and 5 of aluminium oxide between the layers 1 and 2, and 2 and 3, respectively. The layers 1, 2 and 3 will be called emitter, base and collector electrodes, by analogy with junction transistors.

A problem arises with the known transistors of the Gray type. As the operating temperature of the device increases, the current gain decreases sharply. Figure 2 of the drawings illustrates an example of a device exhibiting this phenomenon. The curves A, B, C and D show current gain against temperature (in ), each curve being plotted for a respective collector bias voltage which is different from that of the other curves. It will be seen that for each curve the value of current gain decreases with increase in temperature throughout the whole operating range of 0.625 to 1.0K.

It is an object of the present invention to provide a Gray-type superconducting transistor configuration in which the current gain remains at least approximately constant over a substantial part of the operating temperature range. According to the invention there is provided a superconducting transistor, comprising first and second superconducting layers having the same or substantially the same bandgap; a first electrically insulating layer sandwiched between said first and second superconducting layers; and a third superconducting layer separated from said second superconducting layer by a second electrically insulating layer; wherein said third superconducting layer has a larger bandgap than said first and second superconducting layers; wherein each of said first and second electrically insulating layers is sufficiently thin for tunnelling to take place therethrough; and wherein electron flow in the device takes place through said first, second and third superconducting layers in that order.

Preferably, said first and second superconducting layers are formed of aluminium, and said third superconducting layer is formed of a material selected from niobium, lead, tin and niobium nitride.

An embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings, in which

Figure 1 is a schematic cross section of a known Gray-type superconducting transistor, as described above,

Figure 2 illustrates the decrease in current gain with increase in temperature of the known Gray-type transistor for various collector bias voltages, as described above,

Figure 3 is a schematic curve of collector current against collector voltage for explaining the operation of the present device,

Figure 4 shows curves of current gain against collector bias voltage for a device in accordance with the present invention, the curves being taken at various operating temperatures, and

Figure 5 shows curves of current gain against operating temperature of the present device, the curves being taken at various collector bias voltages.

In order to overcome the reduction in current gain with increasing temperature inherent in the conventional Gray transistor, it is necessary to introduce into the transistor structure some mechanism which will exhibit a compensating rise in current gain.

In a device in accordance with the invention this compensation is effected by forming the collector layer 3 (Figure 1) of a superconducting material wh i ch has a higher energy bandgap than the emitter and base l ayers 1 and 2 , respectively. Assuming that the layers 1 and 2 are formed of aluminium as in the conventional Gray transistor, niobium is a suitable material for the col lector layer 3 in the present invention.

Th is fundamental change in the Gray transistor structure brings about a marked improvement in the current gain/temperature characteristic, whilst not detracting from the general level of current gain attainabl e, whi ch is largely determined by the dimensions and material of the base l ayer 2.

The layers of the present device may be of simil ar dimensions to the conventional Gray transistor, i.e. the layers 1 , 2 and 3 may be of the order of 30QA thick , and the insul ating layers 4 and 5 must be suffi ciently thi n, for example 20-50.1, to al l ow quantum tunnel l ing thereth rough. If aluminium is used for the layers 1, 2 and 3 , aluminium oxide is a convenient material for the insulating layers 4 and 5. However, other insul ating materials might alternatively be used.

Figure 3 is a general ised curve showing variation in col lector current against col lector bias at a constant temperature. It will be seen that the current rises with increasing bias voltage up to a peak 6 at a bias voltage V_d. In a region 7 the current falls and then levels out. At a voltage V_s there is an abrupt rise in current and thereafter the current increases substantial ly l inearly. The voltage V^ at which the current peak occurs is equal to the difference between the bandgap of the col lector layer and the bandgap of the base layer. The voltage V_s is equal to the sum of those bandgaps. It is found that if the teπperature is increased, the superconducting bandgaps of the materials change such that the voltage V_d at which the current peak occurs moves towards V_s. If the col lector bias voltage is set at a point 8 just above the peak position, the current will remain substantially constant despite the increase in temperature. The mechanism is as fol l ows. If the temperature increases, the current gain would drop due to a decrease in the value of the quasiparticle recombination lifetime. The rise in temperature will l ower the bandgap in the base layer 2 more than that in the col lector l ayer 3, because the latter is the larger. The bandgap difference will therefore increase, and the peak 6 will move towards the selected bias point 8, or, in effect, the operating point will move up the slope of the current curve towards the peak. The current (and the current gain) will therefore rise, and this will counteract the drop which would otherwise be experienced.

Figure 4 shows curves of current gain against bias voltage values within the range between V^ and V_s of Figure 3, the five curves being plotted at respective different temperatures. It will be seen that, in this example, if a temperature range between 0.625K and 0.8K is considered (.i.e. ignoring the curves taken at 0.90K and l.OK), the curves substantially coincide at a collector bias voltage of about 1.28mV, and this therefore appears to be an optimum operating value.

Figure 5 shows how the resulting current gain of a device in accordance with the invention changes with temperature, the curves being plotted at different collector bias voltage settings. It will be seen that each of the curves has a region of substantially constant current gain. If these curves are compared with the curves of Figure 2, obtained for a conventional Gray transistor, the very great improvement in current gain stability afforded by the present invention will be apparent.

The choice of collector bias voltage is dependent upon the particular temperature range for which gain stabilisation is required. If the required temperature range is reduced, the optimum bias voltage decreases and the operation will move to a higher curve in Figure 5. The current gain therefore increases. Conversely, if a higher gain is required, a narrower temperature range for stabilisation must be accepted.

Although a transistor comprising emitter and base layers 1 and 2 of aluminium and a collector layer 3 of niobium is described above, alternatively a collector layer of lead, tin or niobium nitride might be used. Furthermore, other materials might be used for any of the layers, provided that the bandgap of the collector layer is greater than that of the base layer. If other materials are used, the collector bias voltage must be selected accordingly.

Claims

1. A superconducting transistor, conpπ^'sing first and second superconducting layers (1,2) having the same or substantially the same bandgap; a fi rst electrical ly insul ating layer (4) sandwiched between said first and second superconducting layers; and a third superconducting l ayer (3) separated from said second superconducting layer by a second electrically insul ating layer (5) ; wherein said th i rd superconducting l ayer has a larger bandgap than said first and second superconducting layers ; wherein each of said first and second electrical ly insulating layers is sufficiently thin for tunnelling to take pl ace thereth rough ; and wherein electron fl ow in the devi ce takes place th rough said fi rst, second and third superconducting l ayers in that order.

2. A transistor as cl aimed in Claim 1, wherein said first and second superconducting l ayers (1 ,2) are formed of aluminium and said thi rd superconducting layer (3) is formed of niobium.

3. A transistor as cl aimed in Claim 1, wherein said fi rst and second superconducting layers (1,2) are formed of aluminium and said third superconducting layer (3) is formed of a material selected from lead, tin and ni obium nitride.

4. A transistor as cl aimed in Claim 1 or Cl aim 2 , wherein said electrical ly i nsulating l ayers (4,5) are formed of aluminium oxide.

5. A transistor as cl aimed in any preceding claim, wherein a characteristic of current gain against bias voltage for said third superconducting layer (3) for a given tenperature exhibits a current gain peak followed by a region of l ower current gain; and wherein in operation the bias voltage is selected to be sl ightly higher than that at which said peak occurs.