WO1990000328A1

WO1990000328A1 - Level shifter with high common mode immunity

Info

Publication number: WO1990000328A1
Application number: PCT/US1989/002856
Authority: WO
Inventors: Alex J. Severinsky
Original assignee: Viteq Corporation
Priority date: 1988-07-01
Filing date: 1989-07-03
Publication date: 1990-01-11
Also published as: GB2232840A; AU3869489A; GB9002470D0

Abstract

A self-powered circuit for controlling the on and off switching of a power semiconductor switch (11), is disclosed wherein the circuit is adapted to be immune to common mode voltage (Vcm) changes. The circuitry is configured with a transmitter (41-47) section which acts as a current sink in response to Vin control signals. The transmitter section includes diodes (45, 46) and resistors (42-44) selected and configured to alleviate unwanted loop currents. The transmitter section connects to a receiver section which increases the signal power and applies it as a drive to the power semiconductor switch (11). An isolated power supply powers the circuit from the same powerline which is switched by the power semiconductor switch (11).

Description

LEVEL SHIFTER WITH HIGH COMMON MODE IMMUNITY

BACKGROUND OF THE INVENTION

1. Technical Field

The present invention is directed to a level shifting or drive circuit for gating on and off switching devices and more particularly, to circuitry for gating on and off power semiconductors wherein the circuitry is self-powered and immune to changes in high-common mode voltages.

2. Related Art

Semiconductor switches are commonly used in high power devices such as power converters. Bipolar junction transistors, Darlington transistors, or MOSFETs are commonly used as semicon¬ ductor switches. Different drive circuits for controlling the on and off switching of the semiconductor switches are used in the art. Presently, there are three types of drive circuits.

One type of drive circuit for turning on and of power semicon¬ ductor switches is an optocoupler circuit. An optocoupler circuit contains an integrated circuit with an LED and a physically spaced apart photoreceiver used to isolate different voltage potentials of a power semiconductor switch and its control circuit. Optocoupler circuits are expensive when common mode immunity requirements are in the 1 kV/mksec range or above. In addition, optocoupler cir¬ cuits consume a significant amount of power during operation which may require a separate isolated power supply for each semiconductor switch.

Another drive circuit for turning on and o f power semiconduc¬ tor switches is a transformer circuit. In transformer circuits, isola¬ tion is achieved using a small, high frequency transformer having a small capacitance between its input and output windings. Do to fast voltage transients caused by switching the power semiconductor switches on and off, undesirable high frequency signals are usually induced in the windings of the transformer. Because of this, high frequency transformers in drive circuits must be extremely well shielded. This increases the cost of using these transformer circuits. In addition, because of a transformer's bandwith limitations, a trans¬ former drive circuit cannot operate at a low repetition rate thus reducing its usefulness as a drive circuit for a power semiconductor switch.

A third class of circuits for turning on and off power semicon¬ ductor switches is an optogenerator circuit. In optogenerator cir¬ cuits, control circuits generate a light beam that illuminate a string of photocells. The photocells are connected to power semiconductor switches and turn on and off the power semiconductor switches in response to illumination by the light beam. A typical response time for a photocell is 100 to 1,000 mksec. Thus, photocells are relatively slow in reacting to a generated light beam.

Accordingly, prior art circuitry for gating on and off power semiconductors fall short of meeting the needs of the field. As pointed out above, such prior art circuits are expensive, inefficient and slow in response time. SUMMARY OF THE INVENTION

The present invention provides an additional type of drive cir¬ cuit to turn on and off power semiconductor switches and has advan¬ tages and features over prior drive circuits not heretofore possible.

An important object of the present invention is to provide a drive circuit for a semiconductor switch which has immunity to rapid changes in common mode potential between a power semiconductor switch and its respective control circuitry.

Another object of the present invention is to provide a low cost drive circuit with a fast response time for turning on and off power semiconductor switches. A further object of the present invention is to provide a drive circuit which is self-powered while maintaining high common mode immunity.

In accordance with the present invention, a transmitter con¬ sisting of a bipolar transistor amplifier which is tied to a first refer¬ ence level of the power semiconductor switch includes a series diode/resistor pair in its base and emitter paths to negate rapid changes in common mode voltages between the first reference level and a second reference level referenced to the first reference level. The transmitter operates as a current sink to switch a receiver. The receiver contains a threshold operational amplifier referenced to the second reference level. The receiver outputs a gating signal to a power semiconductor switch. Power is supplied to the circuitry by the same power line which is switched by the power semiconductor switch. The power supply for the drive circuit is formed of a voltage regulator and a large filter capacitor, both of which are fed by a half-wave diode connected to the line switched by the power semi¬ conductor switch. In use, low level gating signals are applied via the circuitry to the power semiconductor switch to provide fast switching action, while providing the desired high common mode immunity feature.

BRIEF DESCRIPTION OF THE DRAWING

Figure 1 is a schematic circuit diagram of the preferred embodiment of the present invention.

The above-mentioned and other objects and features in the present invention will become apparent from the following descrip¬ tion when read in conjunction with the drawing. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The level shifter of the present invention consists of an iso¬ lated power supply, a transmitter, and a receiver.

Input 21 to the power supply is connected across power semi¬ conductor switch 11. Power semiconductor switch 11 switches cur¬ rent I. When power semiconductor switch n is off (open), there is a voltage potential across power semiconductor switch n. This voltage potential is generated by other circuits in the device in which the power semiconductor switch can be utilized (such as a power con¬ verter). In its off state, capacitor 23 of the power supply is charged through diode 24 to a maximum voltage existing across power semi¬ conductor switch 11. Voltage regulator 25 of the power supply gets an input voltage from capacitor 23 and produces an output voltage V_QQ. adequate for power semiconductor drive circuits usually in the 10-15 Volt range. When power semiconductor switch 11 is on, diode 24 pre¬ vents discharge of capacitor 23. During the time power semiconduc¬ tor switch 11 is on, capacitor 23 provides sufficient energy for opera¬ tion of the receiver when the value of capacitor 23 is large enough to support operation at the minimum desired switching frequency of power semiconductor switch 11.

The transmitter is a current sink and consists of transistor 41, current limiting resistor 42, input divider 43, 44, and common mode protection diodes 45, 46. When an input voltage j_n is applied to the input divider of resistors 43, 44, input voltage Vi_n is divided and is applied to transistor 41 with resistor 42 connected to the emitter of transistor 41, acting as a current sink. In the absence of input voltage Vi_n, transistor 41 is off.

The receiver consists of power booster amplifier 31, receiver load resistor 32 and overflow diode 33. Power booster amplifier 31 is preferably a buffer with a Schmitt trigger input for higher noise immunity. The output of power booster amplifier 31 provides power to the input of the power semiconductor switch such as the gate on a MOSFET or the base of a bipolar junction transistor.

When the transmitter is off, there is no current flowing through resistor 32 into the current sink. Therefore, the input volt¬ age input to power booster amplifier 31 is high and positive. W^τith a high, positive input voltage to power booster amplifier 31, the output of power booster amplifier 31 is low, since power booster amplifier 31 is preferably an inverting amplifier. Thus, there is no drive signal to power semiconductor switch 11 and power semiconductor switch 11 is off. In this condition, there is some voltage potential between refer¬ ence potential R2 of the transmitter and reference potential

of the receiver and the power supply. This difference is the common mode voltage potential VQM-

When the transmitter is on, there is current flowing through resistor 32 into the current sink. Therefore, the input voltage to power booster amplifier 31 is low. With a low voltage input to power booster amplifier 31, the output of power booster amplifier 31 is high, since power booster amplifier 31 is preferably an inverting amplifier. Thus, there is a drive signal to power semiconductor switch 11 and power semiconductor switch 11 is on.

When the transmitter is on, current flows through resistor 32 towards the current sink reducing the voltage on the input of power booster amplifier 31. This is because resistor 32 is connected to the input of power booster amplifier 31 and diode 33 is connected between the power booster amplifier voltage and the amplifier power supply negative potential VRJ.. When the voltage on the input of power booster amplifier 31 reaches about 0.7 Volts below the poten¬ tial VRI of the negative power supply potential, diode 33 clamps the voltage on the input of power booster amplifier 21 to VRI and further transmitter current increases come through diode 33. The input of power booster amplifier is thus protected from being too negative, the input voltage to power booster amplifier 31 is thus low and power semiconductor switch 11 is thus on.

When power semiconductor switch 11 is on, it connects Vp_$ to VRI. These potentials Vps and V_n are the potential present across power semiconductor switch 11 when it is off. Because power semi¬ conductor switch 11 switches on and off, V_R1 will change for the full voltage potential across power semiconductor switch 11. Therefore, because of the switching, common mode voltage VQM swings up and down when power semiconductor switch 11 switches.

The present invention is immune to high common mode volt¬ ages. A common mode voltage in the present invention is illustrated as VCM in Figure 1. Vcyi *•*■» measured across points v_n and Vj->₂- This is the difference between the reference voltage levels of the transmitter and the reference levels of the receiver and power sup¬ ply. When the common mode voltage changes at a rapid rate, cur¬ rents are induced in transistor 41 of the transmitter in part through the junction parasitic capacitanc of transistor 41. Diodes 45, 46 pre¬ vent loop current i from circulating through the base-emitter junction of transistor 41. Loop current i is prohibited by diodes 45, 46 arranged so that in the loop they are back to back. Resistor 43 has a high resis¬ tance which is 10¹ to 10⁴ times larger than the resistance of resistors 42, 44. The relatively high resistance of resistor 43 prevents circula¬ tion of loop currents ii through the source of the input voltage at ter¬ minal 47. Therefore, in the circuit of the present invention, high common mode immunity is achieved.

While the invention has been illustrated and described in detail in the drawing and foregoing description, it will be recognized that changes and modifications will occur to those skilled in the art. It is therefore intended, by the appended claims, to cover any such changes and modifications as fall within the true spirit and scope of the invention.

Claims

What is claimed is:

1. A control circuit for a power switch used in a device having high common mode immunity, said control circuit comprising: switching means for switching power in the device; control means for controlling the switching means; power supply means for supplying power to the control means, the power supply means being powered from power switched by the switching means; current means for controlling current at the control means according to the desired on or off state of the switching means; and means for preventing loop currents in the current means.

2. The circuit of claim 1 wherein the means for preventing loop currents prevents loop currents through a base-emitter junction of the current means.

3. The circuit of claim 1 wherein the means for preventing loop currents includes means for preventing loop currents through an input to the current means.

4. The circuit of claim 3 wherein the means for preventing loop currents further includes means for preventing loop currents through a base-emitter junction of the current means.

5. The circuit of claim 1 wherein the control means includes means for switching a control signal to the switching means and means for overload protection at the input of the control means.

6. The circuit of claim 5 wherein the means for overload protection includes a resistor on the input of the control means for tying the input to a first potential and a diode on the input of the con¬ trol means for tying the input to a second potential.

7. The circuit of claim 5 wherein the control means fur¬ ther includes hysteresis.

8. The circuit of claim 2 wherein the means for preventing loop currents through a base-emitter junction of the current means includes a diode in the loop current path from the base and a diode in the loop current path from the emitter, the diodes arranged such that in the loop they are back to back.

9. The circuit of claim 4 wherein the means for preventing loop currents through a base-emitter junction of the current means includes a diode in the loop current path from the base and a diode in the loop current path from the emitter, the diodes arranged such that in the loop they are back to back.

10. The current detector of claim 3 wherein the means for preventing loop currents through the input of the current means includes a resistor in the current path of the input to the current means, the resistor having a resistance substantially larger than other resistors in- the current means.

11. The current detector of claim 4 wherein the means for preventing loop currents through the input of the current means includes a resistor in the current path of the input to the current means, the resistor having a resistance substantially larger than other resistors in the current means.

12. The circuit of claim 1 wherein the power supply means includes a voltage regulator, a capacitor for holding charge to the voltage regulator, and a diode for tapping voltage off the power switched by the switching means and for preventing discharge of the capacitor through the power switched by the switching means.