WO1989002654A2 - Resonant tunneling transistor utilizing upper resonance - Google Patents
Resonant tunneling transistor utilizing upper resonance Download PDFInfo
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- WO1989002654A2 WO1989002654A2 PCT/US1988/003101 US8803101W WO8902654A2 WO 1989002654 A2 WO1989002654 A2 WO 1989002654A2 US 8803101 W US8803101 W US 8803101W WO 8902654 A2 WO8902654 A2 WO 8902654A2
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- 230000005641 tunneling Effects 0.000 title claims abstract description 64
- 239000000463 material Substances 0.000 claims abstract description 33
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 21
- 239000004065 semiconductor Substances 0.000 claims description 33
- 230000004888 barrier function Effects 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 7
- 239000000969 carrier Substances 0.000 abstract description 5
- 229910004613 CdTe Inorganic materials 0.000 abstract description 2
- 108091006149 Electron carriers Proteins 0.000 abstract description 2
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 abstract description 2
- 239000012535 impurity Substances 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 13
- 229910052782 aluminium Inorganic materials 0.000 description 13
- 238000005253 cladding Methods 0.000 description 11
- 238000009826 distribution Methods 0.000 description 7
- 239000000203 mixture Substances 0.000 description 7
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000001965 increasing effect Effects 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
- H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/22—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
- H01L29/221—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds, e.g. alloys
- H01L29/225—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/7606—Transistor-like structures, e.g. hot electron transistor [HET]; metal base transistor [MBT]
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- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
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- Crystallography & Structural Chemistry (AREA)
- Bipolar Transistors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
RESONANT TUNNELING TRANSISTOR UTILIZING UPPER RESONANCE BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to quantum-well heterostructure semiconductor devices, and in particular to a unipolar transistor using the upper resonance of a quantum well having one or more bound states and one or more resonance states. 2. Description of Related Art Multilayer quantum-well semiconductor devices have been developed as a result of thin film epitaxial growth techniques such as molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD). Quantum-well devices are characterized by very fast transport, high switching speeds, and tunable output properties. These features make the devices desirable as tunable high-frequency oscillators, mixers, amplifiers, and high-speed logic circuits. The operation of quantum-well heterostructure devices is based on the effects of discontinuous energy band edges in multilayer semiconductors. Precise control over the stoichiometric composition and electronic doping of the layers produced by MBE or MOCVD is required. A particular quantum-well device of great interest is the doublebarrier resonant tunneling structure. In double-barrier devices made with GaAs and GaAlAs, electrons are not confined at the interface between GaAs and the larger bandgap GaAlAs, as they are in the high electron mobility transistor (HEMT). In contrast to HEMT devices, which depend on carrier transport parallel to a heterojunction interface, double-barrier devices depend on tunneling through thin GaAlAs barrier layers. A typical double-barrier structure comprises a very thin layer of a smaller-bandgap material sandwiched in between two layers of a larger-bandgap material which provide barriers. The potential well formed in this way is placed between two thick layers of a smaller bandgap material and ohmic contacts made to them. The resulting structure is a heterostructure double-barrier diode. If the width of the quantum well is small enough, discrete quantum-mechanical energy states or resonances occur within the well above the normal conduction band edge. For particular values of the bias voltage across the device, injected carriers have energies corresponding to one of the allowed energy states in the quantum well. When this condition exists, resonant tunneling of electrons through the double-barrier diode occurs, resulting in a large current. If the bias is further increased, the Fermi level rises above the allowed state in the well, which causes a decrease in the electron tunneling current. The initial increase in current followed by a decrease in current gives rise to a negative differential resistance characteristic. Experimental measurements of the highfrequency response of double-barrier diodes imply that the mechanism producing the negative differential resistance may be extremely fast, perhaps as fast as 0.1 picosecond. Although two-terminal resonant tunneling structures have a number of uses, three-terminal devices with controllable negative differential resistance have even more. Three-terminal devices could be used to advantage in tunable millimeter-wave active devices, negative resistance amplifiers, and high-speed digital circuits. A heterojunction tunneling triode (HTT) is a simple conjectured three-terminal device in which the third terminal is connected to the quantum-well layer to modulate the transport of electrons. The third terminal furnishes a way of controlling the output characteristics of the device. The third terminal provides the possibility of attaining a sharp negative resistance region at different values of applied voltage. A major difficulty in fabricating three-terminal quantum-well devices is making good electrical contact with the base layer, which is typically only 50 to 100 Angstroms thick. Previous analyses have indicated that the potential of the central well region of a doublebarrier resonant tunneling structure could not be modulated because of the lack of carriers there. The central well region of a double-barrier resonant tunneling structure is so thin and wide that any controlling voltage applied at the sides of the central region would only change the potential of the central region at its very edge. In addition, the voltage in most of the central region could not be modulated because it is effectively shielded by the outer conducting layers of the structure. The original proposed implementation by Jogai and Wang of the resonant tunnel transistor, "Dependence of Tunneling Current on Structural Variations of Superlattice Devices," by B. Jogai and K.L. Wang, in Appl. Phys. Lett. 46 (2), 15 January 1985, required that an ohmic contact be made to the thin quantum well region so that the potential of this region could be modulated at high speeds. However, it has been determined that in the proposed implementation the device would exhibit high parasitic resistance and capacitance. This combination is detrimental to high speed operation. For all realistic values of doping level, it appears that the well (base) region of the device would be completely depleted. For all practical device dimensions, with such a thin depleted region, it would be virtually impossible to modulate the potential across the central region of the device. In effect, this means that the current flow would be confined to the periphery of the device. Thus, even at low average current densities, high level injection effects would occur at the device peripheries. A similar problem occurs in certain bipolar transistor designs (the so-called Kirk effect). SUMMARY OF THE INVENTION In view of the foregoing problems associated with the prior art, it is an object of the invention to furnish heterojunction semiconductor devices whose operation relies upon extremely fast resonant tunneling of carriers through double barrier single quantum well (DBSQW) structures. It is another object of this invention to provide a novel and improved unipolar transistor for high-speed applications. It is yet another object of the invention to provide a three-terminal resonant tunneling transistor that utilizes resonant tunneling through higher energy levels in a central quantum well. In the accomplishment of these and other objects of the invention, a three-terminal device which exploits the resonant tunneling of carriers is disclosed. In enhancing the applicability of this device to high speed operations, its design involves resonant tunneling through higher energy levels in a central quantum well. The new type of unipolar transistor has a base region consisting of a quantum well with reduced base contact resistance. In particular, the second or higher subband is used for electron tunneling instead of the first, thereby reserving the lower subband for a high electron carrier density (twodimensional electron gas due to modulation doping from emitter) which lowers the base resistance. The otherwise undoped base reduces impurity scattering that degrades the tunneling current and increases the base current. In a preferred embodiment the double-barrier structure is Ga Al As-Ga Al As-GaAs-Ga Al As-Ga Al As. Alter l-y y l-x x l-xy 1-y y native embodiments of the invention make use of other III V or II-VI materials, such as InGaAs-GaAs-GaAlAs (with InGaAs as the well), or HgTe-CdTe. By a proper design of the structure, it is possible to suppress tunneling through the lowest energy level in the GaAs well. This can be accomplished by adjusting the aluminum concentration in the AlGaAs cladding layer, called the emitter, such that the minimum energy of incoming electrons (associated with the conduction band minimum of the AlGaAs cladding layer) is above the energy of the lowest level in the GaAs well. By appropriately doping the cladding layers such that the Fermi level is above the lowest energy level in the quantum well base, that level can be populated and tunneling through the second level can still be accomplished. The collector aluminum concentration must also be high enough to prevent electrons from tunneling out from the lowest energy level. Since the lowest level is always populated, the GaAs well will be conductive, making it feasible to modulate the base region of a three-terminal device. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram of the preferred embodiment of invention. FIG. 2 is a graph showing an example of a collector doping and composition profile. FIGs. 3(a) and 3(b) are plots of the potential distribution for a second-level tunnelling transistor respectively without and with bias. FIGs. 4(a) and 4(b) are plots of potential distributions for a tunneling triode with applied collector bias with a heavily doped and a lightly doped collector, respectively. FIG. 5 is a graph of calculated current-voltage characteristics of various double-barrier resonant tunneling structures. FIG. 6 shows the basic structure for the currentvoltage characteristics of FIG. 5. FIG. 7 is a graph of calculated emitter-collector current characteristics of a double barrier resonant tunneling structure with various applied emitter-base voltages, VEB. DESCRIPTION OF PREFERRED EMBODIMENTS The invention is a new semiconductor structure that solves the difficulties encountered in previous attempts to modulate the base region of a three-terminal quantumwell tunneling device. FIG. 1 shows a diagram of the preferred embodiment of the structure 10 comprising layers epitaxially grown on a substrate 12 which is heavily doped n-GaAs. Collector layers 14 are grown over the substrate 12, the collector layers comprising AlytGal,yrAs with a graded concentration y' of Al that varies with the distance z from the top of the layer. Above the collector layers 14 is a first barrier layer 16, which comprises AlxGa1#xAs. Next is a well or base layer 18 which can be pure GaAs, but can also comprise other materials such as Gal#wInwAs. A second barrier layer 20 overlies the well layer 18 and comprises AlxGa1##As. Emitter layers 22 overlying the second barrier layer 20 comprise AlyGal#yAs with a graded concentration y of Al. A contact layer 24 overlying the emitter layers 22 is compositionally graded to binary n-type GaAs and is heavily doped to allow a conventional contacting arrangement. The n-type doping of the collector layers 14 and the emitter layers 22 is of the order of 1017 cm'3 or greater. The thickness of the collector layer is about 1000 Angstroms, as is the thickness of the emitter layer 22. The well layer 18 and first and second barrier layers 16 and 20, respectively, are undoped. The well layer 18 has a thickness of between about 20 and 130 Angstroms. The barrier layers 16 and 20 each have a thickness of between 5 and 120 Angstroms. FIG. 2 shows an example of the collector doping and composition profile which are designed to minimize tunneling from the first energy level in the well. The interface between the barrier 16 and the collector 14 is taken to be z = o . The aluminum concentration, y', in the collector 14 decreases from y01 at z = O to O at a distance of a few hundred Angstroms away. The doping profile increases from 0 to highly doped on a similar scale. Ohmic contact to the base (well) layer 18 is accomplished by direct metallization on the exposed base layer 18. Selective etching procedures can be used to expose the base 18, such as those described by Yokoyama et al. in their paper "Tunneling Hot Electron Transistor Using GaAs/AlGaAs Heterojunctions," in Japanese Journal of Applied Physics, Vol. 23, No. 5, May 1984, L311-L312, the contents of which are herein incorporated by reference. The resonant tunneling structure of the present invention has a conduction band edge configuration as shown in FIG. 3(a). The configuration is created by adding aluminum to pure GaAs making up the outer emitter and collector conducting layers 22 and 14, respectively. Increasing the aluminum concentration in the sides raises the conduction band edge there, as shown. If enough aluminum is included, the energies of incoming electrons are above the energy of the first resonance, E1, in the central well 18. The bottom of the first subband lies below the Fermi level and is thus partially occupied, creating a conducting central region. The second resonant energy, E2, can now be used for tunneling instead of E1. Tunneling through the lowest energy level in the GaAs well is suppressed by adjusting the aluminum concentration in the AlGaAs cladding layers so that the minimum energy of incoming electrons (associated with the conduction band minimum of the AlGaAs cladding layer) is above the energy of the lowest level in the GaAs well. By appropriately doping the cladding layers, the lowest level is populated and tunneling through the second level is accomplished. Since the lowest level is always populated, the GaAs well will be conductive, making it feasible to modulate the base region of this three-terminal device. In FIG. 3(a), the alloy concentration y in the cladding layers is chosen so that incoming electrons on the left have energies between the first and second subbands, E1 and E2, in the well. The bottom of the first subband lies below the Fermi level EF and is thus partially occupied from E1 to EF, creating a conducting central base region. The second resonant energy E2 can now be used for tunneling instead of E1. A contact to the conducting well region allows a bias to be applied between the emitter (the left cladding region) and the central well. Under such an applied bias, the potential distribution would look like that of FIG. 3(b). With this distribution the second subband is now aligned with the emitter quasi-Fermi level, producing the condition for resonant tunneling across the structure from emitter to collector. The onset of the current can then be controlled by the bias on the central well region. There are tunneling structure requirements for attaining the potential distribution to cause resonant tunneling through the E2 level. The lowering of the E2 level with respect to the emitter is achieved by removing electrons from the filled E1 level in the first subband through an applied positive base voltage. This reduces the field in the barrier layers (see FIG. 3(b)), and thus lowers the E2 level position. The largest reduction occurs if all the electrons in the E1 level are removed through the base contact. An approximate criterion for the device construction can be found from the following estimates. The field in the barrier with no applied base voltage has a value of dv = m*(Ef - E1)q, dx where m* is the effective mass, q is the electronic charge, e is the dielectric constant, and m*/irh2 is the density of states in the central well. For GaAs, the density of states is thus about 2.5x1013 cm#2/V. The field in the barrier with the applied base voltage is approximately zero. Here a symmetric structure has been assumed, with heavily doped emitter and collector regions, so that the voltage drops caused by changes in the band bending in these regions is neglected to first order. The maximum voltage change that can be induced is thus: V = (dv/dx) tb where tb is the barrier width. To lower the E2 level so that it lines up with the incoming electrons for resonant tunneling requires that the level be shifted down by V = E2 - Ec It is thus required that 2.5x1013 q/2e tb (Ef-El) be greater than E2 - Ec The division by two is due to an approximation which assumes that half of the charge in the well is available to terminate the field across the barrier between the emitter and the well. For example, for tb = 5x10-7 cm, the requirement becomes approximately: 0.94 (Ef-E1) is greater than E2 - Ec This constraint, then, is used to determine the composition of the collector and barrier layers. The required composition also depends upon the width of the central region, which mostly determines the values of the E1 and E2 levels. The second-level triode structure will be optimized if the collector region is lightly doped. In that case a large collector-well voltage can be applied without a tunneling of charge from the El level to the collector. Illustrated in FIGS. 4(a) and 4(b) are potential diagrams for the heavily and lightly doped collector cases. FIG 4tea) shows the situation for a heavily doped collector under bias. With the large bias shown, the electrons in the well could relatively easily tunnel from the well to the collector through the barrier. This would cause a large collector parasitic, or leakage, current. For a more lightly doped collector, the potential distribution of FIG. 4tub) is attained, resulting in the less transparent well-to-collector tunneling barrier. The doping distribution in the collector that minimizes the leakage current is chosen. It may also be desirable to tailor the collector aluminum composition to minimize the tunneling from the first level. In fact, the collector aluminum concentration may be higher than the emitter concentration to avoid tunneling to the collector with applied bias. The base current is ultimately determined by the difference between two currents: The current caused by electrons tun neling from the emitter to the collec tor, but scattered while in the well to lower energy states in the first subband. This can be thought of as a kind of recombination current. The current caused by electrons tun neling from occupied energy states in the first subband through the collec tor side barrier into the collector region. This is the well-to-collector leakage current. The tunneling current in double- barrier diodes through the second, as well as first, resonance, has been calculated for various aluminum concentrations in the cladding layers outside of the barriers. Calculated current-versus-voltage curves for four separate cases are shown in FIG. 5. All the structures for the calculated cases had 59 Angstrom wells and 28 Angstrom AlxGa1#xAs barriers with x=0.5, as shown in FIG. 6. One structure had GaAs cladding layers (y=O). In this case, the first resonance level is 0.13 V above the conduction band of GaAs, and the second resonance is at 0.48 V. The other cases considered all had AlyGa1#yAs cladding -layers with y=0.18, 0.21, and 0.27. In all of these cases, the conduction band minimum of the AlyGal#yAs was higher than the first resonance level in the well. The peaks in the current-voltage characteristics are therefore all due to tunneling via the second resonance level. As the aluminum concentration is increased, the voltage to achieve resonance decreases and the current density increases. By proper device design, therefore, the resonant tunneling transistor of the present invention is thus realizable. FIG. 7 presents the results of a calculation of the collector current density versus voltage characteristics for several emitter-base applied biases, VEB. For this case the emitter is doped to 1018 electrons per cm3, the collector is doped to 1017, the barrier alloy concentrations and widths are 100% aluminum and 11 Angstroms wide. The GaAs central well width is 71 Angstroms. ¯The emitter and collector aluminum concentrations are 25% and 30%, respectively. It can be clearly seen that the current is very sensitive to emitter-base bias. For example, it changes from 5.0x104 amps/cm2 to 3.5x105 amps/cm2 for a collector-emitter voltage of 0.5 volts as VEB changes from 0.15 volts to 0.30 volts. Also, the relative high/low polarity of these states reverses when VCE = 2.3V. This adjustability demonstrates the usefulness of the device for digital logic applications. While the present invention has been described in detail with reference to particular preferred embodiments, persons skilled in the art will appreciate that various modifications may be made without departing from the spirit and scope of the invention. For example, other semiconductors that can have variable band gaps could be used instead of GaAlAs. Forming the various layers of the device with different compositions of Hg1¯xCdxTe is one such implementation. Therefore it is intended that the invention be limited only in terms of the appended claims.
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US9811287A | 1987-09-17 | 1987-09-17 | |
US098,112 | 1987-09-17 |
Publications (3)
Publication Number | Publication Date |
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WO1989002654A2 true WO1989002654A2 (en) | 1989-03-23 |
WO1989002654A1 WO1989002654A1 (en) | 1989-03-23 |
WO1989002654A3 WO1989002654A3 (en) | 1989-05-05 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0510557A2 (en) * | 1991-04-22 | 1992-10-28 | Nippon Telegraph And Telephone Corporation | Resonant tunneling transistor |
US6229153B1 (en) * | 1996-06-21 | 2001-05-08 | Wisconsin Alumni Research Corporation | High peak current density resonant tunneling diode |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0510557A2 (en) * | 1991-04-22 | 1992-10-28 | Nippon Telegraph And Telephone Corporation | Resonant tunneling transistor |
EP0510557A3 (en) * | 1991-04-22 | 1994-06-22 | Nippon Telegraph & Telephone | Resonant tunneling transistor |
US6229153B1 (en) * | 1996-06-21 | 2001-05-08 | Wisconsin Alumni Research Corporation | High peak current density resonant tunneling diode |
Also Published As
Publication number | Publication date |
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EP0333851A1 (en) | 1989-03-23 |
JPH02503732A (en) | 1990-11-01 |
WO1989002654A3 (en) | 1989-05-05 |
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