WO1988000738A3 - Display processing apparatus - Google Patents

Display processing apparatus Download PDF

Info

Publication number
WO1988000738A3
WO1988000738A3 PCT/GB1987/000517 GB8700517W WO8800738A3 WO 1988000738 A3 WO1988000738 A3 WO 1988000738A3 GB 8700517 W GB8700517 W GB 8700517W WO 8800738 A3 WO8800738 A3 WO 8800738A3
Authority
WO
WIPO (PCT)
Prior art keywords
array
cache
simd
processing
bit
Prior art date
Application number
PCT/GB1987/000517
Other languages
French (fr)
Other versions
WO1988000738A2 (en
Inventor
John Paul Mason
Richard James Jales
David John Stocks
Robert Charles Gibbins
Original Assignee
Sigmex Ltd
John Paul Mason
Richard James Jales
David John Stocks
Robert Charles Gibbins
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sigmex Ltd, John Paul Mason, Richard James Jales, David John Stocks, Robert Charles Gibbins filed Critical Sigmex Ltd
Priority to GB08806422A priority Critical patent/GB2207584A/en
Publication of WO1988000738A2 publication Critical patent/WO1988000738A2/en
Publication of WO1988000738A3 publication Critical patent/WO1988000738A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/04—Display device controller operating with a plurality of display units

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Image Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

For generating and processing display images (possibly different ones on respective multiple display units) a pre-processor (12) supplies data and commands to a SIMD (single instruction multiple data) 8 x 8 array (13) of processing elements (procells) (14), each arranged to process 32 bit data words internally but to output only 8 bits at a time. The array (13) comunicates with a barrel shifter cache (18) via a 512 bit (64 x 8) wide data bus. The cache (18) communicates with pixel stores (VIM) via a 712 bit wide K-bus so that pixzones comprising 8 x 8 arrays of pixels can be caled up for processing in the array/cache arrangement (13, 18). A next-pixzone generator (20) determines the consecutive pixzones for processing on the basis of commands from a SIMD instruction unit IS which also controls the SIMD array (13) and cache (18). Methods of using the SIMD array to generate next-pixel addresses upon which the next-pixzone generator acts are also described.
PCT/GB1987/000517 1986-07-18 1987-07-17 Display processing apparatus WO1988000738A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08806422A GB2207584A (en) 1986-07-18 1987-07-17 Display processing apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB868617579A GB8617579D0 (en) 1986-07-18 1986-07-18 Raster graphical display system
GB8617579 1986-07-18

Publications (2)

Publication Number Publication Date
WO1988000738A2 WO1988000738A2 (en) 1988-01-28
WO1988000738A3 true WO1988000738A3 (en) 1988-03-10

Family

ID=10601296

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/GB1987/000517 WO1988000738A2 (en) 1986-07-18 1987-07-17 Display processing apparatus

Country Status (3)

Country Link
EP (1) EP0274510A1 (en)
GB (4) GB8617579D0 (en)
WO (1) WO1988000738A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH087668B2 (en) * 1990-02-07 1996-01-29 株式会社東芝 Dynamic barrel shifter
KR100558736B1 (en) * 2002-12-10 2006-03-10 신영만 Metallic plate printing machine

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
ACM Transactions on Graphics, Vol. 2, No. 1, January 1983 (ACM), R.F. SPROULL et al., "The 8 by 8 Display", see pages 32-56 cited in the application *
Eurographics '83, 1983 (Elsevier Science Publishers B.V., North Holland, NL), I. PAGE, "Disarray: a 16x16 Rasterop Processor", see pages 367-381 cited in the application *
Micros, Minis and Maxis, Technology Thrust vs user Requirement, Digest of Papers from Compcon, 6-9 September 1977, (IEEE, New York, USA), W.C. MEILANDER, "The Evolution of Parallel Processor Architecture for Image Processing", see pages 52-57, in particular figures 3-5; paragraphs: "Paralell Processor Evolution", "Machine Goals", "Processing Array" *
Proceedings of the 5th International Conference on Pattern Recognition, Vol. 1, 1-4 December 1980 (IEEE Computer Society, Florida, USA), D. SHERDELL, "A Low Level Architecture for a Real Time Computer Vision System", see pages 290-295, in particular page 291, left-hand column, line 10 - page 293, left-hand column, line 15; figure 1 *

Also Published As

Publication number Publication date
GB2207584A (en) 1989-02-01
WO1988000738A2 (en) 1988-01-28
GB8617579D0 (en) 1986-08-28
EP0274510A1 (en) 1988-07-20
GB8806422D0 (en) 1988-04-20
GB8630894D0 (en) 1987-02-04
GB8716967D0 (en) 1987-08-26

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