WO1983002828A1 - Frequency signal conversion apparatus and method - Google Patents
Frequency signal conversion apparatus and method Download PDFInfo
- Publication number
- WO1983002828A1 WO1983002828A1 PCT/US1979/001057 US7901057W WO8302828A1 WO 1983002828 A1 WO1983002828 A1 WO 1983002828A1 US 7901057 W US7901057 W US 7901057W WO 8302828 A1 WO8302828 A1 WO 8302828A1
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- frequency signal
- signal
- produce
- phase
- circuit
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P3/00—Measuring linear or angular speed; Measuring differences of linear or angular speeds
- G01P3/42—Devices characterised by the use of electric or magnetic means
- G01P3/44—Devices characterised by the use of electric or magnetic means for measuring angular speed
- G01P3/48—Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
Definitions
- This invention relates to an apparatus and method for converting one frequency signal to another frequency signal and, more particularly, to a frequency conversion apparatus and method for determining the speed of rotation of a rotating member.
- Digital frequency conversion circuits have a wide variety of applications. For example, one particular use is in converting frequencies to determine the. speed of a vehicle engine. Typically, a frequency signal is generated by detecting teeth or other discontinuities on a rotating output shaft of the engine. Unless the shaft has a certain number of teeth, this frequency signal is then converted to another or output frequency signal which is used to measure engine speed.
- the rotating shaft will have such a certain number of teeth, i.e. , 60 or a multiple thereof.
- the frequency signal generated by detecting these teeth can then be counted for one second and this count will then be numerically equal to the RPM of the engine.
- This 'procedure is simple due to the wide availability of counters having a time base of one second which can be used to count the pulses of the frequency signal.
- the rotating shaft has a number of teeth other than 60 or a multiple thereof. Consequently, the engine speed cannot be determined directly by counting with a counter having a one second time base.
- frequency conversion apparatus in which the frequency signal obtained by detecting the teeth on the shaft is converted to an output signal having a frequency as if the shaft had 60 teeth.
- the pulses of this output frequency signal can then be counted with a counter having a one second time base to. determine the engine speed.
- frequency conversion apparatus for determining the speed of rotation of a rotating member having teeth other than 60 or a multiple thereof will convert signals from the frequency domain to the time domain and back to the frequency domain.
- the frequency signal obtained by sensing teeth on the rotating shaft is used to set a time period during which pulses from a fixed oscillator are counted. This time period can be, for example, the time it takes two consecutive teeth on the rotating member to be sensed.
- a disadvantage with the prior frequency conversion apparatus is that it requires a relatively large number of electronic components because of the change between the frequency and time domains. This larger number of components results in an apparatus 'which is less economical and reliable, and one which requires more electrical power and occupies more space, at least in relation to the present invention.
- the prior frequency conversion apparatus can follow fast rates of change in the speed of rotation of the shaft, but not without a disadvantage given below. This is accomplished by the fact that the time period for counting the oscillator pulses changes as the shaft rotation speed changes. For example, as the shaft speed increases, the time period will decrease due to the increased speed at which the two consecutive teeth are sensed. Since pulses from the fixed oscillator are being counted, and since the variation in time periods occurs in a stepwise manner, the converted frequency will be, disadvantageously, a step function of the input frequency. In other words, the converted frequency will not follow smoothly changes in the input frequency.
- a frequency to DC (F/DC) converter will convert the output frequency of the former to a DC voltage to drive, for example, a chart recorder to provide a trace of the voltage.
- the output voltage of the F/DC converter, and hence the trace will be a step function when, preferably, it should be smooth since the rotational speed of the shaft may be changing smoothly.
- a circuit for converting an input frequency signal to an output frequency signal, comprising means for multiplying the input frequency signal by a ' value M to produce a multiple frequency signal, and means for dividing the multiple frequency signal by a value N to produce the output frequency signal.
- the present invention includes a method for converting an input frequency signal to an output frequency signal, comprising the steps of multiplying the input frequency signal by a value M to produce a multiple frequency signal, and dividing the. multiple frequency signal by a value N to produce the output frequency signal.
- frequency conversion is obtained without any conversion to the time domain.
- Signal processing occurs entirely in the frequency domain. Therefore, fewer electronic components for the circuit are needed than if conversion to the time domain was required. Also, variations in the input frequency signal are followed smoothly, rather than being followed stepwise.
- the single figure is a schematic • illustration of an embodiment of the present invention. Best Mode of Carrying Out the Invention
- the single figure shows a circuit 10 that receives an input frequency signal f. on a line 12 and generates a converted output frequency signal f on a line 14.
- a rotatable member such as a shaft 16 has a plurality of teeth 18 which can be sensed by a sensor 20.
- the teeth 18 can be magnetic and the sensor 20 can be a magnetic pick-up and pulse- shaper. The latter will sense the teeth 18 as they rotate and produce a square wave frequency signal f. on line 12.
- the circuit 10 includes a phase-locked loop 22 which multiplies the frequency signal f. by a value M and provides the multiple frequency signal on an output line 24.
- the phase-locked loop 22 includes a phase detector or comparator 26 having one input receiving the frequency signal f. on line 12.
- the . phase detector 26 compares this input frequency signal f. with a frequency signal on a line 28 and generates an error signal on a line 30 which is proportional to the difference in phase between the signals on. line 12 and line 28.
- a low pass filter 32 filters the error signal on.line 30 and feeds the filtered signal over a line 34 to a compensator 36 for well-known phase-locked loop purposes.
- the signal from compensator 36 is then fed to a voltage controlled oscillator (VCO) 38 over a line 40.
- VCO voltage controlled oscillator
- the VCO 38 thereby has its output frequency signal on the line 24 controlled by the filtered and ' compensated error signal on line 40.
- a divider 42 divides the frequency signal on line 24 to provide the frequency signal on line 28.
- the output frequency signal of the VCO 38 on line 24 will be a multiple M which is the division factor of the divider " 42. For example, if divider 42 is set to divide by 60, then the factor M will be 60, whereby the signal on line 24 is 60 times the frequency signal f. on line 12.
- the circuit 10 also includes a divider network 44 which functions to divide the frequency signal on line 24 by a value N.
- Network 44 includes a divider shown generally at 46 which receives the frequency signal on line 24 and provides the circuit output frequency f on the line 14.
- the value N can be programmed or preset by a thumbwheel switch shown generally at 48.
- thumbwheel switch 48 has a l's digit wheel, a 10's digit wheel, and a 100's digit wheel setting so that divider 46 can be set to divide by N for values from 1 to 999.
- Divider 46 constitutes three counters conventionally coupled as shown.
- circuit 10 can be described by the following equation:
- f. x M is the frequency of the signal on line 24
- M is the divisor of divider 42
- N is the divisor set by switch 48 for the divider 44
- M and " ft are integers.
- the signal f. will be generated that is proportional to the speed of rotation of the shaft 16 and hence engine speed.
- the phase-locked loop 22 then generates the frequency signal f. x 60 on line 24 which is then divided by 8 by the network 44.
- the output signal f• x 6£ As can be ' appreciated, the signal f is prop 1 orti.8onal to the engine speed and this signal f can now be fed to, for example, a counter having a one second time base to determine engine speed.
- Circuit 10 is a relatively simple circuit having only a phase-locked loop 22 and a divider network 44, each having a relatively small number of components.
- the signals processed by the circuit 10 are always in the frequency domain. Furthermore, any change in speed of rotation of the shaft 16 will result in a change in the input frequency f. , which change will be smoothly followed by the output -frequency signal f on line 14. This is as a result of the phase-locked loop 22 being locked in phase on the variable input frequency f..
- the signal f. is shown as first being multiplied and then divided, the reverse process can apply equally. That is, the signal f. can first be divided by N and then multiplied by M.
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measuring Frequencies, Analyzing Spectra (AREA)
Abstract
A circuit (10) and method for converting a circuit input frequency signal (fi) to a circuit output frequency signal (fo) comprising a phase-locked loop (22) for multiplying the input frequency signal (fi) by a value M to produce a multiple frequency signal (fiM), and a presettable divider for dividing the frequency signal (fiM) by a settable value N to produce the output frequency signal (fo). The circuit (10) and method are used to determine engine speed by converting the signal (fi) to the signal (fo) which can be used with a counter having a one second time base to determine such speed. The conversion occurs in the frequency domain and follows smoothly any change in engine speed.
Description
Description
Frequency Signal Conversion Apparatus and Method
Technical Field This invention relates to an apparatus and method for converting one frequency signal to another frequency signal and, more particularly, to a frequency conversion apparatus and method for determining the speed of rotation of a rotating member.
Background Art
Digital frequency conversion circuits have a wide variety of applications. For example, one particular use is in converting frequencies to determine the. speed of a vehicle engine. Typically, a frequency signal is generated by detecting teeth or other discontinuities on a rotating output shaft of the engine. Unless the shaft has a certain number of teeth, this frequency signal is then converted to another or output frequency signal which is used to measure engine speed.
More specifically, advantageously, the rotating shaft will have such a certain number of teeth, i.e. , 60 or a multiple thereof. The frequency signal generated by detecting these teeth can then be counted for one second and this count will then be numerically equal to the RPM of the engine. This 'procedure is simple due to the wide availability of counters having a time base of one second which can be used to count the pulses of the frequency signal.
However, not uncommonly, the rotating shaft has a number of teeth other than 60 or a multiple thereof. Consequently, the engine speed cannot be determined directly by counting with a counter having a one second time base. Therefore, frequency conversion apparatus are employed in which the frequency signal obtained by detecting the teeth on the shaft is converted to an output signal having a frequency as if the shaft had 60 teeth. The pulses of this output frequency signal can then be counted with a counter having a one second time base to. determine the engine speed.
Usually, frequency conversion apparatus for determining the speed of rotation of a rotating member having teeth other than 60 or a multiple thereof will convert signals from the frequency domain to the time domain and back to the frequency domain. For example, in one prior frequency conversion . apparatus the frequency signal obtained by sensing teeth on the rotating shaft is used to set a time period during which pulses from a fixed oscillator are counted. This time period can be, for example, the time it takes two consecutive teeth on the rotating member to be sensed. A disadvantage with the prior frequency conversion apparatus is that it requires a relatively large number of electronic components because of the change between the frequency and time domains. This larger number of components results in an apparatus 'which is less economical and reliable, and one which requires more electrical power and occupies more space, at least in relation to the present invention.
O PI
Also, the prior frequency conversion apparatus can follow fast rates of change in the speed of rotation of the shaft, but not without a disadvantage given below. This is accomplished by the fact that the time period for counting the oscillator pulses changes as the shaft rotation speed changes. For example, as the shaft speed increases, the time period will decrease due to the increased speed at which the two consecutive teeth are sensed. Since pulses from the fixed oscillator are being counted, and since the variation in time periods occurs in a stepwise manner, the converted frequency will be, disadvantageously, a step function of the input frequency. In other words, the converted frequency will not follow smoothly changes in the input frequency.
Two reasons for not wanting this step function are as follows. In some applications of the frequency conversion circuit, a frequency to DC (F/DC) converter will convert the output frequency of the former to a DC voltage to drive, for example, a chart recorder to provide a trace of the voltage. However, the output voltage of the F/DC converter, and hence the trace, will be a step function when, preferably, it should be smooth since the rotational speed of the shaft may be changing smoothly. Also, it may be desirable to analyze the frequency spectrum of the output frequency signal of the frequency conversion circuit. Spectrum analyzers or Fourier analyzers -which perform this function will provide a better analysis if such an' output frequency signal changes smoothly, rather than stepwise.
OΛ.PI
Disclosure of The Invention
The present invention is directed to overcoming one or more of the problems as set forth above. In one aspect of the present invention, a circuit is provided for converting an input frequency signal to an output frequency signal, comprising means for multiplying the input frequency signal by a'value M to produce a multiple frequency signal, and means for dividing the multiple frequency signal by a value N to produce the output frequency signal.
In another aspect, the present invention includes a method for converting an input frequency signal to an output frequency signal, comprising the steps of multiplying the input frequency signal by a value M to produce a multiple frequency signal, and dividing the. multiple frequency signal by a value N to produce the output frequency signal.
With the present invention, frequency conversion is obtained without any conversion to the time domain. Signal processing occurs entirely in the frequency domain. Therefore, fewer electronic components for the circuit are needed than if conversion to the time domain was required. Also, variations in the input frequency signal are followed smoothly, rather than being followed stepwise.
Brief Description of the Drawings
The single figure is a schematic •illustration of an embodiment of the present invention.
Best Mode of Carrying Out the Invention
The single figure shows a circuit 10 that receives an input frequency signal f. on a line 12 and generates a converted output frequency signal f on a line 14. To generate the•input frequency signal f. on line 12, a rotatable member such as a shaft 16 has a plurality of teeth 18 which can be sensed by a sensor 20. In a conventional manner, the teeth 18 can be magnetic and the sensor 20 can be a magnetic pick-up and pulse- shaper. The latter will sense the teeth 18 as they rotate and produce a square wave frequency signal f. on line 12.
The circuit 10 includes a phase-locked loop 22 which multiplies the frequency signal f. by a value M and provides the multiple frequency signal on an output line 24. The phase-locked loop 22 includes a phase detector or comparator 26 having one input receiving the frequency signal f. on line 12. The . phase detector 26 compares this input frequency signal f. with a frequency signal on a line 28 and generates an error signal on a line 30 which is proportional to the difference in phase between the signals on. line 12 and line 28. A low pass filter 32 filters the error signal on.line 30 and feeds the filtered signal over a line 34 to a compensator 36 for well-known phase-locked loop purposes. The signal from compensator 36 is then fed to a voltage controlled oscillator (VCO) 38 over a line 40.^ The VCO 38 thereby has its output frequency signal on the line 24 controlled by the filtered and' compensated error signal on line 40. A divider 42 divides the frequency signal on line 24 to provide the frequency signal on line 28.
As is conventionally known for phase-locked loops, by placing the divider 42 between the VCO 38 and the phase detector 26, the output frequency signal of the VCO 38 on line 24 will be a multiple M which is the division factor of the divider" 42. For example, if divider 42 is set to divide by 60, then the factor M will be 60, whereby the signal on line 24 is 60 times the frequency signal f. on line 12.
The circuit 10 also includes a divider network 44 which functions to divide the frequency signal on line 24 by a value N. Network 44 includes a divider shown generally at 46 which receives the frequency signal on line 24 and provides the circuit output frequency f on the line 14. The value N can be programmed or preset by a thumbwheel switch shown generally at 48. In the example shown, thumbwheel switch 48 has a l's digit wheel, a 10's digit wheel, and a 100's digit wheel setting so that divider 46 can be set to divide by N for values from 1 to 999. Divider 46 constitutes three counters conventionally coupled as shown.
Mathematically, the circuit 10 can be described by the following equation:
where f. x M is the frequency of the signal on line 24, M is the divisor of divider 42, N is the divisor set by switch 48 for the divider 44, and M and "ft are integers.
Industrial Applicability *
The present invention can be specifically used to determine the speed of an engine. Assume that the shaft 16 is the output shaft of the engine (not shown) and that the number of teeth 18 is 8. This value 8 is the integer N so that thumbwheel switch 48 is set to cause divider 46 to divide by 8." Also, assume that the divider 42 divides by 60, i.e., M = 60. As will be seen, this is to convert the signal f. to the signal f having a frequency as if the number of teeth 18 were 60.
'As the shaft 16 rotates, the signal f. will be generated that is proportional to the speed of rotation of the shaft 16 and hence engine speed. The phase-locked loop 22 then generates the frequency signal f. x 60 on line 24 which is then divided by 8 by the network 44. Thus, the output signal f• x 6£ As can be' appreciated, the signal f is prop1orti.8onal to the engine speed and this signal f can now be fed to, for example, a counter having a one second time base to determine engine speed.
Circuit 10 is a relatively simple circuit having only a phase-locked loop 22 and a divider network 44, each having a relatively small number of components. The signals processed by the circuit 10 are always in the frequency domain. Furthermore, any change in speed of rotation of the shaft 16 will result in a change in the input frequency f. , which change will be smoothly followed by the output -frequency signal f on line 14. This is as a result of the phase-locked loop 22 being locked in phase on the variable input frequency f..
Furthermore-, while the signal f. is shown as first being multiplied and then divided, the reverse process can apply equally. That is, the signal f. can first be divided by N and then multiplied by M.
Other aspects, objects and advantages of this invention can be obtained from a study of the drawings, disclosure and appended claims.
" UR _oy.
Claims
1. A circuit (10) for converting a circuit input frequency signal (f.) to a circuit output frequency signal (f ) , comprising: a) means (22) for multiplying the input frequency signal (f. ) by a value M to produce a multiple frequency signal (f.M) ; and b) means (44) for dividing the multiple frequency signal (f.M) by a v lue N to produce the output frequency signal (f ) , wherein M and N are integers and fo = f1. 
.
2. A circuit (10) according to claim 1 wherein said means (22) for multiplying includes a phase-locked loop being constructed to phase-lock the frequency signal (f.) and the multiple frequency signal (f.M) divided by M.
3. A circuit (10) according to claim 1 wherein said means (44) for dividing is programmable to set N.
.
4. A circuit (10) according to claim 1 wherein said means (44) for dividing includes: a) a programmable counter (46) ; and b) means (48) for programming said counter (46) to count to N.
5. Apparatus (10) for determing the speed of rotation of a rotating member (16) having detectable elements (18) , comprising: a) means (20) for detecting the elements (18) and generating in response thereto a first frequency signal (f.) proportional to the speed of rotation of the member (16) ; b) means (22) for multiplying the first frequency signal (f. ) by a value M to produce a second frequency signal (f.M) ; and c) means (44) for dividing the second frequency signal (f.M) by a value N to produce a third frequency signal (f ) proportional to the speed of rotation of the member (16) , wherein M is proportional to a desired number of detectable elements (18) of the rotating member (16) and N is proportional to the actual number of detectable elements (18) of the member (16) .
6. Apparatus (10) according to claim 5 wherein said means (22) for multiplying includes a phase-locked loop (22) having a multiplying factor of M=60.
-BURE
O PI
7. Apparatus (10) according to claim 6 wherein said phase-locked loop (22) includes: a) a voltage controlled oscillator (38) being constructed to generate the second frequency signal (f.M) ; b) a divider (42) being constructed to divide the second frequency signal (f.M) by M and produce a fourth frequency signal (f.); and c) a phase detector (26) being constructed to detect the difference in phase between the first
•frequency signal (f• ) and the fourth frequency signal (f. ) .
8. Apparatus (10) according to claim 5 wherein said means (44) for dividing includes: a) a programmable counter (46) ; and b) a switch (48) connected to said counter (46) and being constructed to set the number N.
9. A method for converting an input frequency signal (f.) to an output frequency signal (f ) , comprising the steps of: a) multiplying the input frequency signal (f.) by a value M to produce a multiple signal (f.^M) ; and b) dividing the multiple signal (f.M) by a value N to produce the output signal (f ) , wherein
M M and N are integers and f = fi ^ .
10. A method according to claim 9 wherein the step of multiplying includes locking in phase the input frequency signal (f. ) and the multiple signal (f.M) divided by M.
11. A method according to claim 9 wherein the step of dividing includes presetting N.
12. A method for determining the speed of rotation of a rotating member (16) having detectable elements (18) , comprising: a) detecting the elements (18) ; b) generating a first frequency signal
(f. ) proportional to the speed of rotation of the member (16) in response to detecting the elements (18) ; c) multiplying the first frequency signal (f.) by a value M to produce a second frequency signal (f.M).; and d) dividing the second frequency signal (f.M) by a value N to produce a third frequency signal (f ) proportional to the speed of rotation of the member (16), wherein M .is proportional to a desired number of detectable elements (18) of the rotating member (16) and N is proportional to the actual number of detectable elements (18) of the member (16).
13. A method according to claim 12 wherein the step of multiplying includes: a) dividing the second frequency signal (f.M) by M; and b) locking in phase the first frequency signal (f.) and the second frequency signal (f.M) divided by M.-
14. A method according to claim 13 wherein M = 60.
"BU EA OA.PI
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US1979/001057 WO1983002828A1 (en) | 1979-12-05 | 1979-12-05 | Frequency signal conversion apparatus and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US1979/001057 WO1983002828A1 (en) | 1979-12-05 | 1979-12-05 | Frequency signal conversion apparatus and method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO1983002828A1 true WO1983002828A1 (en) | 1983-08-18 |
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ID=22147807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US1979/001057 WO1983002828A1 (en) | 1979-12-05 | 1979-12-05 | Frequency signal conversion apparatus and method |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO1983002828A1 (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3836758A (en) * | 1972-11-01 | 1974-09-17 | Hewlett Packard Co | Wide frequency range counter system utilizing automatic range searching and loop compensation |
| US3882303A (en) * | 1974-04-08 | 1975-05-06 | Us Navy | Digital frequency correlator |
| US3930199A (en) * | 1974-02-07 | 1975-12-30 | Asea Ab | Means for determining frequency |
| US3963987A (en) * | 1971-06-14 | 1976-06-15 | Regie Nationale Des Usines Renault | Method and apparatus for digital calculation of rotational speed of an internal combustion engine |
| SU590673A1 (en) * | 1976-05-11 | 1978-01-30 | Предприятие П/Я А-1877 | Device for measuring shaft rotation angle and speed |
| US4074196A (en) * | 1976-08-02 | 1978-02-14 | Webster Douglas G | Speedometer and odometer apparatus |
| US4167699A (en) * | 1977-03-25 | 1979-09-11 | Stewart-Warner Corporation | User calibrated electronic speedometer and odometer |
-
1979
- 1979-12-05 WO PCT/US1979/001057 patent/WO1983002828A1/en unknown
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3963987A (en) * | 1971-06-14 | 1976-06-15 | Regie Nationale Des Usines Renault | Method and apparatus for digital calculation of rotational speed of an internal combustion engine |
| US3836758A (en) * | 1972-11-01 | 1974-09-17 | Hewlett Packard Co | Wide frequency range counter system utilizing automatic range searching and loop compensation |
| US3930199A (en) * | 1974-02-07 | 1975-12-30 | Asea Ab | Means for determining frequency |
| US3882303A (en) * | 1974-04-08 | 1975-05-06 | Us Navy | Digital frequency correlator |
| SU590673A1 (en) * | 1976-05-11 | 1978-01-30 | Предприятие П/Я А-1877 | Device for measuring shaft rotation angle and speed |
| US4074196A (en) * | 1976-08-02 | 1978-02-14 | Webster Douglas G | Speedometer and odometer apparatus |
| US4167699A (en) * | 1977-03-25 | 1979-09-11 | Stewart-Warner Corporation | User calibrated electronic speedometer and odometer |
Non-Patent Citations (1)
| Title |
|---|
| IBM Technical Disclosure Bulletin, Volume 13, No. 4, issued September 1970 (Armonk, New York), S. Bederman; "Computer And Apparatus For Measuring Rotational Speed", Pages 1017-1018 * |
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