WO1981003087A1 - Temperature-stable microwave integrated circuit delay line - Google Patents

Temperature-stable microwave integrated circuit delay line Download PDF

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Publication number
WO1981003087A1
WO1981003087A1 PCT/US1981/000543 US8100543W WO8103087A1 WO 1981003087 A1 WO1981003087 A1 WO 1981003087A1 US 8100543 W US8100543 W US 8100543W WO 8103087 A1 WO8103087 A1 WO 8103087A1
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Prior art keywords
temperature
substrates
delay line
integrated circuit
substrate
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Application number
PCT/US1981/000543
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French (fr)
Inventor
Y Lee
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Communications Satellite Corp
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Publication of WO1981003087A1 publication Critical patent/WO1981003087A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/30Auxiliary devices for compensation of, or protection against, temperature or moisture effects ; for improving power handling capability
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P9/00Delay lines of the waveguide type
    • H01P9/006Meander lines

Definitions

  • the temperature stable delay line according to this invention has important application for satellite communications, and particularly for on-board satel lite regenerative repeaters employing differentially coherent quaternary phase shift keying (DQPSK) detection directly at the up-link carrier frequency.
  • DQPSK differentially coherent quaternary phase shift keying
  • Such a demodulator detecting a 120 x 10 6 bit per second signal requires a 16.7 nanosecond delay element, and the delayed reference phase must be maintained within 3° over the variable operating environmental conditions. Therefore, the delay stability at higher microwave frequencies of approximately 14 GHz an extremely stable delay circuit is required.
  • This large temperature coefficient is due to the thermal linear expansion coefficient ( ⁇ l ) and the dielectric temperature coefficient ( ⁇ ⁇ ) of the fused silica substrate.
  • the values of the coefficients for this substrate are .5 x 10 -6 parts per degree C. and 10 x 10 -6 parts degree C, respectively.
  • a temperature compensated design scheme was subsequently devised for the above described MIC filter design.
  • the temperature compensated MIC filter delay circuit disclosed by this reference can only be used for a fixed band center frequency, narrow band width application.
  • the temperature compensated design technique disclosed by the reference is the result of a rather complicated heuristic approach.
  • the temperature compensated MIC delay line of the present invention is of simple design, and has broad band application and nearly perfect temperature compensation.
  • the circuit consists only of a plurality of cascaded microstrip transmission lines, and is compact, lightweight and highly reliable because no active components are involved.
  • the design technique for producing such delay lines is simple, being based only on the physical properties of the substrate materials.
  • the delay line of the present invention is composed of cascade connected substrates, for example, a high dielectric barium tetratitanate ceramic microstrip connected to a short sapphire single crystal A1 2 O 3 microstrip section which is in turn connected to a further dielectric substrate of barium tetratitanate.
  • Another object of this invention is to provide a delay line circuit which consists only of cascaded passive microstrip transmissiou lines.
  • a still further object of this invention is to provide a temperature compensated MIC delay circuit which will conform to conventional forms of manufacture, be of simple construction and easy to use so as to provide a device which will be economically feasible, long lasting, and trouble free in operation.
  • Figure 1 is a schematic representation of the temperature compensated delay line of the present invention, illustrating two cascade coonected MIC substrates;
  • Figure 2 is a perspective view of one embodiment of the invention haviug three cascaded substrates integrated into a 16 nanosecond microstrip delay line assembly;
  • Figure 3 is a graphical representation of the measured group delay versus the frequency response of the substrate illustrated in Figure 2;
  • Figure 4 is a further graphical representation of the measured temperature stability characteristic of the delay line illustrated in Figure 2.
  • the numeral 10 generally designates the temperature stable microwave integrated circuit delay line of the present invention.
  • the device includes two separate dielectric substrates 12 and 14 which are made, for example, of barium tetratitanate and sapphire, respectively.
  • the substrates are cascade connected within a substrate carrier 16, which is provided at its ends with input and output leads or connectors 18 and 20.
  • a primary feature of the invention is that the temperature compensated MIC is designed by taking into account the thermal properties of the MIC substrate materials.
  • the transmission phase temperature coefficient of an MIC line is primarily determined by two factors: the linear thermal expansion coefficient, and the dielectric temperature coefficient of the substrate.
  • the dielectric temperature coefficient is negative and has a value of -26.6 x 10 -6 parts per degree C.
  • the linear expansion coefficient is positive and is equal to 9.4 x 10 -6 parts per degree C.
  • the resulting transmission phase temperature coefficient is 3.9 x 10 -6 parts per degree C. at 14 GHz.
  • the dielectric temperature coefficient is 141 x 10 -6 parts per degree C.
  • the linear thermal expansion coefficient is 6.7 x 10 -6 parts per degree C.
  • the transmission phase temperature coefficient in the sapphire microstrip measures -80.1 x 10 -6 parts per degree C. at 14 GHz.
  • phase change in the barium tetratitanate microstrip can be almost completely offset by that in a short sapphire microstrip section when the two are cascade connected, and when line lengths are chosen by the following design equations and criteria.
  • the transmission phase temperature coefficient ( ⁇ ⁇ ) of an MIC line may be determined by the linear thermal expansion coefficient ( ⁇ l ) and the dielectric temperature coefficient ( ⁇ ⁇ ) as follows:
  • ⁇ ⁇ -( ⁇ l + 1 ⁇ 2 ⁇ ⁇ ) + ... (1)
  • T A equal transmission delay in MIC substrate A
  • T B equal transmission delay in MIC substrate
  • Subscripts A and B on the various coefficients indicate the corresponding values for substrates A and B, respectively.
  • microstrip line length on each substrate is denoted by l i . and is determined from the required group delay as shown in the following equation:
  • l i microstrip line length on the i sub-strate
  • T i transmission group delay on the i th substrate
  • V gi the group velocity on the i substrate microstrip, this value being computed from the effective dielectric constant including the frequency dependent microstrip dispersion teem and the additional correction term ⁇ (f).
  • This correction term can either be theoretically computed or experimentally derived. For example, from measurements on 26 ohm BaTi 4 O 9 microstrips, ⁇ (f) was determined to be 0.077 at 14.25 GHz. Thus, the group delay is 7.7% higher than the corresponding phase delay at 14.25 GHz, which is in agreement with the theoretically predicted value.
  • the assembly of a temperature compensated delay line of 16 nanoseconds consists of a 15.93 nanosecond BaTi 4 O 9 microstrip and a 0.77 nanosecond sapphire microstrip.
  • the line impedance of the BaTi 4 O 9 substrate is 26 ohms at the strip width to substrate thickness ratio of 1:1 because the conductor loss in the higher impedanceline is excessive on the 0.015 inch thick substrate.
  • the barium tetratitanate microstrip was photoetched on two 0.015 inch by 2.0 inch by 2.0 inch size substrates 22 and 24.
  • the strip line 28 is disposed in a serpentine-like manner upon the substrate and has a total length of 34.60 inches.
  • the sapphire substrate 26 Between the two barium tetratitanate substrates is provided the sapphire substrate 26.
  • the microstrip on the sapphire substrate is a 3.34 inch long 50 ohm line section, and the substrate dimensions are 0.015 inch by 0.50 inch by 2.0 inches. Simple ⁇ /4-line transformer sections were used for impedance matching at the design frequency band.
  • the spacing between the conductor strips on the barium tetratitanate is 13.2 times the substrate thickness in order to avoid any coupling effects among the folded, serpentine-like lines.
  • the substrates are conductively bonded to a stainless steel housing or substrate carrier 30, and the ends of the microstrips are conductively connected to wave launchers 32 at either end of the carrier.
  • These wave launchers are provided with a center conductor tap of 0.007 inches in width, and the outer section of the connector is provided with an outer diameter of .090 inches.
  • the line interconnections may be made by thermal compression bonding of gold ribbons, and additional electrical shielding may be provided along the substrate interfaces with thin conductor shims integrated into the upper lid (not shown) of the housing or carrier assembly. Tests have been conducted on the delay line assembly of Figure 2, and the results of these tests are seen in Figures 3 and 4.
  • Figure 3 plots the measured group delay versus frequency characteristic of the delay line assembly.
  • the average group delay in the 13.5 to 15.25 GHz frequency band has been plotted, the plot being indicated in dashed line.
  • the average group delay in the 14.0 to 14.5 GHz band has been calculated at 16.8 ⁇ 0.1 nanoseconds.
  • the figure further illustrates the nearly flat broad band frequency response of the delay line. Also plotted in this figure are the calibration lines at 5 nanosecond intervals beginning at zero.
  • test data of the delay temperature characteristic is depicted for a temperature variation of approximately 130 degrees F.
  • a modified "pi-point" method was used for the precision measurement of the temperature stability, which is made with the high accuracy of frequency measurements.
  • the technique according to the present invention provides excellent temperature compensated delay performance in an MIC circuit. Further improved thermal stability can be obtained when further temperature coefficient terms (such as the quadratic and higher order terms) in the two substrates are taken into account in the design procedure.
  • the transmission loss through the delay line assembly was 23.6 dB at 14.25 GHz.
  • the loss in the circuit is primarily due to the conductor loss of the microstrip lines. This loss can be reduced with wider strip widths either by lower line impedance at a fixed substrate thickness or by increased substrate thickness at a constant impedance level.
  • the respective substrates used in the delay line apparatus are not limited to the barium tetratitanate and sapphire substrates which are disclosed, as long as the physical properties of the respective substrates are such that they are of opposite sign in their transmission phase temperature coefficient.
  • the design procedure remain the same, although the physical dimensions and other characteristics of the substrates may vary.
  • such a delay line apparatus may be constructed of any number of substrates, and it is not intended by this disclosure to limit the number of substrates so cascaded to merely two or three. It is intended to cover in the appended claims all such variations and modifications as fall within the true spirit and scope of the invention.

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Abstract

A temperature-stable microwave integrated circuit (MIC) delay line (10) employs at least two cascade connected dielectric substrates (12, 14), for example, a high dielectric barium tetratitanate (Ba- Ti409) ceramic microstrip (22), and a short sapphire single crystal Al203 microstrip section (26). Temperature changes in the transmission phase are compensated for by selecting the substrate materials such that the positive transmission phase temperature coefficient of one substrate is effectively cancelled out by the negative transmission phase temperature coefficient of the other sub-strate. In this manner, the transmission delay temperature coefficient of the composite delay line may be reduced to a value of 0.6(+- 0.3) x 10- 6 parts per degree C. at 14 GHz over the temperature range of 20 degrees C. +- 30 degrees C.

Description

TEMPERATURE-STABLE MICROWAVE INTEGRATED CIRCUIT DELAY LINE
BACKGROUND OF THE INVENTION The temperature stable delay line according to this invention has important application for satellite communications, and particularly for on-board satel lite regenerative repeaters employing differentially coherent quaternary phase shift keying (DQPSK) detection directly at the up-link carrier frequency. Due to the environment in which it is used, a very temperature stable one symbol delay circuit is a key element in the design of an integrated microwave DOPSK demodulator of an on-board satellite communication system. Such a demodulator detecting a 120 x 106 bit per second signal requires a 16.7 nanosecond delay element, and the delayed reference phase must be maintained within 3° over the variable operating environmental conditions. Therefore, the delay stability at higher microwave frequencies of approximately 14 GHz an extremely stable delay circuit is required.
DESCRIPTION OF THE PRIOR ART
In conventional earth bound microwave communication systems, RF coaxial cables have been used for delay line purposes. However, such cables are too bulky for satellite usage, and furthermore cannot satisfy the temperature stability reσuirements without the necessity of a temperature controlled oven or other additional control means being added. Clearly, the necessity of adding such additional temperature compensating or controlling means is of great disad vantage in the satellite environment due to the fact that such an oven will draw continuous power, and will add unnecessarily to the payload weight of the satellite as well.
As disclosed in Lee, "14 GHz MIC 16 Nanosecond Delay Filter for Differentially Coherent OPSK Regenerative Repeater" 1978 IEEE MTT-S International Microwaves Symposium Digest, at pages 37-40, a compact 14 GHz MIC parallel coupled 16 nanosecond delay filter, photoetched on a fused silica substrate, has been prepared. An integrated DQPSK demodulator was developed using the fused silica delay filter for the detection of a 120 mega bit per second signal directly at 14 GHz for the implementation of a regenerative repeater. This fused silica MIC delay filter has a disadvantage in that it has a rather large transmission phase temperature coefficient (αΦ) of -5.3 x 10-6 parts per degree C. at the band center frequency.
This large temperature coefficient is due to the thermal linear expansion coefficient (αl) and the dielectric temperature coefficient (αε ) of the fused silica substrate. The values of the coefficients for this substrate are .5 x 10-6 parts per degree C. and 10 x 10-6 parts degree C, respectively. As disclosed in Assal et al, "Temperature Compensated MIC Filter for Onboard Satellite Regenerators," Eighth European Microwave Conference, September 1978; a temperature compensated design scheme was subsequently devised for the above described MIC filter design. However, the temperature compensated MIC filter delay circuit disclosed by this reference can only be used for a fixed band center frequency, narrow band width application. Moreover, the temperature compensated design technique disclosed by the reference is the result of a rather complicated heuristic approach.
SUMMARY OF THE INVENTION The temperature compensated MIC delay line of the present invention is of simple design, and has broad band application and nearly perfect temperature compensation. The circuit consists only of a plurality of cascaded microstrip transmission lines, and is compact, lightweight and highly reliable because no active components are involved. Moreover, the design technique for producing such delay lines is simple, being based only on the physical properties of the substrate materials.
The delay line of the present invention is composed of cascade connected substrates, for example, a high dielectric barium tetratitanate ceramic microstrip connected to a short sapphire single crystal A12O3 microstrip section which is in turn connected to a further dielectric substrate of barium tetratitanate.
It is an object of this invention to provide a temperature stable microwave integrated circuit delay line having a near zero temperature sensitivity.
Another object of this invention is to provide a delay line circuit which consists only of cascaded passive microstrip transmissiou lines.
It is a further object of the present invention to provide a simple temperature compensated delay line comprising a plurality of cascaded substrates having single microstrip lines, and therefore no band width limitation.
It is a further object of this invention to provide a reliable lightweight and compact circuit containing no active components which can be manufactured by a simple design technique based upon the physical properties of the substrate materials.
A still further object of this invention is to provide a temperature compensated MIC delay circuit which will conform to conventional forms of manufacture, be of simple construction and easy to use so as to provide a device which will be economically feasible, long lasting, and trouble free in operation.
These, together with other objects and advantages which will become subsequently apparent, reside in the details of construction and operation as more fully hereinafter described and claimed, reference being had to the accompanying drawings forming a part hereof, wherein like numerals refer to like parts throughout.
BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic representation of the temperature compensated delay line of the present invention, illustrating two cascade coonected MIC substrates;
Figure 2 is a perspective view of one embodiment of the invention haviug three cascaded substrates integrated into a 16 nanosecond microstrip delay line assembly;
Figure 3 is a graphical representation of the measured group delay versus the frequency response of the substrate illustrated in Figure 2; and
Figure 4 is a further graphical representation of the measured temperature stability characteristic of the delay line illustrated in Figure 2.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now more specifically to the drawings, and in particular to Figure 1, the numeral 10 generally designates the temperature stable microwave integrated circuit delay line of the present invention. The device includes two separate dielectric substrates 12 and 14 which are made, for example, of barium tetratitanate and sapphire, respectively. The substrates are cascade connected within a substrate carrier 16, which is provided at its ends with input and output leads or connectors 18 and 20. A primary feature of the invention is that the temperature compensated MIC is designed by taking into account the thermal properties of the MIC substrate materials. The transmission phase temperature coefficient of an MIC line is primarily determined by two factors: the linear thermal expansion coefficient, and the dielectric temperature coefficient of the substrate. By selecting at least two different substrate materials having different physical properties, the positive phase change due to temperature variation in one MIC may be effectively cancelled out by the negative phase change in the other MIC as illustrated schematically in Figure 2.
In the barium tetratitanate (BaTi4O9) microstrip 12, the dielectric temperature coefficient is negative and has a value of -26.6 x 10-6 parts per degree C.
The linear expansion coefficient is positive and is equal to 9.4 x 10-6 parts per degree C. The resulting transmission phase temperature coefficient is 3.9 x 10-6 parts per degree C. at 14 GHz.
In contrast to the specific properties of barium tetratitanate, many convectional and well known dielectric substrates such as alumina and fused silica have positive temperature coefficients in both dielectrie constant and dimensional expansion. For example, in single crystal sapphire with the C axis parallel to the electric field, the dielectric temperature coefficient is 141 x 10-6 parts per degree C. and the linear thermal expansion coefficient is 6.7 x 10-6 parts per degree C. Thus, the transmission phase temperature coefficient in the sapphire microstrip measures -80.1 x 10-6 parts per degree C. at 14 GHz. Thus, it can be seen that the phase change in the barium tetratitanate microstrip can be almost completely offset by that in a short sapphire microstrip section when the two are cascade connected, and when line lengths are chosen by the following design equations and criteria.
The transmission phase temperature coefficient (αΦ) of an MIC line may be determined by the linear thermal expansion coefficient (αl) and the dielectric temperature coefficient (αε ) as follows:
αφ = -(αl + ½αε) + ... (1)
The exact equation can include higher order temperature coefficients in thermal expansion and dielectric constant. However, as the value of such higher order terms rapidly diminishes toward zero, the above equation provides an adequate determination of αΦ for present purposes.
Assuming that only two different substrate materials, A and B, are used for the temperature compensated MIC delay line .shown in Figure 1, the following considerations become apparent. That is TO = TA + TB. The total group delay TO is the sum of the transmission delay in the two cascaded microwave integrated circuits, these delays being represented by TA and TB. Given the condition that zero transmission phase variation is desired in the overall circuit, the required group delay in each substrate MIC line is computed as shown in the following equations:
(2)
Figure imgf000008_0001
(3)
Figure imgf000008_0002
where: TA equal transmission delay in MIC substrate A; TB equal transmission delay in MIC substrate
B; and Subscripts A and B on the various coefficients indicate the corresponding values for substrates A and B, respectively.
These values of TA and TB are derived from the constraint that the temperature compensated condition be described by the following equation: αΦA TA + αφB TB = 0 <4>
That is, zero transmission phase variation is desired in the overall circuit.
The microstrip line length on each substrate is denoted by li. and is determined from the required group delay as shown in the following equation:
li = Vgi Ti (i = 1 , 2 , 3. . . ) (5)
where: l i = microstrip line length on the i sub-strate Ti = transmission group delay on the ith substrate, and Vgi = the group velocity on the i substrate microstrip, this value being computed from the effective dielectric constant including the frequency dependent microstrip dispersion teem and the additional correction term Δ (f). This correction term can either be theoretically computed or experimentally derived. For example, from measurements on 26 ohm BaTi4O9 microstrips, Δ (f) was determined to be 0.077 at 14.25 GHz. Thus, the group delay is 7.7% higher than the corresponding phase delay at 14.25 GHz, which is in agreement with the theoretically predicted value. Referring now to Figure 2, the assembly of a temperature compensated delay line of 16 nanoseconds consists of a 15.93 nanosecond BaTi4O9 microstrip and a 0.77 nanosecond sapphire microstrip. The line impedance of the BaTi4O9 substrate is 26 ohms at the strip width to substrate thickness ratio of 1:1 because the conductor loss in the higher impedanceline is excessive on the 0.015 inch thick substrate. As shown in Figure 3, the barium tetratitanate microstrip was photoetched on two 0.015 inch by 2.0 inch by 2.0 inch size substrates 22 and 24. The strip line 28 is disposed in a serpentine-like manner upon the substrate and has a total length of 34.60 inches. Between the two barium tetratitanate substrates is provided the sapphire substrate 26. The microstrip on the sapphire substrate is a 3.34 inch long 50 ohm line section, and the substrate dimensions are 0.015 inch by 0.50 inch by 2.0 inches. Simple λ/4-line transformer sections were used for impedance matching at the design frequency band.
The spacing between the conductor strips on the barium tetratitanate is 13.2 times the substrate thickness in order to avoid any coupling effects among the folded, serpentine-like lines.
The substrates are conductively bonded to a stainless steel housing or substrate carrier 30, and the ends of the microstrips are conductively connected to wave launchers 32 at either end of the carrier. These wave launchers are provided with a center conductor tap of 0.007 inches in width, and the outer section of the connector is provided with an outer diameter of .090 inches. The line interconnections may be made by thermal compression bonding of gold ribbons, and additional electrical shielding may be provided along the substrate interfaces with thin conductor shims integrated into the upper lid (not shown) of the housing or carrier assembly. Tests have been conducted on the delay line assembly of Figure 2, and the results of these tests are seen in Figures 3 and 4. Figure 3 plots the measured group delay versus frequency characteristic of the delay line assembly. As seen in this Figure, the average group delay in the 13.5 to 15.25 GHz frequency band has been plotted, the plot being indicated in dashed line. The average group delay in the 14.0 to 14.5 GHz band has been calculated at 16.8 ± 0.1 nanoseconds. The figure further illustrates the nearly flat broad band frequency response of the delay line. Also plotted in this figure are the calibration lines at 5 nanosecond intervals beginning at zero. In Figure 4, test data of the delay temperature characteristic is depicted for a temperature variation of approximately 130 degrees F. A modified "pi-point" method was used for the precision measurement of the temperature stability, which is made with the high accuracy of frequency measurements. As seen in Figure 4, the transmission peaks are essentially temperature stable, the transmission phase temperature coefficient being computed at the 14 GHz band as αΦ = 0.6 (± 0.3) x 10-6 parts per degree C. in the temperature range of minus 6 degrees C. to 57 degrees C. (approximately 21 degrees F. to 135 degrees F.).
Thus, the above temperature stability result demonstrates that the technique according to the present invention provides excellent temperature compensated delay performance in an MIC circuit. Further improved thermal stability can be obtained when further temperature coefficient terms (such as the quadratic and higher order terms) in the two substrates are taken into account in the design procedure. The transmission loss through the delay line assembly was 23.6 dB at 14.25 GHz. The loss in the circuit is primarily due to the conductor loss of the microstrip lines. This loss can be reduced with wider strip widths either by lower line impedance at a fixed substrate thickness or by increased substrate thickness at a constant impedance level.
While the foregoing embodiment is at present considered to be preferred, it is understood that numerous variations and modifications may be made therein by those skilled in the art. For example, the respective substrates used in the delay line apparatus . are not limited to the barium tetratitanate and sapphire substrates which are disclosed, as long as the physical properties of the respective substrates are such that they are of opposite sign in their transmission phase temperature coefficient. Of course, if other materials are used for the substrates, the design procedure remain the same, although the physical dimensions and other characteristics of the substrates may vary. Further, such a delay line apparatus may be constructed of any number of substrates, and it is not intended by this disclosure to limit the number of substrates so cascaded to merely two or three. It is intended to cover in the appended claims all such variations and modifications as fall within the true spirit and scope of the invention.

Claims

1. A temperature-stable microwave integrated circuit delay line comprising at least two cascade connected dielectric substrates, each having a microstrip formed thereon, wherein at least one of the substrates has a transmission phase temperature coefficient of opposite sign with respect to the remaining substrates.
2. A temperature-stable microwave integrated circuit delay line as defined in claim 1, wherein each said substrate has a transmission delay time, the total transmission delay time of the microwave circuit being equal to the sum of the individual transmission delay times of the substrates.
3. A temperature-stable microwave integrated circuit delay line, comprising at least one substrate formed of a first dielectric material, and at least one substrate formed of a second dielectric material, said substrates being cascade connected.
4. A temperature-stable microwave integrated circuit delay line as defined in claim 3, wherein each of said substrates has a transmission delay time, the delay time for each substrate being defined by the equation:
Figure imgf000013_0001
and
Figure imgf000013_0002
where: TA = delay time of a substrate formed of said first dielectric material; TB = delay time of a substrate formed of said second dielectric material; αΦA = transmission phase temperature coefficient of said first dielectric material; αΦB = transmission phase temperature coeffi cient of said second dielectric material; and TO = total delay time of the delay line.
5. A temperature-stable microwave integrated circuit delay line as defined in claims 2 or 4, wherein said first and second dielectric materials comprise barium tetratitanate and sapphire, respectively.
6. A temperature-stable microwave integrated circuit delay line as defined in claims 2 or 4, wherein said substrates are disposed within, and conductively bonded to a housing, and input and output wave launchers are provided on said housing and are conductively connected to the microstrips on said substrates.
PCT/US1981/000543 1980-04-25 1981-04-27 Temperature-stable microwave integrated circuit delay line WO1981003087A1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641113A (en) * 1983-05-02 1987-02-03 Susumu Industrial Co., Ltd. Delay line device having symmetrical delay path

Citations (5)

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Publication number Priority date Publication date Assignee Title
US3553409A (en) * 1968-10-15 1971-01-05 Tek Wave Inc Circuit frame
US3617955A (en) * 1969-04-08 1971-11-02 Bell Telephone Labor Inc Temperature compensated stripline filter
US3638148A (en) * 1970-06-25 1972-01-25 Collins Radio Co Lid interaction protected shield enclosed dielectric mounted microstrip
US3798578A (en) * 1970-11-26 1974-03-19 Japan Broadcasting Corp Temperature compensated frequency stabilized composite dielectric resonator
EP0013019A1 (en) * 1978-12-28 1980-07-09 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. Method and device for the compensation of the thermal phase variations in the transfer function of a distributed parameters two-port device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3553409A (en) * 1968-10-15 1971-01-05 Tek Wave Inc Circuit frame
US3617955A (en) * 1969-04-08 1971-11-02 Bell Telephone Labor Inc Temperature compensated stripline filter
US3638148A (en) * 1970-06-25 1972-01-25 Collins Radio Co Lid interaction protected shield enclosed dielectric mounted microstrip
US3798578A (en) * 1970-11-26 1974-03-19 Japan Broadcasting Corp Temperature compensated frequency stabilized composite dielectric resonator
EP0013019A1 (en) * 1978-12-28 1980-07-09 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. Method and device for the compensation of the thermal phase variations in the transfer function of a distributed parameters two-port device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Electronic Design News, issued December 1963, STANLEY H. GORDON, a Miniature Monostrip Delay Line for Nanosecond Pulses, pages 32-39 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4641113A (en) * 1983-05-02 1987-02-03 Susumu Industrial Co., Ltd. Delay line device having symmetrical delay path

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