USRE41583E1 - Frequency-stabilized transceiver configuration - Google Patents
Frequency-stabilized transceiver configuration Download PDFInfo
- Publication number
- USRE41583E1 USRE41583E1 US11/657,379 US65737907A USRE41583E US RE41583 E1 USRE41583 E1 US RE41583E1 US 65737907 A US65737907 A US 65737907A US RE41583 E USRE41583 E US RE41583E
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- frequency
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- digital data
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- 238000012545 processing Methods 0.000 claims abstract description 19
- 238000005070 sampling Methods 0.000 claims abstract description 18
- 230000035559 beat frequency Effects 0.000 claims abstract description 13
- 239000013078 crystal Substances 0.000 claims description 27
- 238000000034 method Methods 0.000 claims description 15
- 238000004891 communication Methods 0.000 claims description 12
- 238000012937 correction Methods 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 description 7
- 238000012546 transfer Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 238000001914 filtration Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 230000010363 phase shift Effects 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 238000012549 training Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/007—Demodulation of angle-, frequency- or phase- modulated oscillations by converting the oscillations into two quadrature related signals
Definitions
- the invention relates to a frequency-stabilized transceiver configuration which is intended to be used in communication terminals for wire-connected and/or wireless communication.
- the transceiver configuration has an A/D converter outputting a first digital data signal, a D/A converter, and a controllable oscillator circuit.
- the controllable oscillator circuit has a reference oscillator with an oscillating crystal as a resonator and outputs a sampling clock received by the A/D converter and the D/A converter.
- a digital data processing circuit receives the first digital data signal output by the A/D converter and processes, it further and outputs a second digital data signal to the D/A converter.
- a frequency section being a radio-frequency and/or an intermediate-frequency section is provided and has a frequency converter stage operated with a beat frequency derived from the controllable oscillator circuit.
- transceiver configurations are known and described, for example, in the article titled “Radio Frequency Integrated Circuit Technology for Low-Power Wireless Communications”, L. E. Larson, IEEE Personal Communications, Pages 11-19, June 1998.
- a central variable in the transmission of messages is the bandwidth available for transmission since it limits the maximum achievable number of messages which can be transmitted per unit time when a minimum transmission quality is stipulated. As a rule, the available bandwidth is limited. Apart from software approaches to the bandwidth problem which are also based on stipulating a suitable data structure, the best-possible utilization of the available bandwidth must also always be ensured on the hardware side.
- the available total bandwidth is divided into traffic channels with predetermined channel bandwidths, a certain traffic channel being assigned to a subscriber when he accesses the mobile radio network.
- the radio-frequency section of the communication terminal is set to the assigned channel frequency by the frequency converter stage and any bandwidth limiting of the signal received or to be transmitted, which is required for avoiding inter-channel cross-talk, is usually implemented is the intermediate-frequency, low-frequency or baseband region by filtering out signal components not needed by appropriate analog or digital bandpass or low pass filters.
- the frequency converter stage To obtain the best-possible utilization of the channel bandwidth, it must be possible to adjust the frequency converter stage to the required channel frequency with high accuracy and stability with time.
- the oscillator circuit operating the frequency converter stage must have high frequency stability.
- a controller QDMC for a quadrature demodulator which is implemented in the form of a chip.
- the controller exhibits two A/D converters for the I and Q signal branch and also contains a voltage controlled oscillator (VCO).
- VCO voltage controlled oscillator
- the phase lock loop (PLL) control loop of the VCO contains an operational amplifier operated in a negative feedback circuit, the output of which is supplied to an oscillating crystal used as a resonator.
- the oscillating crystal and the negative feedback circuit of the operational amplifier (series circuit formed of a resistor and a capacitor) are constructed as external components which are not integrated in the chip.
- a transceiver configuration for a communication terminal.
- the transceiver configuration contains an A/D converter outputting a first digital data signal, a D/A converter and a controllable oscillator circuit connected to the A/D converter and to the D/A converter.
- the controllable oscillator circuit has a reference oscillator with an oscillating crystal as a resonator and outputs a sampling clock received by the A/D converter and the D/A converter.
- a digital data processing circuit is connected to the A/D converter and to the D/A converter and receives the first digital data signal output by the A/D converter and processes it further and outputs a second digital data signal to the D/A converter.
- the A/D converter, the D/A converter, the data processing circuit and the controllable oscillator circuit, apart from the oscillating crystal of the reference oscillator, are constructed as a monolithically integrated circuit so that of the controllable oscillator circuit, only the oscillating crystal is implemented as an external component.
- a frequency section being a radio-frequency section and/or an intermediate-frequency section is connected to the A/D converter, to the D/A converter and to the controllable oscillator circuit.
- the frequency section has a frequency converter stage operating with a beat frequency derived from the controllable oscillator circuit.
- circuit configuration according to the invention which is advantageous from the point of view of costs, is achieved if the integrated circuit contains other elements such as a digital filter, a channel estimator or a data detector.
- the digital data processing circuit has a digital filter and a digital modulator.
- the digital data processing circuit has a channel estimator.
- a data detector is connected to the channel estimator.
- FIG. 1 is a block circuit diagram of a circuit configuration according to the invention
- FIG. 2 is a block circuit diagram of a circuit of an oscillator circuit shown in FIG. 1 ;
- FIG. 3 is a circuit diagram of a reference oscillator shown in FIG. 2 .
- FIG. 1 there is shown an integrated circuit (IC) 1 provided for a communication terminal, for example a mobile telephone.
- the IC 1 contains a data processing circuit 2 , an A/D converter 6 , a D/A converter 7 and an oscillator circuit (VCO: voltage controlled oscillator) 8 .
- VCO voltage controlled oscillator
- the extent of the data processing circuit 2 is indicated by a dashed borderline in FIG. 1 .
- the data processing circuit 2 contains a digital signal conversion circuit 3 with a digital filter 3 ′ contained therein, a channel estimator 4 and a digital I/Q modulator 5 .
- the data processing circuit 2 can exhibit, in a manner not shown, other digital circuit and control elements such as, for example, storage elements, micro-processors, micro-controllers, etc. and also other digital circuits such as, for example, a data detector D etc. which will still be mentioned in the text which follows.
- An oscillator frequency f oz generated by the VCO 8 can be varied via a control input 9 of the VCO 8 and is provided at an oscillator output 10 of the VCO 8 as a system clock to the IC 1 and especially as a sampling frequency to the A/D converter 6 and the D/A converter 7 .
- the IC 1 operating in the low-frequency or baseband region is connected to a radio-frequency section 11 of a communication terminal.
- the radio-frequency section 11 can exhibit first and second down converters 13 , 14 which accept a received signal provided by a receiving antenna 12 .
- the down converters 13 , 14 are operated with beat or mixed frequency signals 16 , 17 which are phase-shifted by 90° with respect to one another and which are generated by a 90° phase shifter 15 .
- analog output received signals 24 , 25 of the two down converters 13 , 14 also exhibit a 90° phase shift (so-called in-phase I and quadrature Q branch).
- the analog output received signals 24 , 25 are supplied to corresponding I and Q inputs of the A/D converter 6 which digitizes them independently of one another.
- analog I and Q output signals 26 , 27 which are also phase-shifted by 90° and are output by the D/A converter 7 are superimposed on one another in an adding stage 19 of the radio-frequency section 11 and an output transmit signal 28 formed in an adding stage 19 is supplied as input signal to an up converter 18 .
- the up converter 18 converts the output transmit signal 28 , by mixing it with a beat or mixing frequency signal 20 , into a transmit signal which is conducted to a transmitting antenna 21 (which, in practice, is identical to the receiving antenna 12 ) and is radiated by it.
- the radio-frequency section 11 has an n:m frequency multiplier 22 , the input of which is supplied with the oscillator frequency f oz and which generates both the beat frequency signal 20 for the up converter 18 and a beat or mixing frequency signal 23 , which forms the basis of the down conversion, for the 90° phase shift 15 .
- the latter signals 20 , 23 are sinusoidal oscillations at a frequency f ⁇ (n/m)*f oz , n and m being integral numbers which, as a rule, are different for the two signals 20 , 23 .
- the radio-frequency section 11 can be implemented in many other ways than those shown here and, in addition, can also contain, for example, an intermediate-frequency stage and suitable bandpass filters for limiting the bandwidth.
- GSM global system for mobile communication
- the two down converters 13 , 14 are operated by the frequency multiplier 22 , by selecting suitable values for n and m, in such a manner that the analog output received signals 24 , 25 (I and Q branch) generated are in the low-frequency or baseband region. They can thus be sampled and digitized without problems by the A/D converter 6 .
- Digital data signals 29 (I branch) and 30 (Q branch), generated by the A/D converter 6 are supplied to the signal conversion circuit 3 .
- the signal conversion circuit 3 produces, if necessary, a digital frequency shift for the digital data signals 29 , 30 received, and subsequent digital filtering.
- the digital filtering provides the required bandwidth limiting ( ⁇ 200 kHz) of the transmission path at the receiving end. It can be implemented, for example, by a digital low-pass filter contained in the signal conversion circuit 3 (in the case of data signals 29 , 30 in the baseband region) or a digital bandpass filter (in the case of data signals 29 , 30 in the low-frequency region).
- the signal conversion circuit 3 is followed by the channel estimator 4 , the task of which consists of continuously (approximately every 0.5 ms) determining a current transfer function of the mobile radio channel by use of predetermined data sequences (so-called training sequences) which are regularly radiated by the base station and are known to the channel estimator 4 .
- the transfer function characterizes the instantaneous transfer characteristic of the mobile radio channel. The continuous predetermination of the transfer function is necessary because the wave propagation in the air interface of the mobile radio channel continuously changes due to changing environmental influences (for example, shielding and reflection on buildings).
- the transfer functions determined (estimated) and the filtered digital received data are applied to a data detector D, via an output 31 of the channel estimator 4 .
- the detector D detects a digital data signal originally sent by using the transfer functions obtained.
- further digital processing steps demultiplexing, channel decoding, source decoding
- the configuration of the data processing circuit 2 depends to a great extent on the actual field of application of the communication terminal.
- the channel estimator 4 can be omitted especially in the case of communication terminals which are connected by wire or optical fiber.
- the operation at the transmitter end of the communication terminal is largely analogous to the operation at the receiver end described above.
- the digital I/Q modulator 5 is supplied with a digital input signal E, which may first have been source-encoded, channel-encoded and multiplexed, via an input 32 .
- the digital I/Q modulator 5 keys the digital input signal E using a predetermined modulation method, for example Gaussian minimum shift keying (GMSK) and, at the same time, limits the bandwidth.
- GMSK Gaussian minimum shift keying
- the I/Q modulator 5 provides the D/A converter 7 with keyed (modulated) digital data signals 33 , 34 .
- the frequencies of the corresponding analog I and Q output signals 26 , 27 are then converted in the up converter 18 in the manner already described.
- a variation with time of the oscillator frequency f oz caused by frequency drift or frequency noise causes a corresponding change in the frequencies of the digital I and Q data signals 29 , 30 (at the receiving end) and the radio wave radiated (at the transmitting end).
- This is based on the fact that the beat frequency signals 20 , 23 supplied to the down and up converters 13 , 14 ; 18 are derived from the oscillator frequency f ox and thus also contain its frequency instabilities.
- Such frequency changes occurring at the receiving and transmitting end are unwanted since they result in a mismatch of the signals to the filtering (at the receiving end) in the signal conversion circuit 3 and, respectively, to the traffic channel frequency assigned (at the transmitting end). In both cases, effective bandwidth losses occur and increased inter-channel cross-talk may occur.
- Frequency drifts of the oscillator frequency f oz are corrected via the control input 9 of the VCO 8 .
- it can be performed, for example, during the frequency correction of the VCO 8 , which is necessary in any case, for taking into consideration the Doppler frequency shift between transmitted and received radio waves.
- the base station radiates at regular time intervals (for example every 47 ms), a frequency correction burst (FCB) in the form of a sinusoidal oscillation.
- FCB frequency correction burst
- the FCB is searched for, in a manner not shown in greater detail, in the radio-frequency stage 11 with a frequency pattern (for example 20 kHz spacing).
- the frequency standard can be determined with the accuracy of the spacing by tuning to the pattern frequency having the maximum received FCB signal strength.
- the oscillator frequency f oz is then suitably corrected via a control voltage signal output by the radio-frequency section 11 and supplied to the control input 9 of the VCO 8 .
- the frequency noise of the VCO 8 is component-related and is mainly generated in a reference oscillator which can be considered to be the resonator of the VCO 8 .
- VCO 8 If maximum freedom from noise is required from the VCO 8 , (expensive) hybrid components must be used for the VCO 8 or its reference oscillator. According to the invention, however, the entire VCO 8 is constructed integrally in the IC 1 with the exception of an oscillating crystal 800 . As a result, a compromise between lower frequency noise and inexpensive construction is achieved which, in practice, is advantageous for a large number of applications.
- FIG. 2 shows by way of example a circuit diagram of the VCO 8 which is here configured in the form of PLL control loop.
- the VCO 8 exhibits the aforementioned reference oscillator 80 , a controller 81 , a tracking oscillator 82 , a phase detector 83 and a comparison circuit 84 .
- the comparison circuit 84 is supplied with an output voltage signal of the phase detector 83 and a control voltage signal present at the control input 9 . From these two voltage signals, the comparison circuit 84 determines, for example by subtraction, a control error signal which is conducted to the controller 81 .
- the controller 81 controls, depending on the control error signal, the voltage controlled oscillator 82 which then generates a voltage signal U oz with the oscillator frequency f oz .
- the PLL control loop is closed by the phase detector 83 which determines the phase shift between a voltage signal U s at the frequency f s , which is accepted by the reference oscillator 80 , and the voltage signal U oz of the oscillator frequency f oz , and returns this as an output voltage signal to the comparison circuit 84 as described.
- FIG. 3 shows a circuit diagram of the reference oscillator 80 .
- the circuit configuration of the reference oscillator 80 is known and is called a “Hartley Oscillator” in the art. It has an inductance L and a capacitor C which is connected in parallel with the inductance L.
- An oscillating crystal 800 connected in a positive feedback circuit to a transistor T is used as the resonator 800 .
- An adjustable capacitor C s is connected in series with the oscillating crystal 800 and a resistor R is connected to a transistor T.
- the inductance L, the transistor T, the adjustable capacitor C s and the resistor R are constructed integrally in IC 1 , where the oscillating crystal 800 is not an integral element of IC 1 .
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transceivers (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Superheterodyne Receivers (AREA)
- Transmitters (AREA)
Abstract
Description
Claims (29)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/657,379 USRE41583E1 (en) | 1998-10-22 | 2007-01-24 | Frequency-stabilized transceiver configuration |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19848797 | 1998-10-22 | ||
PCT/DE1999/003274 WO2000025419A1 (en) | 1998-10-22 | 1999-10-12 | Frequency-stabilized receiver/transmitter circuit arrangement |
US09/840,551 US6847812B2 (en) | 1998-10-22 | 2001-04-23 | Frequency-stabilized transceiver configuration |
US11/657,379 USRE41583E1 (en) | 1998-10-22 | 2007-01-24 | Frequency-stabilized transceiver configuration |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/840,551 Reissue US6847812B2 (en) | 1998-10-22 | 2001-04-23 | Frequency-stabilized transceiver configuration |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE41583E1 true USRE41583E1 (en) | 2010-08-24 |
Family
ID=7885341
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/840,551 Ceased US6847812B2 (en) | 1998-10-22 | 2001-04-23 | Frequency-stabilized transceiver configuration |
US11/657,379 Expired - Lifetime USRE41583E1 (en) | 1998-10-22 | 2007-01-24 | Frequency-stabilized transceiver configuration |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/840,551 Ceased US6847812B2 (en) | 1998-10-22 | 2001-04-23 | Frequency-stabilized transceiver configuration |
Country Status (6)
Country | Link |
---|---|
US (2) | US6847812B2 (en) |
EP (1) | EP1127405A1 (en) |
JP (1) | JP2002528985A (en) |
KR (1) | KR100427854B1 (en) |
CN (1) | CN1149734C (en) |
WO (1) | WO2000025419A1 (en) |
Families Citing this family (18)
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EP1127405A1 (en) | 1998-10-22 | 2001-08-29 | Infineon Technologies AG | Frequency-stabilized receiver/transmitter circuit arrangement |
EP1170874A1 (en) | 2000-07-05 | 2002-01-09 | Infineon Technologies AG | Receiver, especially for mobile communications |
KR100446540B1 (en) * | 2001-04-16 | 2004-09-01 | 삼성전자주식회사 | Transmitter for a data communication |
WO2003058834A1 (en) * | 2002-01-11 | 2003-07-17 | Koninklijke Philips Electronics N.V. | Method for providing clock signals to transceiver chip and transceiver chip |
JP2003219291A (en) * | 2002-01-22 | 2003-07-31 | Alps Electric Co Ltd | Integrated circuit for tuner and television tuner employing the same |
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US6944432B2 (en) * | 2002-11-12 | 2005-09-13 | Nokia Corporation | Crystal-less oscillator transceiver |
JP4015008B2 (en) * | 2002-11-21 | 2007-11-28 | 株式会社ルネサステクノロジ | Semiconductor integrated circuit for communication and wireless communication system |
DE102004043635A1 (en) * | 2004-04-01 | 2005-10-20 | Conti Temic Microelectronic | Method and device for demodulation |
US7231530B1 (en) * | 2004-04-06 | 2007-06-12 | Cisco Technology, Inc. | System and method for saving power in a wireless network by reducing power to a wireless station for a time interval if a received packet fails an integrity check |
US7606328B1 (en) * | 2004-06-18 | 2009-10-20 | Rockwell Collins, Inc. | Common signal generation for an RF receiver |
JP2006295761A (en) * | 2005-04-14 | 2006-10-26 | Mitsubishi Electric Corp | Radio base station |
JP2006319393A (en) * | 2005-05-10 | 2006-11-24 | Renesas Technology Corp | Semiconductor integrated circuit for communication, and wireless communication apparatus |
JP2007096762A (en) * | 2005-09-29 | 2007-04-12 | Toshiba Corp | Radio device |
JP2009531924A (en) * | 2006-03-28 | 2009-09-03 | エヌエックスピー ビー ヴィ | Transmitter with delay mismatch compensation |
US20090036144A1 (en) * | 2007-07-31 | 2009-02-05 | Wong Wendy C | Techniques for mobility induced error correction |
KR101531557B1 (en) * | 2008-10-20 | 2015-06-26 | 삼성전자주식회사 | Apparatus and method for channel estimation in mobile communication system |
RU208820U1 (en) * | 2021-10-19 | 2022-01-17 | Федеральное государственное бюджетное образовательное учреждение высшего образования "Томский государственный университет систем управления и радиоэлектроники" (ТУСУР) | Stabilized current source key control device in a solar battery simulator |
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1999
- 1999-10-12 EP EP99959202A patent/EP1127405A1/en not_active Ceased
- 1999-10-12 JP JP2000578902A patent/JP2002528985A/en not_active Abandoned
- 1999-10-12 KR KR10-2001-7004968A patent/KR100427854B1/en not_active IP Right Cessation
- 1999-10-12 WO PCT/DE1999/003274 patent/WO2000025419A1/en not_active Application Discontinuation
- 1999-10-12 CN CNB998124737A patent/CN1149734C/en not_active Expired - Fee Related
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2001
- 2001-04-23 US US09/840,551 patent/US6847812B2/en not_active Ceased
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2007
- 2007-01-24 US US11/657,379 patent/USRE41583E1/en not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
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KR20010080269A (en) | 2001-08-22 |
CN1149734C (en) | 2004-05-12 |
US20010055957A1 (en) | 2001-12-27 |
WO2000025419A1 (en) | 2000-05-04 |
JP2002528985A (en) | 2002-09-03 |
EP1127405A1 (en) | 2001-08-29 |
KR100427854B1 (en) | 2004-04-28 |
US6847812B2 (en) | 2005-01-25 |
CN1324512A (en) | 2001-11-28 |
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