USRE30412E - CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture - Google Patents
CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture Download PDFInfo
- Publication number
- USRE30412E USRE30412E US06/033,615 US3361579A USRE30412E US RE30412 E USRE30412 E US RE30412E US 3361579 A US3361579 A US 3361579A US RE30412 E USRE30412 E US RE30412E
- Authority
- US
- United States
- Prior art keywords
- layer
- cadmium telluride
- circuit voltage
- open
- minutes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000004888 barrier function Effects 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims description 19
- 230000008569 process Effects 0.000 title claims description 13
- 229910004613 CdTe Inorganic materials 0.000 title description 28
- 238000004519 manufacturing process Methods 0.000 title description 3
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 claims abstract description 45
- 238000010438 heat treatment Methods 0.000 claims abstract description 40
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 38
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000001301 oxygen Substances 0.000 claims abstract description 26
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 26
- 229910052714 tellurium Inorganic materials 0.000 claims description 17
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 claims description 17
- 229910003069 TeO2 Inorganic materials 0.000 claims description 9
- LAJZODKXOMJMPK-UHFFFAOYSA-N tellurium dioxide Chemical compound O=[Te]=O LAJZODKXOMJMPK-UHFFFAOYSA-N 0.000 claims description 9
- 230000005540 biological transmission Effects 0.000 claims description 2
- 230000015572 biosynthetic process Effects 0.000 claims 3
- 230000001747 exhibiting effect Effects 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 10
- 238000000151 deposition Methods 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 description 31
- 239000010410 layer Substances 0.000 description 28
- 239000000463 material Substances 0.000 description 28
- 230000001590 oxidative effect Effects 0.000 description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 11
- 229910052737 gold Inorganic materials 0.000 description 11
- 239000010931 gold Substances 0.000 description 11
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 6
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 description 6
- 239000013078 crystal Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 239000003708 ampul Substances 0.000 description 4
- BDOSMKKIYDKNTQ-UHFFFAOYSA-N cadmium atom Chemical compound [Cd] BDOSMKKIYDKNTQ-UHFFFAOYSA-N 0.000 description 4
- 229910052980 cadmium sulfide Inorganic materials 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- WKBOTKDWSSQWDR-UHFFFAOYSA-N Bromine atom Chemical compound [Br] WKBOTKDWSSQWDR-UHFFFAOYSA-N 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 3
- 229910052794 bromium Inorganic materials 0.000 description 3
- 229910052793 cadmium Inorganic materials 0.000 description 3
- 238000004320 controlled atmosphere Methods 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000002035 prolonged effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- WUPHOULIZUERAE-UHFFFAOYSA-N 3-(oxolan-2-yl)propanoic acid Chemical compound OC(=O)CCC1CCCO1 WUPHOULIZUERAE-UHFFFAOYSA-N 0.000 description 1
- 241000478345 Afer Species 0.000 description 1
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910006854 SnOx Inorganic materials 0.000 description 1
- 239000005083 Zinc sulfide Substances 0.000 description 1
- 238000005299 abrasion Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 230000002547 anomalous effect Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- CXKCTMHTOKXKQT-UHFFFAOYSA-N cadmium oxide Inorganic materials [Cd]=O CXKCTMHTOKXKQT-UHFFFAOYSA-N 0.000 description 1
- CFEAAQFZALKQPA-UHFFFAOYSA-N cadmium(2+);oxygen(2-) Chemical compound [O-2].[Cd+2] CFEAAQFZALKQPA-UHFFFAOYSA-N 0.000 description 1
- 238000009388 chemical precipitation Methods 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000001627 detrimental effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000004070 electrodeposition Methods 0.000 description 1
- 238000001941 electron spectroscopy Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- PNDPGZBMCMUPRI-UHFFFAOYSA-N iodine Chemical compound II PNDPGZBMCMUPRI-UHFFFAOYSA-N 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 238000007620 mathematical function Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000001706 oxygenating effect Effects 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- -1 pure oxygen Chemical compound 0.000 description 1
- 238000002407 reforming Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/0296—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/07—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the Schottky type
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Definitions
- This invention relates to barrier type photovoltaic cells useful for converting light and particularly solar energy into electrical energy.
- So-called Schottky barrier photocells rely upon the fact that certain metals, i.e., those having an appropriate work function, form a rectifying contact when appropriately contacted with a suitable semiconductor material. Electron-hole pairs generated by the absorption of light in the semiconductor are separated due to the field at the metal-semiconductor junction, establishing an electrical potential. In common with most of the early photocells, however, such cells had low conversion efficiencies due to the rather low open-circuit voltages that were produced. It is well-known that the conversion efficiency is a direct mathematical function of the open-circuit voltage.
- barrier-type photovoltaic cells Early attempts to manufacture barrier-type photovoltaic cells included devices formed by vacuum depositing metal onto cadmium telluride. Cadmium telluride has long been known to be an optimum material for photocells because its band gap is closest to that which will accommodate the optimum amount of solar energy. As explained in General Electric Technical Report AFAPL-TR69-32, gold was one of the metals thoroughly studied. However, this initial work concluded that preheating the cadmium telluride in oxygen pursuant to the methods of the prior art gave no enhancement of the photocell properties.
- V OC open-circuit voltage
- ⁇ B equilibrium barrier height
- the predicted untreated value is about 500 mV, which compares favorably with actual experimental values.
- the calculated value for untreated n-type CdTe coated with gold is only about 200 mV so that, even if an increase of 200 mV as was achieved in GaAs devices could be achieved for CdTe by preheating, the resultant 400 mV would not reach the untreated value for GaAs.
- Silicon barrier solar cells have been formed wherein the silicon surface was oxidized prior to coating with the barrier metal, either deliberately or by reason for example of the heating step used to fuse the ohmic metal contact to the opposite surface. Such devices resulted in an enhanced V OC value, as is shown, for example, in J. of Applied Physics, Vol. 46, No. 9, page 3982, Sept. 1975.
- the invention concerns a novel barrier-type photovoltaic cell and method of making it. It was unexpectedly discovered that preheating cadmium telluride in the presence of an oxygen containing atmosphere does in fact enhance the open-circuit voltage. More specifically, there is provided a photovoltaic cell comprising a layer of crystalline cadmium telluride, an exterior surface portion of said layer having .[.TeO 2 in the crystalline lattice.]. .Iadd.an oxide form of tellurium .Iaddend.to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced .[.without said TeO 2 ; contiguous with said altered surface,.].
- the preferred method of achieving this result comprises the steps of
- a cell is produced having an open-circuit voltage which is at least about 50 millivolts greater than a similar cell processed without step (b) above.
- FIGURE is a section view of a photovoltaic cell prepared in accordance with the invention.
- photovoltaic cell means a solid state device which produces an electric current in response to light from any source or at any wavelength.
- the cell of this invention is suitable as a terrestrial roof-top generator or as a light-level measuring device.
- a cell made with large surface areas by an economic method--such as thin-film deposition or dispersion of microcrystals with or without a binder-- would be suitable for rooftop generators.
- the cell can be used both at high and low light levels.
- the cell exhibits a moderately high open circuit voltage, even in diffused room-light conditions. It is also found that the open circuit voltage varies approximately linearly with the logarithm of the light intensity in the range of about 100-0.01 mW/cm 2 .
- the cell can also be used in the current mode.
- the current generated in the diffused room-light condition is about 40 ⁇ A/cm 2 , a large enough current to be measured accurately.
- the short circuit current can thus become a measure of the light intensity, and the calibrated cell can be used as an exposure meter and find application in cameras.
- the cell can be used to provide power which is proportional to the light intensity, such power being utilized to operate a meter.
- V OC open-circuit voltage
- common materials Si, GaAs, CdTe, InP, and CdS.
- This invention is based upon the discovery that the V OC of a cell constructed from a specific semiconductor material, CdTe, is in fact enhanced by preheating in an oxygen-containing atmosphere prior to applying the barrier metal, more than would be predicted from equation (1) above. Since the V OC of the homolog of CdTe, namely CdS, has been found to be unenhanced, the successful enhancement of V OC for CdTe is unexpected.
- enhanced V OC is defined as an improvement of at least about 50 millivolts (mV). In practice much larger enhancement, on the order of 200 to 300 mV, is common using the process of the invention.
- the V OC of a CdTe cell is enhanced by altering the state of the surface of the semiconductor material which contacts the barrier metal.
- the effect is produced by heating a surface of the semiconductor material in an oxygen-containing atmosphere and is not limited by the crystalline form of the CdTe.
- the discussion will be directed to polycrystalline CdTe, the effect applies equally to single crystals however produced. It is contemplated that the effect can also be achieved with thin film devices.
- the enhancement effect is a function of the manner in which the CdTe is heated in an oxygen-containing atmosphere.
- the heat can be applied in the presence of oxygen by using an air furnace, or by using a furnace having controlled atmospheres which can be altered from non-oxidizing to oxidizing.
- an air furnace to heat a CdTe material having a freshly prepared surface, prior to the heating step that material is at room temperature. Because of the short heating time involved, it has not been practical in such heating steps to raise the temperature of the semiconductor material slowly towards the desired temperature.
- the heating temperature preferably is at least equal to 490/a, in degrees centigrade, where "a" is the heating time in minutes. Temperatures less than this appear to be insufficient for this time range.
- the enhancement effect can be achieved equally as well by exposing the cadmium telluride to alternating non-oxidizing and oxidizing atmospheres.
- an evacuated ampoule containing the semiconductor material can be opened to allow oxygen of the air to interact with the material. It is believed that the amount of oxygen in such an ampoule is reduced sufficiently so as to be essentially non-oxidizing.
- altered surface states for CdTe cells can be produced by preheating the semiconductor material to 350° C. in the presence of an essentially non-oxidizing atmosphere until the material is at that temperature, adding oxygen at 350° C. even for times less than 2 minutes, and then removing the material from the effect of the oxygen.
- oxygen can be introduced into a non-oxidizing atmosphere in a steady stream to flush out the non-oxidizing atmosphere. Removal of the material from oxidation can be achieved by flushing the furnace with a non-oxidizing atmosphere, or simply by removing the material from the furnace.
- Typical non-oxidizing gases include inert gases such as argon, mildly reducing gases, and N 2 . Therefore, such controlled atmosphere furnaces have the advantage of permitting lower oxygenating time and/or temperatures to be used due to the preheating of the semiconductor material up to the desired temperature prior to oxygen exposure.
- the alternating atmosphere furnace can also be used for heat-treatment in the presence of oxygen without appreciable preheating in the non-oxidizing atmosphere, as will be recognized.
- the altered surface state appears to be an oxidation phenomenon.
- the CdTe includes both CdTe and .[.TeO 2 .]. .Iadd.an oxide form of tellurium. .Iaddend.
- This has been estimated as a result of electron spectroscopy chemical analysis of the semiconductor material afer forming the altered surface, which revealed that, in the altered surface, the cadmium electron region showed only the one peak indicative of cadmium metal. No cadmium oxide was detected.
- the tellurium electron region showed two peaks, one of which is indicative of .[.TeO 2 .]. .Iadd.an oxide form of tellurium .Iaddend.and the other of which is indicative of tellurium.
- the actual amount of .[.TeO 2 .]. .Iadd.the oxide form of tellurium .Iaddend.present will of course depend on the surface preparation and other factors that affect the oxidation process.
- FIGURE in the Drawing illustrates a CdTe cell 10 prepared for solar energy conversion and having an enhanced V OC as provided by the above-described process.
- Layer 12 is CdTe in polycrystalline form, having opposed surfaces 14 and 16.
- Surface 16 has been altered by the heat treatment described to a depth indicated by dotted line 18.
- the barrier metal 20 In contact with surface 16 is the barrier metal 20 in layered form.
- Metals which in theory have a work function that compares favorably with the electron affinity of the n-type CdTe, will provide the necessary barrier.
- Useful metals include, for example gold, silver, copper, platinum, nickel, chromium, palladium and aluminum.
- a collecting grid 22 or other suitable electrodes are ohmically attached to metal 20 in a conventional manner.
- An optional antireflection layer 24 is coated over the grid 22 and the metal 20 with a thickness designed to increase the transmission of light to the metal-semiconductor interface.
- Such layers 24 are conventional, utilizing a thickness equal to about one-fourth the optimum desired light wavelength to reduce flare.
- Typical materials for layer 24 include SnO x , where x is less than or equal to 2, and zinc sulfide. Further discussion of such antireflection layers can be found in the literature.
- the electronic circuit for the cell is completed by an ohmic contact 26 of metal, such as indium, made through surface 16 to the unaltered CdTe 12. Alternatively, contact 26 can be secured to surface 14. Leads 28 then carry the current, if used in the current mode, or apply the potential, if used in the open circuit mode, to the circuits used in conjunction with the cell.
- the semiconductor layer 12 can be formed by slicing a thin section from a sample formed by hot-pressing techniques or by any other conventional technique, and is doped n-type by the addition of chlorine, bromine, iodine, indium, etc. to the crystals as "impurities;” or by annealing in a suitable vapor, such as cadmium; or by both.
- P-type doping can be achieved by the appropriate selection of other "contaminants,” as is well-known. The amount of doping does not appear to be critical, expect that uniform doping in a conventional manner appears to be desirable.
- the altered surface 16 is formed as described in detail above, preferably after cleaning the semiconductor layer by etching, abrasion, or the like.
- the barrier metal may be formed as a layer by vacuum deposition, chemical precipitation, electrochemical deposition, electroless deposition, and the like. Similar techniques can be used to deposit grid 22 and layer 24, except that a mask is preferred in forming the grid. Conventional soldering techniques are sufficient to form contact 26.
- the thicknesses of the layers are not believed to be critical. Typical thicknesses include from 1 micrometer to about 2 millimeters for layer 12, and 0.005 to 0.008 micrometers for layer 20. The depth of altered surface layer 16 will vary depending on the heating conditions described above, and has not been accurately measured for each variation. However, optimum thicknesses are believed to be on the order of less than 0.005 micrometers.
- a hot-pressed sample of polycrystalline CdTe was sliced with a wire saw, and a slice was annealed in cadmium vapor for 24 hours at 850° C. to provide an n-type semiconducting substrate.
- the surfaces of the slice were mechanically polished, then etched in a solution containing bromine in methyl alcohol.
- the slice was heat treated in air in a muffle furnace at 300° C. for 8 minutes.
- a gold barrier layer about 60 A thick was then vacuum-deposited on the etched and heat-treated surface through a circular mask over an area of 0.23 cm 2 by flash evaporation. Copper electrical leads were attached to the gold layer with silver paint and to the CdTe surface by soldering with indium metal to provide ohmic contact.
- the resulting photovoltaic cell was illuminated through the gold layer with 100 mW/cm 2 of light provided by a Kodak Carousel projector, Model 600H, containing a 300 W tungsten-halogen lamp (General Electric ELH).
- the open circuit voltage of the cell was 770 mV and the conversion efficiency was 6.4 percent.
- Metal/semiconductor photovoltaic cells were prepared as in Example 1, Example 2 being with and Example 3 being without heat-treatment, except that both examples used a chlorine-doped single-crystal CdTe substrate and nickel as the barrier metal.
- Example 2 the cell made from the heat-treated CdTe single crystal, Example 2 gave an open circuit voltage of 610 mV and a conversion efficiency of 3.4 percent.
- Example 3 showed an open circuit voltage of only 258 mV and a conversion efficiency of 2.2 percent.
- the remarkable effect of the heat treatment of the semiconductor substrate prior to barrier metal deposition in increasing both the open circuit voltage and the conversion efficiency is demonstrated by these examples.
- Example 4 cells were prepared in a manner similar to Example 1, except that the time and temperature for preheating the CdTe was varied.
- the V OC and the enhancement for each example are listed in the following Table I. Measurements of V OC without heat treatment were made, in some instances, by grinding away the barrier metal after heat treatment and measurement, etching the semiconductor surface, reforming the barrier metal layer without forming the altered surface, and remeasuring V OC .
- Examples 4 and 5 are examples of no enhancement when the formula 490/a was not followed when heating in an air furnace for only 1 minute.
- Examples 6 and 7 demonstrate, in contrast with Examples 4 and 5, that for time a equal to less than 2 minutes, the temperature must be at least 490/a° C.
- Example 10 appears to be anomalous, possibly due to nonuniform doping.
- a third preparation of a cell heated at 350° C. for 4 minutes produced an enhancement comparable to that of Example 10', supporting the conclusion that Example 10 is not a representative example.
- the cell was prepared similarly to that of Example 1, but the semiconductor material was placed after etching in an evacuated ampoule in a furnace set at 350° C.
- the vacuum level was less than 10 -4 torr, a level believed to be sufficiently lacking in oxygen as to be essentially non-oxidizing.
- the material was left there for 12 minutes to permit its temperature to rise to 350° C.
- the ampoule was broken to expose the sample to air while retaining the temperature at 350° C.
- the sample was removed from the furnace and cooled to room temperature.
- the cell was completed, and V OC when exposed to light in a manner similar to Example 1 was found to be 695 mV.
- a similar cell wherein the semiconductor material was not heated at all had a V OC of only 472 mV.
- Example 25 To illustrate that the process of the invention can not be applied by merely using any one of the known semiconductor materials, a cell similar to that described in Example 1 was prepared for each of these examples, except that the semiconductor material was cadmium sulfide, the homolog of CdTe. Polishing and etching was achieved using 5% bromine and 95% methanol from the cell of Example 24, but etching was omitted in Example 25.
- Example 24 without heat-treating, the V OC was 120 mV.
- the cell was destroyed by grinding off the gold, and the semiconductor layer was heat-treated in an air furnace at 300° C. for 8 minutes.
- the V OC after heat-treatment was 9 mV, indicating a failure in the solar cell.
- Example 25 the V OC before heat-treating was 9.8 mV, a barely acceptable value. After heat-treating again at 300° C. for 8 minutes, V OC was 10.5 mV, an increase of only 0.7 mV.
- Example 24 was repeated, except that silver was used as the barrier metal layer.
- V OC before heat-treating the CdS was 90 mV, and after heat-treating for 8 minutes at 300° C. was only 0.8 mV.
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Photovoltaic Devices (AREA)
Abstract
A cadmium telluride photovoltaic cell is produced with increased conversion efficiency arising from enhanced open-circuit voltage. Such voltage is achieved by altering the surface of the crystalline cadmium telluride that contacts the barrier metal by heating the cadmium telluride in the presence of oxygen prior to depositing the barrier metal.
Description
This application is a continuation application of U.S. reissue application S.N. 885,050, filed on Mar. 9, 1978, now abandoned, as a reissue for U.S. Pat. No. 4,035,197, issued on July 12, 1977, on U.S. Application S.N. 671,866, filed on Mar. 30, 1976. .Iaddend.
1. Field of the Invention
This invention relates to barrier type photovoltaic cells useful for converting light and particularly solar energy into electrical energy.
2. State of the Prior Art
So-called Schottky barrier photocells rely upon the fact that certain metals, i.e., those having an appropriate work function, form a rectifying contact when appropriately contacted with a suitable semiconductor material. Electron-hole pairs generated by the absorption of light in the semiconductor are separated due to the field at the metal-semiconductor junction, establishing an electrical potential. In common with most of the early photocells, however, such cells had low conversion efficiencies due to the rather low open-circuit voltages that were produced. It is well-known that the conversion efficiency is a direct mathematical function of the open-circuit voltage.
Early attempts to manufacture barrier-type photovoltaic cells included devices formed by vacuum depositing metal onto cadmium telluride. Cadmium telluride has long been known to be an optimum material for photocells because its band gap is closest to that which will accommodate the optimum amount of solar energy. As explained in General Electric Technical Report AFAPL-TR69-32, gold was one of the metals thoroughly studied. However, this initial work concluded that preheating the cadmium telluride in oxygen pursuant to the methods of the prior art gave no enhancement of the photocell properties.
More recent developments have raised a question about the earlier conclusion that preheating the semiconductor yields an ineffective enhancement, at least with regard to gallium arsenide as the semiconductor material. It was reported in Applied Physics Letters, Vol. 27, July 1975, pages 95-97, that the open-circuit voltage of a gold-coated GaAs cell was improved about 200 mV by heating the semiconductor in air up to 200° C. for 4 to 70 hours prior to coating with gold. However, a subsequent paper by the same authors, entitled "The AMOS Cell--An Improved Metal-Semiconductor Solar Cell," presented at the Eleventh Photovoltaic Specialist Conference at Scottsdale, Ariz. on May 6-8, 1975, reported that the results were not reproducible no matter what temperature or what length of time were used, particularly when a different source of oxygen, such as pure oxygen, was used. Instead, an additional undisclosed element was said to be required for maximum enhancement.
Although some success may have been achieved by preheating GaAs, the art has been discouraged from attempting to preheat other semiconductor materials by publications such as "Improved Schottky Barrier Solar Cells" published by the authors noted above at the aforesaid Eleventh Photovoltaic Specialists Conference, page 391. It is well-known that the open-circuit voltage (VOC) of a photovoltaic cell can be expressed as the equation ##EQU1## where n=the diode factor
k=the Boltzmann constant
T=the absolute temperature
q=the electronic charge
IL =the light-generated current
A*=the modified Richardson's constant, and
φB =equilibrium barrier height.
It can be shown that, for an untreated n-type GaAs cell coated with gold, the predicted untreated value is about 500 mV, which compares favorably with actual experimental values. However, it can also be shown, using equation (1), that the calculated value for untreated n-type CdTe coated with gold is only about 200 mV so that, even if an increase of 200 mV as was achieved in GaAs devices could be achieved for CdTe by preheating, the resultant 400 mV would not reach the untreated value for GaAs.
Silicon barrier solar cells have been formed wherein the silicon surface was oxidized prior to coating with the barrier metal, either deliberately or by reason for example of the heating step used to fuse the ohmic metal contact to the opposite surface. Such devices resulted in an enhanced VOC value, as is shown, for example, in J. of Applied Physics, Vol. 46, No. 9, page 3982, Sept. 1975.
The general background of photovoltaic cells, and/or to the use of common features such as grid electrodes, antireflection layers, etc., is described in U.S. Pat. Nos. 3,888,697; 3,703,408, 3,769,558; and 3,811,954. Articles pertaining to such general background include "A New Look at CdTe Solar Cells", Bell and Wald, Eleventh Photovoltaic Specialist Conference, supra at page 497; and "Recent Research on Photovoltaic Solar Energy Converters", Loferski, 1963 Proceedings of the IEEE, page 667.
It is an object of the invention to provide a photovoltaic cell and process for making it wherein the open-circuit voltage of a cadmium telluride barrier-type cell is appreciably enhanced.
It is a related object of the invention to optimize the enhancement of the open-circuit voltage, and therefore to increase the conversion efficiency, of such photovoltaic cells.
Other objects and advantages will become apparent upon reference to the following Summary of the Invention and Description of the Preferred Embodiments, when read in light of the attached drawing.
The invention concerns a novel barrier-type photovoltaic cell and method of making it. It was unexpectedly discovered that preheating cadmium telluride in the presence of an oxygen containing atmosphere does in fact enhance the open-circuit voltage. More specifically, there is provided a photovoltaic cell comprising a layer of crystalline cadmium telluride, an exterior surface portion of said layer having .[.TeO2 in the crystalline lattice.]. .Iadd.an oxide form of tellurium .Iaddend.to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced .[.without said TeO2 ; contiguous with said altered surface,.]. .Iadd.by a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the exterior surface portion only the oxide forms of tellurium resulting from exposing the surface portion to air at room temperature.Iaddend.; a layer of metal .Iadd.in contact with at least part of the exterior surface portion, the layer being .Iaddend.capable of forming a barrier layer with said cadmium telluride altered surface; and an electrode in ohmic contact with said cadmium telluride.
The preferred method of achieving this result comprises the steps of
a. forming a layer of crystalline cadmium telluride,
b. heating at least one surface of the layer in an oxygen-containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° C. and about 500° C. to alter the surface; and
c. applying a metal layer in contact with said one surface, said metal being capable of forming a barrier with the altered cadmium telluride,
whereby a cell is produced having an open-circuit voltage which is at least about 50 millivolts greater than a similar cell processed without step (b) above.
The FIGURE is a section view of a photovoltaic cell prepared in accordance with the invention.
Although the invention is hereinafter described particularly with respect to solar cells as the preferred embodiments, it is not limited thereto. Rather, it applies to all barrier type photovoltaic cells using cadmium telluride as the semiconductor material. As used herein, "photovoltaic cell" means a solid state device which produces an electric current in response to light from any source or at any wavelength. Thus the cell of this invention is suitable as a terrestrial roof-top generator or as a light-level measuring device. A cell made with large surface areas by an economic method--such as thin-film deposition or dispersion of microcrystals with or without a binder--would be suitable for rooftop generators. As a light-level measuring device, the cell can be used both at high and low light levels. The cell exhibits a moderately high open circuit voltage, even in diffused room-light conditions. It is also found that the open circuit voltage varies approximately linearly with the logarithm of the light intensity in the range of about 100-0.01 mW/cm2.
Alternatively, the cell can also be used in the current mode. The current generated in the diffused room-light condition is about 40 μA/cm2, a large enough current to be measured accurately. The short circuit current can thus become a measure of the light intensity, and the calibrated cell can be used as an exposure meter and find application in cameras. Coupled with a suitable load resistor, the cell can be used to provide power which is proportional to the light intensity, such power being utilized to operate a meter.
As previously explained, considerable unpredicability exists as to which of the methods of enhancing open-circuit voltage (VOC) can be used for the various commonly used semiconductor materials. Included in such common materials are Si, GaAs, CdTe, InP, and CdS. This invention is based upon the discovery that the VOC of a cell constructed from a specific semiconductor material, CdTe, is in fact enhanced by preheating in an oxygen-containing atmosphere prior to applying the barrier metal, more than would be predicted from equation (1) above. Since the VOC of the homolog of CdTe, namely CdS, has been found to be unenhanced, the successful enhancement of VOC for CdTe is unexpected.
As used herein, "enhanced VOC " is defined as an improvement of at least about 50 millivolts (mV). In practice much larger enhancement, on the order of 200 to 300 mV, is common using the process of the invention.
The VOC of a CdTe cell is enhanced by altering the state of the surface of the semiconductor material which contacts the barrier metal. The effect is produced by heating a surface of the semiconductor material in an oxygen-containing atmosphere and is not limited by the crystalline form of the CdTe. Although hereinafter the discussion will be directed to polycrystalline CdTe, the effect applies equally to single crystals however produced. It is contemplated that the effect can also be achieved with thin film devices.
However, the enhancement effect is a function of the manner in which the CdTe is heated in an oxygen-containing atmosphere. The heat can be applied in the presence of oxygen by using an air furnace, or by using a furnace having controlled atmospheres which can be altered from non-oxidizing to oxidizing. As described herein, when using an air furnace to heat a CdTe material having a freshly prepared surface, prior to the heating step that material is at room temperature. Because of the short heating time involved, it has not been practical in such heating steps to raise the temperature of the semiconductor material slowly towards the desired temperature.
It has been found, for example, that, using an air furnace, heating temperatures of 200° C. or less tend to be inadequate, even with very lengthy heating times. In fact, reproducible results have been observed only when heat is applied at 250° C. or higher. At such temperatures, it has been found that the costly prolonged heating heretofore used, for example, for GaAs, is unnecessary. In fact, it is believed that prolonged heating can be detrimental. Thus, when using an air furnace, the heating need only be applied for more than about 2 minutes and up to about 20 minutes for a temperature range of about 250° C. to about 350° C. If the time of heating is on the short side of this range, higher temperatures are preferred within the temperature range.
It has also been found that in an air furnace, times shorter than 2 minutes may be used; but, temperatures above 350° C. tend to become necessary due to the relatively cool initial semiconductor temperature. Specifically, for times of less than 2 minutes, the heating temperature preferably is at least equal to 490/a, in degrees centigrade, where "a" is the heating time in minutes. Temperatures less than this appear to be insufficient for this time range.
As noted above, the enhancement effect can be achieved equally as well by exposing the cadmium telluride to alternating non-oxidizing and oxidizing atmospheres. For example, an evacuated ampoule containing the semiconductor material can be opened to allow oxygen of the air to interact with the material. It is believed that the amount of oxygen in such an ampoule is reduced sufficiently so as to be essentially non-oxidizing. In such a furnace, altered surface states for CdTe cells can be produced by preheating the semiconductor material to 350° C. in the presence of an essentially non-oxidizing atmosphere until the material is at that temperature, adding oxygen at 350° C. even for times less than 2 minutes, and then removing the material from the effect of the oxygen. It is also contemplated that, after preliminary heating of the semiconductor, oxygen can be introduced into a non-oxidizing atmosphere in a steady stream to flush out the non-oxidizing atmosphere. Removal of the material from oxidation can be achieved by flushing the furnace with a non-oxidizing atmosphere, or simply by removing the material from the furnace. Typical non-oxidizing gases include inert gases such as argon, mildly reducing gases, and N2. Therefore, such controlled atmosphere furnaces have the advantage of permitting lower oxygenating time and/or temperatures to be used due to the preheating of the semiconductor material up to the desired temperature prior to oxygen exposure.
The alternating atmosphere furnace can also be used for heat-treatment in the presence of oxygen without appreciable preheating in the non-oxidizing atmosphere, as will be recognized.
It will be apparent from the preceding discussion that the altered surface state appears to be an oxidation phenomenon. Although it is not essential for the practice of the invention, it has been found that the altered surface .[.or.]. .Iadd.of .Iaddend.the CdTe includes both CdTe and .[.TeO2 .]. .Iadd.an oxide form of tellurium. .Iaddend.This has been estimated as a result of electron spectroscopy chemical analysis of the semiconductor material afer forming the altered surface, which revealed that, in the altered surface, the cadmium electron region showed only the one peak indicative of cadmium metal. No cadmium oxide was detected. The tellurium electron region showed two peaks, one of which is indicative of .[.TeO2 .]. .Iadd.an oxide form of tellurium .Iaddend.and the other of which is indicative of tellurium. The actual amount of .[.TeO2 .]. .Iadd.the oxide form of tellurium .Iaddend.present will of course depend on the surface preparation and other factors that affect the oxidation process.
The FIGURE in the Drawing illustrates a CdTe cell 10 prepared for solar energy conversion and having an enhanced VOC as provided by the above-described process. Layer 12 is CdTe in polycrystalline form, having opposed surfaces 14 and 16. Surface 16 has been altered by the heat treatment described to a depth indicated by dotted line 18. In contact with surface 16 is the barrier metal 20 in layered form. Metals which in theory have a work function that compares favorably with the electron affinity of the n-type CdTe, will provide the necessary barrier. Useful metals include, for example gold, silver, copper, platinum, nickel, chromium, palladium and aluminum. A collecting grid 22 or other suitable electrodes are ohmically attached to metal 20 in a conventional manner. An optional antireflection layer 24 is coated over the grid 22 and the metal 20 with a thickness designed to increase the transmission of light to the metal-semiconductor interface. Such layers 24 are conventional, utilizing a thickness equal to about one-fourth the optimum desired light wavelength to reduce flare. Typical materials for layer 24 include SnOx, where x is less than or equal to 2, and zinc sulfide. Further discussion of such antireflection layers can be found in the literature.
The electronic circuit for the cell is completed by an ohmic contact 26 of metal, such as indium, made through surface 16 to the unaltered CdTe 12. Alternatively, contact 26 can be secured to surface 14. Leads 28 then carry the current, if used in the current mode, or apply the potential, if used in the open circuit mode, to the circuits used in conjunction with the cell.
Each of the elements of the cell previously described can be formed in a variety of ways. The semiconductor layer 12 can be formed by slicing a thin section from a sample formed by hot-pressing techniques or by any other conventional technique, and is doped n-type by the addition of chlorine, bromine, iodine, indium, etc. to the crystals as "impurities;" or by annealing in a suitable vapor, such as cadmium; or by both. P-type doping can be achieved by the appropriate selection of other "contaminants," as is well-known. The amount of doping does not appear to be critical, expect that uniform doping in a conventional manner appears to be desirable. The altered surface 16 is formed as described in detail above, preferably after cleaning the semiconductor layer by etching, abrasion, or the like. The barrier metal may be formed as a layer by vacuum deposition, chemical precipitation, electrochemical deposition, electroless deposition, and the like. Similar techniques can be used to deposit grid 22 and layer 24, except that a mask is preferred in forming the grid. Conventional soldering techniques are sufficient to form contact 26.
The thicknesses of the layers are not believed to be critical. Typical thicknesses include from 1 micrometer to about 2 millimeters for layer 12, and 0.005 to 0.008 micrometers for layer 20. The depth of altered surface layer 16 will vary depending on the heating conditions described above, and has not been accurately measured for each variation. However, optimum thicknesses are believed to be on the order of less than 0.005 micrometers.
The following non-exhaustive examples further illustrate the nature of the invention.
A hot-pressed sample of polycrystalline CdTe was sliced with a wire saw, and a slice was annealed in cadmium vapor for 24 hours at 850° C. to provide an n-type semiconducting substrate. The surfaces of the slice were mechanically polished, then etched in a solution containing bromine in methyl alcohol. To provide the altered surface layer, the slice was heat treated in air in a muffle furnace at 300° C. for 8 minutes. A gold barrier layer about 60 A thick was then vacuum-deposited on the etched and heat-treated surface through a circular mask over an area of 0.23 cm2 by flash evaporation. Copper electrical leads were attached to the gold layer with silver paint and to the CdTe surface by soldering with indium metal to provide ohmic contact. The resulting photovoltaic cell was illuminated through the gold layer with 100 mW/cm2 of light provided by a Kodak Carousel projector, Model 600H, containing a 300 W tungsten-halogen lamp (General Electric ELH). The open circuit voltage of the cell was 770 mV and the conversion efficiency was 6.4 percent.
As a control, another polycrystalline gold/CdTe photovoltaic cell prepared in a manner similar to Example 1, but without the heat-treatment, showed a VOC of only 437 mv and a conversion efficiency of 4.7%. The net VOC enhancement, then, was 333 mV.
Metal/semiconductor photovoltaic cells were prepared as in Example 1, Example 2 being with and Example 3 being without heat-treatment, except that both examples used a chlorine-doped single-crystal CdTe substrate and nickel as the barrier metal. Under the same illumination as in Example 1, the cell made from the heat-treated CdTe single crystal, Example 2, gave an open circuit voltage of 610 mV and a conversion efficiency of 3.4 percent. The cell made from single-crystal CdTe without heat-treatment, Example 3, showed an open circuit voltage of only 258 mV and a conversion efficiency of 2.2 percent. The remarkable effect of the heat treatment of the semiconductor substrate prior to barrier metal deposition in increasing both the open circuit voltage and the conversion efficiency is demonstrated by these examples.
In each of these examples, cells were prepared in a manner similar to Example 1, except that the time and temperature for preheating the CdTe was varied. The VOC and the enhancement for each example are listed in the following Table I. Measurements of VOC without heat treatment were made, in some instances, by grinding away the barrier metal after heat treatment and measurement, etching the semiconductor surface, reforming the barrier metal layer without forming the altered surface, and remeasuring VOC. Examples 4 and 5 are examples of no enhancement when the formula 490/a was not followed when heating in an air furnace for only 1 minute. Example 6 illustrates the successful temperature of 490° C. for the condition of 490/a, where a=1 minute.
TABLE I __________________________________________________________________________ V.sub.OC (mV) Heating Heating After Amount of V.sub.OC Ex. Temp. (° C.) Time (min) Treatment Increase (mV) __________________________________________________________________________ 4 400 1 ˜400 0 5 450 1 405 -67 6 490 1 633 161 7 400 1.5 630 189 8 400 2 800 410 9 450 2 720 248 10 350 4 457 57 10 350 4 692 302 11 320 6 609 148 12 300 8 550 78 13 250 8 580 162 14 300 8.5 712 251 15 300 9 697 226 16 290 9 728 251 17 280 9 605 215 -18 275 10 733 315 19 275 11 580 112 20 300 12 640 179 21 275 14 561 121 22 240 20 750 278 __________________________________________________________________________
These examples revealed that, for an air furnace heat treatment between about 250° and 350° C. and for about 2 to 20 minutes, VOC enhancement is achieved. Further, Examples 6 and 7 demonstrate, in contrast with Examples 4 and 5, that for time a equal to less than 2 minutes, the temperature must be at least 490/a° C.
In the comparison of Examples 10 and 10', Example 10 appears to be anomalous, possibly due to nonuniform doping. A third preparation of a cell heated at 350° C. for 4 minutes produced an enhancement comparable to that of Example 10', supporting the conclusion that Example 10 is not a representative example.
To illustrate that a controlled atmosphere furnace will provide enhancement with 1 to 2 minutes heating in the presence of oxygen without following the formula 490/a, in this example the cell was prepared similarly to that of Example 1, but the semiconductor material was placed after etching in an evacuated ampoule in a furnace set at 350° C. The vacuum level was less than 10-4 torr, a level believed to be sufficiently lacking in oxygen as to be essentially non-oxidizing. The material was left there for 12 minutes to permit its temperature to rise to 350° C. Thereafter the ampoule was broken to expose the sample to air while retaining the temperature at 350° C. After 1 minutes in the presence of O2, the sample was removed from the furnace and cooled to room temperature. The cell was completed, and VOC when exposed to light in a manner similar to Example 1 was found to be 695 mV. A similar cell wherein the semiconductor material was not heated at all had a VOC of only 472 mV.
To illustrate that the process of the invention can not be applied by merely using any one of the known semiconductor materials, a cell similar to that described in Example 1 was prepared for each of these examples, except that the semiconductor material was cadmium sulfide, the homolog of CdTe. Polishing and etching was achieved using 5% bromine and 95% methanol from the cell of Example 24, but etching was omitted in Example 25.
In Example 24 without heat-treating, the VOC was 120 mV. The cell was destroyed by grinding off the gold, and the semiconductor layer was heat-treated in an air furnace at 300° C. for 8 minutes. The VOC after heat-treatment was 9 mV, indicating a failure in the solar cell.
In Example 25, the VOC before heat-treating was 9.8 mV, a barely acceptable value. After heat-treating again at 300° C. for 8 minutes, VOC was 10.5 mV, an increase of only 0.7 mV.
Example 24 was repeated, except that silver was used as the barrier metal layer. VOC before heat-treating the CdS was 90 mV, and after heat-treating for 8 minutes at 300° C. was only 0.8 mV.
The invention has been described in detail with particular reference to certain preferred embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the invention.
Claims (9)
1. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, an exterior surface portion of said layer having .[.TeO2 in the crystalline lattice.]. .Iadd.an oxide form of tellurium .Iaddend.to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced .[.without said TeO2 .]. .Iadd.by a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the exterior surface portion thereof only the oxide forms of tellurium resulting from exposing said surface portion to air at room temperature, .Iaddend.
a layer of metal in contact with at least part of said exterior surface portion, said layer being capable of forming a barrier with said cadmium telluride .[.altered.]. surface .Iadd.portion; .Iaddend.and
an electrode in ohmic contact with said cadmium telluride.
2. The cell as defined in claim 1, and further including an antireflection layer in contact with at least part of said metal layer, said antireflection layer having a thickness that enhances the transmission of light through the cell.
3. The cell as defined in claim 1, and further including a current-conducting grid applied over, and in ohmic contact with, said metal layer.
4. A process for the formation of a photovoltaic cell, the process comprising the steps of
a. forming a layer of crystalline cadmium telluride,
b. heating at least one surface of the layer in air for more than about 2 minutes and less than or equal to about 20 minutes at a temperature between about 250° C. and about 350° C., or for a time less than or equal to about 2 minutes but at a temperature in centigrade degrees no lower than about 490/a, where a is the time of heating in minutes; and
c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride,
whereby a cell is produced having an open-circuit voltage which is at least about 50 millivolts greater than a similar cell processed without step (b) above.
5. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, a surface of said layer being altered to contain .[.tellurium oxide.]. .Iadd.an oxide form of tellurium .Iaddend.by heating in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° and about 500° C. the oxygen being present .Iadd.in the atmosphere .Iaddend.in an amount that is effective to enhance the open-circuit voltage by at least 50 millivolts .Iadd.compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature,
in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and
an electrode in ohmic contact with said cadmium telluride.
6. A photovoltaic cell exhibiting an enhanced open circuit voltage, comprising
a layer of crystalline cadmium telluride, a surface of said layer being in an altered state achieved by heating in air for more than about 2 minutes and less than or equal to about 20 minutes at a temperature between about 250° C. and about 350° C., or for a time less than or equal to about 2 minutes but at a temperature in centigrade degrees no lower than about 490/a, where a is the time of heating in minutes;
in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and
an electrode in ohmic contact with said cadmium telluride.
7. A process of measuring light, comprising the steps of
a. exposing to light, a photovoltaic cell comprising a layer of crystalline cadmium telluride, an exterior surface portion of said layer having .[.TeO2 in the crystalline lattice.]. .Iadd.an oxide form of tellurium .Iaddend.to a depth effective to produce an open-circuit voltage that is enhanced over the open-circuit voltage that is produced .[.without said TeO2 .]. .Iadd.by a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the exterior surface portion thereof only the oxide forms of tellurium resulting from exposing said surface portion to air at room temperature, .Iaddend.
a layer of metal in contact with at least part of said exterior surface portion, said layer being capable of forming a barrier with said cadmium telluride altered surface; and
an electrode in ohmic contact with said cadmium telluride, and
b. measuring either the open-circuit voltage or short-circuit current generated by the cell. .Iadd.
8. A photovoltaic cell comprising
a layer of crystalline cadmium telluride, a surface of said layer being altered by heating in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° and about 500° C., the oxygen being present in the atmosphere in an amount that is effective to enhance the open circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, and
in contact with at least part of said altered surface, a layer of metal capable of forming a barrier with said cadmium telluride altered surface; and
an electrode in ohmic contact with said cadmium telluride. .Iaddend. .Iadd.9. A process for the formation of a photovoltaic cell, the process comprising the steps of
a. forming a layer of crystalline cadmium telluride,
b. heating at least one surface of the layer in an oxygen containing atmosphere for a time and at a temperature, and in an amount of oxygen, that are effective to enhance the open-circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature, said temperature being at least about 250° C. and said time being no greater than about 20 minutes,
c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride, and
d. ohmically contacting the cadmium telluride with an electrode. .Iaddend.
.Iadd.10. A process for the formation of a photovoltaic cell, the process comprising the steps of
a. forming a layer of crystalline cadmium telluride,
b. heating at least one surface of the layer in an oxygen containing atmosphere for between about 1 minute and about 20 minutes at a temperature between about 250° C. and about 500° C., the oxygen being present in the atmosphere in an amount that is effective to enhance the open-circuit voltage by at least 50 millivolts compared to the open-circuit voltage of a photovoltaic cell identical in structure except for the layer of cadmium telluride which has in the surface thereof only the oxide forms of tellurium resulting from exposing said surface to air at room temperature,
c. applying a metal layer in contact with at least part of said one surface, said metal being capable of forming a barrier with cadmium telluride, and
d. ohmically contacting the cadmium telluride with an electrode. .Iaddend.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/033,615 USRE30412E (en) | 1979-04-26 | 1979-04-26 | CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/033,615 USRE30412E (en) | 1979-04-26 | 1979-04-26 | CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture |
Related Parent Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US05/671,866 Reissue US4035197A (en) | 1976-03-30 | 1976-03-30 | Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture |
US05885050 Continuation | 1978-03-09 |
Publications (1)
Publication Number | Publication Date |
---|---|
USRE30412E true USRE30412E (en) | 1980-10-07 |
Family
ID=21871426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US06/033,615 Expired - Lifetime USRE30412E (en) | 1979-04-26 | 1979-04-26 | CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture |
Country Status (1)
Country | Link |
---|---|
US (1) | USRE30412E (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4873198A (en) | 1986-10-21 | 1989-10-10 | Ametek, Inc. | Method of making photovoltaic cell with chloride dip |
US5296384A (en) * | 1992-07-21 | 1994-03-22 | Santa Barbara Research Center | Bake-stable HgCdTe photodetector and method for fabricating same |
US5312772A (en) * | 1988-08-06 | 1994-05-17 | Seiko Epson Corporation | Method of manufacturing interconnect metallization comprising metal nitride and silicide |
US5401986A (en) * | 1992-07-21 | 1995-03-28 | Santa Barbara Research Center | Bake-stable HgCdTe photodetector with II-VI passivation layer |
US5849102A (en) * | 1996-02-28 | 1998-12-15 | Nec Corporation | Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere |
US6743294B2 (en) * | 1995-06-16 | 2004-06-01 | Optoscint, Inc. | Continuous crystal plate growth process and apparatus |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3703408A (en) * | 1969-05-21 | 1972-11-21 | Texas Instruments Inc | Photosensitive semiconductor device |
US3769558A (en) * | 1971-12-03 | 1973-10-30 | Communications Satellite Corp | Surface inversion solar cell and method of forming same |
US3793069A (en) * | 1970-08-17 | 1974-02-19 | Tokyo Shibaura Electric Co | Process for preparing a layer of compounds of groups ii and vi |
US3811954A (en) * | 1971-09-28 | 1974-05-21 | Communications Satellite Corp | Fine geometry solar cell |
US3888697A (en) * | 1971-10-23 | 1975-06-10 | Licentia Gmbh | Photocell |
-
1979
- 1979-04-26 US US06/033,615 patent/USRE30412E/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3703408A (en) * | 1969-05-21 | 1972-11-21 | Texas Instruments Inc | Photosensitive semiconductor device |
US3793069A (en) * | 1970-08-17 | 1974-02-19 | Tokyo Shibaura Electric Co | Process for preparing a layer of compounds of groups ii and vi |
US3811954A (en) * | 1971-09-28 | 1974-05-21 | Communications Satellite Corp | Fine geometry solar cell |
US3888697A (en) * | 1971-10-23 | 1975-06-10 | Licentia Gmbh | Photocell |
US3769558A (en) * | 1971-12-03 | 1973-10-30 | Communications Satellite Corp | Surface inversion solar cell and method of forming same |
Non-Patent Citations (8)
Title |
---|
E. J. Charlson et al., "An Al-p-Silicon MOS Photovoltaic Cell," J. Appl. Phys., vol. 46, pp. 3982-3987, Sep. 1975. * |
J. Loferski, "Recent Research on Photovoltaic Solar Energy Converters," Proceedings IEEE, pp. 667-674, May 1963. * |
P. Goerlich et al., Optik 4, Buch 2/3, pp. 206-212 (1948). * |
R. J. Stirn et al., "A 15% Efficient Antireflection-Coated Metal-Oxide-Semiconductor Solar Cell," App. Phys. Lett., vol. 27, pp. 95-97, Jul. 1975. * |
R. J. Stirn et al., "The AMOS Cell-An Improved Metal-Semiconductor Solar Cell," Presented at 11th Photovoltaic Specialists Conf., May 1975 (Conf. Record, pp. 437-438). * |
R. O. Bell et al., "A New Look at CdTe Solar Cells," Presented at 11th Photovoltaic Specialists Conf., May 1975 (Conference Record, pp. 497-502). * |
R. W. Aldrich et al., "Improved CdTe Solar Cell and Array-Environmental Effects Investigation," General Electric Tech. Report AFAPL-TR-69-32, pp. 60-68. * |
Y. M. Yeh et al., "Improved Schottky Barrier Solar Cells," Presented at 11th Photovoltaic Specialists Conf., May 1975 (Conf. Record, pp. 391-397). * |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4873198A (en) | 1986-10-21 | 1989-10-10 | Ametek, Inc. | Method of making photovoltaic cell with chloride dip |
US5312772A (en) * | 1988-08-06 | 1994-05-17 | Seiko Epson Corporation | Method of manufacturing interconnect metallization comprising metal nitride and silicide |
US5296384A (en) * | 1992-07-21 | 1994-03-22 | Santa Barbara Research Center | Bake-stable HgCdTe photodetector and method for fabricating same |
US5401986A (en) * | 1992-07-21 | 1995-03-28 | Santa Barbara Research Center | Bake-stable HgCdTe photodetector with II-VI passivation layer |
US6743294B2 (en) * | 1995-06-16 | 2004-06-01 | Optoscint, Inc. | Continuous crystal plate growth process and apparatus |
US5849102A (en) * | 1996-02-28 | 1998-12-15 | Nec Corporation | Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4035197A (en) | Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture | |
US3290175A (en) | Semiconductor photovoltaic devices | |
EP0175567B1 (en) | Semiconductor solar cells | |
Nagatomo et al. | Fabrication and characterization of SnO2/n-Si solar cells | |
US4259122A (en) | Selenium photovoltaic device | |
USRE30412E (en) | CdTe Barrier type photovoltaic cells with enhanced open-circuit voltage, and process of manufacture | |
Kampmann et al. | Junction Formation Studies of One‐Step Electrodeposited CuInSe2 on CdS | |
Schroder | Transparent gate silicon photodetectors | |
Neumann‐Spallart et al. | Photoelectrochemical properties of semiconducting cadmium mercury telluride thin films with bandgaps between 1.47 and 1.08 eV | |
NL7908885A (en) | PHOTOCELLS OF POLYCRYSTALLINE SELENIUM. | |
Hartiti et al. | Towards high‐eficiency silicon solar cells by rapid thermal processing | |
Schlosser | Limiting factors for the application of crystalline upgraded metallurgical grade silicon | |
Tell et al. | Photovoltaic properties of Cu2Se‐AgInSe2 heterojunctions | |
Lee et al. | Characterization of porous silicon photovoltaic devices through rapid thermal oxidation, rapid thermal annealing and HF-dipping processes | |
Song et al. | Effect of CdCl2 treatment of CdS films on CdTe/CdS solar cells | |
Yoshida | Analysis of Photocurrent in Screen‐Printed CdS/CdTe Solar Cells | |
Elgamel et al. | 640 mV open-circuit voltage multicrystalline silicon solar cells: role of base doping on device parameters | |
KR810001712B1 (en) | Fabrication method of sollar-cell by diffusing sillicon | |
Sexton et al. | Process for high photocurrent in IBC solar cells | |
Mahdjoubi et al. | Preparation and analysis of CdS-Cu2S solar cells | |
Das et al. | Fabrication and characterization of photoelectrochemical (PEC) solar cells based on 0.1% indium-doped CdSe0. 7Te0. 3 thin-film electrode | |
Agarwal et al. | Passivation of defects in polycrystalline silicon solar cells by molecular hydrogen annealing | |
Zitter et al. | Photoeffects in CdTe with acid− grown Te layers | |
Potter Jr et al. | Mechanism of cadmium sulfide film cell | |
JP2869527B2 (en) | Manufacturing method of silicon solar cell |