USRE29431E - Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory - Google Patents
Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory Download PDFInfo
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- USRE29431E USRE29431E US05/704,434 US70443476A USRE29431E US RE29431 E USRE29431 E US RE29431E US 70443476 A US70443476 A US 70443476A US RE29431 E USRE29431 E US RE29431E
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/12—Formatting, e.g. arrangement of data block or words on the record carriers
Definitions
- each.]. .Iadd.Each .Iaddend.revolution of a rotating magnetic memory is divided into an integer M of sectors with precision by detecting sector marks on means mechanically connected to rotate with the memory, generating from the detected sector marks a pulse train at a frequency f ⁇ f that is a function of the memory speed, and applying the pulse train to a phase-locked loop to produce pulses at a higher frequency by a known factor.[., 2N.]. .
- the pulses at this higher frequency are counted down in a cyclic counter to repeatedly divide each revolution of the memory into M equally time spaced sectors with a high degree of precision and consistency. To assure this high degree of precision in the timing (spacing) of the sectors, more than second order filtering is employed in the phase-locked loop.
- FIGURE is a block diagram of a preferred embodiment of the invention.
- a rotating magnetic memory 10 is shown as a disc file which may be of the moving-head type or the fixed-head type.
- the heads are not shown since their use only benefits from the present invention in accessing word storage locations in equally time spaced sectors of recording tracks. The heads do not play a role in electronically dividing the tracks into sectors.
- a slotted disc 11 of ferromagnetic material is connected to a shaft 12 on which the memory discs turn at nominal speeds of 1500, 2400 or 3600 RPM.
- the slots are detected by a magnetic sensor 13 off the edge of the slotted disc.
- An alternative arrangement is a slotted disc of any opaque material and a photoelectric sensor.
- each slot sensed constitutes a sector mark, but in accordance with the present invention, the pulses derived from the sector marks are not used directly to time sectors for the purpose of storing or reading data. Instead, the pulses are used to synchronize a phase-locked loop (PLL) with the speed of the memory. An output of the PLL is then used for electronically timing sectors for data storage and recovery. Consequently, it is evident that the number of slots on the slotted disc are fixed and equally spaced. However, one revolution of the magnetic memory can then be electronically divided into a large number of possible combinations of equally time-spaced sectors.
- PLL phase-locked loop
- the sensed slots produce a train of pulses which trigger a J-K type flip-flop 14 connected such that it toggles or changes state with every pulse thus derived from the slotted disc.
- the output of the flip-flop is thus a square wave at a frequency f ⁇ f, where f in cycles per second is the product of half the number of slots on the disc and the speed of the disc file in revolutions per second.
- the variation in frequency ⁇ f is small (less than 1.0%) and varies very slowly because the disc file, which is a heavy inertial load, is driven by an induction motor whose speed is controlled by a separate speed control system, such as by a phase angle control of an AC voltage waveform applied to the motor.
- the phase-locked loop is comprised of a phase detector 15 and voltage controlled oscillator (VCO) 16.
- VCO voltage controlled oscillator
- a counter 17 divides the VCO frequency by the integer N.
- a flip-flop 18 divides the output of the counter 17 by 2, thus providing a square wave feedback signal at the frequency f ⁇ f.
- the phase difference between the feedback signal and the input signal is detected by phase detector 15 and filtered by a low-pass filter 19 to produce a phase error signal.
- the phase error signal thus produced is not applied directly to the VCO, as in some conventional PLLs. Instead it is first compared with a reference voltage from an adjustable and regulated source 20. The comparison is made in a differential amplifier 21. This reference voltage is used to set the center frequency of the VCO, i.e., to set the frequency desired without any phase error signal.
- the output of the differential amplifier 21 is an error signal which has been subjected to only second order filtering. First order filtering is provided by the inherent integration function of the VCO, and second order filtering is provided by the low-pass filter 19 in a conventional manner. Third and fourth order filtering is then provided by two additional low-pass filters 22 and 23 connected in cascade to provide for better tracking of rate of change of frequency (disc file speed), f ⁇ f.
- the third and fourth order filtering significantly reduce the AC ripple of the output voltage of the differential amplifier 21. Consequently, the control voltage applied to the VCO is approximately DC. In that manner, the rate of change of VCO frequency is controlled to follow only the low frequency variations in speed of the disc file.
- the transient response of the PLL is designed such that it tracks the low frequency variations, like disc speed, perfectly and almost instantaneously.
- the high frequency variations like slot-to-slot time jitter of the slotted disc, are ignored due to the third and fourth order filtering.
- a very high loop gain is used.
- modulation of the VCO output may be significant even though the feedback signal applied to the phase detector 15 may track the input frequency and phase within the desired tolerance, because the VCO effectively multiplies any phase error by a factor of 2N. Such variation in the output of the VCO would prevent the M sectors from being equally time spaced.
- the judicious choice of the additional time constants provided by the third and fourth order filters of known bandwidth significantly reduce the modulation of the VCO output frequency to improve the PLL operation with deteriorating or unstabilizing the loop. Consequently, when counted down by a programmable sector counter (count-down circuit) 24, the resulting output of that counter has a period equal to the designed time space of the M equally time spaced sectors.
- an additional slot 25, called an index slot is provided at the center between two consecutive slots of the slotted disc 11.
- An index detector circuit 26 detects the pulse produced by this index slot from among all other pulses from the slot sensor 13.
- An alternative arrangement for producing a single index pulse once for each disc file revolution is to provide a single slot or hole at a different radius of the same slotted disc, or on a separate disc, and a separate magnetic or photoelectric sensor. In either case, the electronically generated sector pulses from the counter 24 are synchronized with the index pulse such that the first sector pulse is identified and would occur at the same physical point on the disc during each revolution within the tolerances allowed. The index pulse thus produced resets the sector counter 24 during each slotted disc revolution.
- the integer K by which the counter 24, is programmed to divide is determined from the equation ##EQU1##
- the numbers K and N both integers, are selected to permit dividing one revolution into a whole number, M of sectors. This is predetermined, starting with a known frequency f, and programmed by the proper selection of N and K.
- the integer N is selected and designed into the PLL of the disc file system designed to run at a known RPM, but the factor K is not selected until the disc file system is dedicated to a particular data processing system.
- the factor K is then programmed, either in a reprogrammable way, as by plug board programming arrays, or in an unalterable way by substitution or alteration of the counter circuit boards.
Abstract
In a rotating magnetic memory, a phase-locked loop tracks pulses derived from sector marks on means mechanically connected to rotate with the memory. The output frequency of the phase-locked loop, which is significantly higher by a factor of N than the frequency of the sector mark pulses, is cyclically counted down to divide each revolution of the memory into M equally time spaced sectors. Third and fourth order filtering in the phase-locked loop assures a high degree of precision and consistency in the sectoring.
Description
This .[.invention.]. .Iadd.application is for a reissue of U.S. Pat. No. 3,898,690 on an invention which .Iaddend.relates to rotating magnetic memories for digital data processing systems, and more particularly to apparatus for dividing (sectoring) a rotating memory into equally time spaced sectors.
In rotating magnetic memories, such as magnetic drum or disc files, it is advantageous to divide the tracks into equally time spaced sectors. Each sector may then be used to store one or more bytes, each byte consisting of a predetermined number of binary digits (bits). One approach represented by U.S. Pat. No. 3,105,228 has been to read evenly spaced pulses stored on a separate track, and to employ those pulses to synchronize a local oscillator the output of which is then used to cyclically count down from an index a predetermined number of pulses for each sector. The problem with that approach is the need to dedicate a track of the magnetic recording media and sophisticated read electronics to develop sector timing signals.
Another similar approach has been to format the sector timing information with the data information. This requires additional format decoding electronics and also uses some of the data storage space on the data tracks of the magnetic memory. That, and additional tolerances of compatibility requirements to reading recorded data on other memory devices.Iadd., .Iaddend.reduces the total data storage capacity of the magnetic memory.
Others have employed a separate disc with slots to divide the data tracks directly into sectors, one slot for each sector. This technique has the advantage of not using up part of the memory capacity, but lacks the ability or versatility of dividing one revolution of the rotating magnetic memory into any desired number of sectors. What is desired is a system that is both versatile and precise, and does not require any of the data storage space on the record media.
.[.In accordance with the present invention, each.]. .Iadd.Each .Iaddend.revolution of a rotating magnetic memory is divided into an integer M of sectors with precision by detecting sector marks on means mechanically connected to rotate with the memory, generating from the detected sector marks a pulse train at a frequency f±Δf that is a function of the memory speed, and applying the pulse train to a phase-locked loop to produce pulses at a higher frequency by a known factor.[., 2N.]. . The pulses at this higher frequency are counted down in a cyclic counter to repeatedly divide each revolution of the memory into M equally time spaced sectors with a high degree of precision and consistency. To assure this high degree of precision in the timing (spacing) of the sectors, more than second order filtering is employed in the phase-locked loop.
The novel features that are considered characteristic of this invention are set forth with particularity in the appended claims. The invention will best be understood from the following description when read in connection with the accompanying drawings.
The sole FIGURE is a block diagram of a preferred embodiment of the invention.
Referring now to the drawings, a rotating magnetic memory 10 is shown as a disc file which may be of the moving-head type or the fixed-head type. The heads are not shown since their use only benefits from the present invention in accessing word storage locations in equally time spaced sectors of recording tracks. The heads do not play a role in electronically dividing the tracks into sectors.
A slotted disc 11 of ferromagnetic material is connected to a shaft 12 on which the memory discs turn at nominal speeds of 1500, 2400 or 3600 RPM. The slots are detected by a magnetic sensor 13 off the edge of the slotted disc. An alternative arrangement is a slotted disc of any opaque material and a photoelectric sensor. In either case each slot sensed constitutes a sector mark, but in accordance with the present invention, the pulses derived from the sector marks are not used directly to time sectors for the purpose of storing or reading data. Instead, the pulses are used to synchronize a phase-locked loop (PLL) with the speed of the memory. An output of the PLL is then used for electronically timing sectors for data storage and recovery. Consequently, it is evident that the number of slots on the slotted disc are fixed and equally spaced. However, one revolution of the magnetic memory can then be electronically divided into a large number of possible combinations of equally time-spaced sectors.
The sensed slots produce a train of pulses which trigger a J-K type flip-flop 14 connected such that it toggles or changes state with every pulse thus derived from the slotted disc. The output of the flip-flop is thus a square wave at a frequency f±Δf, where f in cycles per second is the product of half the number of slots on the disc and the speed of the disc file in revolutions per second. The variation in frequency Δf is small (less than 1.0%) and varies very slowly because the disc file, which is a heavy inertial load, is driven by an induction motor whose speed is controlled by a separate speed control system, such as by a phase angle control of an AC voltage waveform applied to the motor. Notwithstanding how small and slow the variation, it is necessary for the electronic sectoring system to vary accordingly with a high degree of accuracy in order to maximize data storage space. This scheme is equal to or better than direct mechanical sectoring in terms of available data storage space for a given number of sectors per revolution.
The phase-locked loop is comprised of a phase detector 15 and voltage controlled oscillator (VCO) 16. The latter produces an output signal at a frequency some whole multiple, 2N, times the input frequency. A counter 17 divides the VCO frequency by the integer N. A flip-flop 18 divides the output of the counter 17 by 2, thus providing a square wave feedback signal at the frequency f±Δf. The phase difference between the feedback signal and the input signal is detected by phase detector 15 and filtered by a low-pass filter 19 to produce a phase error signal.
The phase error signal thus produced is not applied directly to the VCO, as in some conventional PLLs. Instead it is first compared with a reference voltage from an adjustable and regulated source 20. The comparison is made in a differential amplifier 21. This reference voltage is used to set the center frequency of the VCO, i.e., to set the frequency desired without any phase error signal. The output of the differential amplifier 21 is an error signal which has been subjected to only second order filtering. First order filtering is provided by the inherent integration function of the VCO, and second order filtering is provided by the low-pass filter 19 in a conventional manner. Third and fourth order filtering is then provided by two additional low- pass filters 22 and 23 connected in cascade to provide for better tracking of rate of change of frequency (disc file speed), f±Δf. Also, the third and fourth order filtering significantly reduce the AC ripple of the output voltage of the differential amplifier 21. Consequently, the control voltage applied to the VCO is approximately DC. In that manner, the rate of change of VCO frequency is controlled to follow only the low frequency variations in speed of the disc file.
The transient response of the PLL is designed such that it tracks the low frequency variations, like disc speed, perfectly and almost instantaneously. However, the high frequency variations, like slot-to-slot time jitter of the slotted disc, are ignored due to the third and fourth order filtering. To reduce steady-state phase errors, a very high loop gain is used.
If third and fourth order filtering were not present, modulation of the VCO output may be significant even though the feedback signal applied to the phase detector 15 may track the input frequency and phase within the desired tolerance, because the VCO effectively multiplies any phase error by a factor of 2N. Such variation in the output of the VCO would prevent the M sectors from being equally time spaced. The judicious choice of the additional time constants provided by the third and fourth order filters of known bandwidth significantly reduce the modulation of the VCO output frequency to improve the PLL operation with deteriorating or unstabilizing the loop. Consequently, when counted down by a programmable sector counter (count-down circuit) 24, the resulting output of that counter has a period equal to the designed time space of the M equally time spaced sectors.
In order that the beginning of the first sector will always start at the same place, an additional slot 25, called an index slot, is provided at the center between two consecutive slots of the slotted disc 11. An index detector circuit 26 detects the pulse produced by this index slot from among all other pulses from the slot sensor 13. An alternative arrangement for producing a single index pulse once for each disc file revolution is to provide a single slot or hole at a different radius of the same slotted disc, or on a separate disc, and a separate magnetic or photoelectric sensor. In either case, the electronically generated sector pulses from the counter 24 are synchronized with the index pulse such that the first sector pulse is identified and would occur at the same physical point on the disc during each revolution within the tolerances allowed. The index pulse thus produced resets the sector counter 24 during each slotted disc revolution.
The integer K by which the counter 24, is programmed to divide is determined from the equation ##EQU1## The numbers K and N, both integers, are selected to permit dividing one revolution into a whole number, M of sectors. This is predetermined, starting with a known frequency f, and programmed by the proper selection of N and K. In practice, the integer N is selected and designed into the PLL of the disc file system designed to run at a known RPM, but the factor K is not selected until the disc file system is dedicated to a particular data processing system. The factor K is then programmed, either in a reprogrammable way, as by plug board programming arrays, or in an unalterable way by substitution or alteration of the counter circuit boards. In either case, there is a tremendous advantage in having a disc file system with electronically timed sectors that can be programmed to fit the needs of a data processing system once the disc file system is dedicated to the particular data processing system. One basic design of the electronic sectoring system will then easily satisfy the needs of many different applications for the disc file system.
Although a particular embodiment of the invention has been described and illustrated herein, it is recognized that modifications and variations may readily occur to those skilled in the art. It is therefore intended that the claims be interpreted to cover such modifications and variations.
Claims (3)
- cycles during each revolution of said memory..]. .[.3. The combination defined in claim 1 including higher order low pass filtering than second order filtering of any correction voltage signal derived from phase comparison of said sector marks and said feedback signal..]. .[.4. The combination in claim 3 including:means for providing an index mark to rotate in unison with said sector marks,means for detecting said index mark to produce an index pulse once per revolution of said memory, andmeans for synchronizing said means for counting down cycles of said output signal, whereby division of each memory revolution into a whole number of equally time spaced sectors begins at the same point during each
- revolution of said memory..]. .[.5. Apparatus for generating a sector timing signal which divides one revolution of a rotating magnetic memory into a whole number of equally time spaced sectors comprising:a surface connected to rotate on the same axis with said memory, said surface having a plurality of equally spaced sector marks on a circle, the center of said circle being on said axis,means for sensing said sector marks as they pass by a fixed point in space during each revolution of said memory to generate a continuous train of pulses at a frequency that is a function of the speed with which said memory revolves about said axis,a phase-locked loop for producing output pulses at a higher frequency by a known factor, said phase-locked loop being connected to receive said continuous train of pulses, whereby the output pulses of said phase-locked loop are synchronized with said continuous train of pulses, andmeans for counting down output pulses from said phase-locked loop to effectively divide the total number of output pulses produced during each revolution of said record medium into a whole number of equally spaced sectors thereby producing at the output of said count-down means a cyclic waveform having a period for each cycle equal to the time-space of each sector..]. .[.6. The combination in claim 5 including higher order low pass filtering than second order filtering of any correction signal derived from any phase error between said train of pulses generated from
- said sector marks and a feedback signal in said loop..]. .[.7. The combination of claim 6 including:means for providing an index mark to rotate in unison with said sector marks,means for detecting said index mark to produce an index pulse once per revolution of said memory, andmeans for synchronizing said means for counting down cycles of said output signal, whereby division of each memory revolution into a whole number of equally time spaced sectors begins at the same point during each revolution of said memory..]. .Iadd. 8. Apparatus for electronically dividing a rotating memory into a whole number of equally time spaced sectors comprising:means mechanically connected to rotate in unison with said memory, said means being divided into a number of evenly spaced sectors by sector marks,means for detecting said sector marks and generating a train of sector pulses at a frequency f ± Δf, where Δf represents the magnitude of fluctuations in frequency of the sector pulses due to fluctuations in the speed of revolution of said memory,a phase-locked loop having an oscillator controlled by a correction signal for producing an output signal at a frequency significantly greater than said train of sector pulses by a known factor, said correction signal being so produced as to stabilize the loop in phase by continual phase comparison of said sector pulses with feedback pulses, said feedback pulses being produced by continually dividing cycles of said oscillator output signal by said known factor, said correction signal being proportional to the difference between a reference DC signal and a phase error signal produced by second order filtering of a signal derived from phase comparison of said sector pulses with feedback pulses,means for third and fourth order filtering of said correction signal, anddigital means for continually dividing said output signal by a predetermined integer to produce a timing signal having a number of cycles equal to said whole number of equally time spaced sectors. .Iaddend. .Iadd. 9. Apparatus for generating a sector timing signal which divides one revolution of a rotating magnetic memory into a whole number of equally time spaced sectors comprising:a surface connected to rotate on the same axis with said memory, said surface having a plurality of equally spaced sector marks on a circle, the center of said circle being on said axis,means for sensing and sector marks as they pass by a fixed point in space during each revolution of said memory to generate a continuous train of sector pulses at a frequency that is a function of the speed with which said memory revolves about said axis,a phase-locked loop having an oscillator controlled by a correction signal for producing output pulses at a frequency higher than the frequency of said sector pulses by a known factor, said phase-locked loop having a phase comparator connected to receive said continuous train of sector pulses for phase comparison with feedback pulses to produce said correction signal for any phase difference between said train of sector pulses and said feedback pulses, said feedback pulses being derived from said oscillator output pulses by said factor, said correction signal being proportional to the difference between a reference DC signal and a phase error signal produced by said comparator and filtered by a low-pass filter which provides second order filtering, whereby the output pulses of said phase-locked loop are synchronized in phase with said continuous train of pulses,means for third and fourth order filtering of any correction signal derived from any phase error between said train or sector pulses generated from said sector marks and said feedback pulses, andmeans for counting down output pulses from said phase-locked loop to effectively divide the total number of output pulses produced during each revolution of said record medium into a whole number of equally spaced sectors thereby producing at the output of said count-down means a cyclic waveform having a period for each cycle equal to the time-space of each sector. .Iaddend.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/704,434 USRE29431E (en) | 1974-09-06 | 1976-07-12 | Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US503728A US3898690A (en) | 1974-09-06 | 1974-09-06 | Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory |
| US05/704,434 USRE29431E (en) | 1974-09-06 | 1976-07-12 | Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US503728A Reissue US3898690A (en) | 1974-09-06 | 1974-09-06 | Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| USRE29431E true USRE29431E (en) | 1977-10-04 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US05/704,434 Expired - Lifetime USRE29431E (en) | 1974-09-06 | 1976-07-12 | Phase-locked loop for an electronic sectoring scheme for rotating magnetic memory |
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| Country | Link |
|---|---|
| US (1) | USRE29431E (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6326757B1 (en) * | 1999-03-18 | 2001-12-04 | Aisin Seiki Kabushiki Kaisha | Rotational pulse generating circuit for commutator DC motors |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3412385A (en) * | 1964-11-12 | 1968-11-19 | Scient Data Systems Inc | Magnetic tape transducing control system |
| US3778793A (en) * | 1972-09-11 | 1973-12-11 | Hitachi Ltd | Clocking system for magnetic memory |
| US3789379A (en) * | 1973-02-23 | 1974-01-29 | Honeywell Inc | Compensation of reproduced signal by measuring a deviation of recorded reference signal |
-
1976
- 1976-07-12 US US05/704,434 patent/USRE29431E/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3412385A (en) * | 1964-11-12 | 1968-11-19 | Scient Data Systems Inc | Magnetic tape transducing control system |
| US3778793A (en) * | 1972-09-11 | 1973-12-11 | Hitachi Ltd | Clocking system for magnetic memory |
| US3789379A (en) * | 1973-02-23 | 1974-01-29 | Honeywell Inc | Compensation of reproduced signal by measuring a deviation of recorded reference signal |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6326757B1 (en) * | 1999-03-18 | 2001-12-04 | Aisin Seiki Kabushiki Kaisha | Rotational pulse generating circuit for commutator DC motors |
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| AS | Assignment |
Owner name: PERTEC PERIPHERALS CORPORATION 9600 IRONDALE AVE. Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:PERTEC COMPUTER CORPORATION, INC., A DE CORP;REEL/FRAME:004455/0873 Effective date: 19850228 |